Patents by Inventor Tetsuo Hatakeyama

Tetsuo Hatakeyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6831345
    Abstract: A high withstand voltage semicnductor device does not show any significant fall of its withstand voltage if the impurity concentration of the RESURF layer of a low impurity concentration semiconductor region thereof varies from the optimal level and/or influenced by the fixed electric charge.
    Type: Grant
    Filed: July 17, 2002
    Date of Patent: December 14, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kozo Kinoshita, Tetsuo Hatakeyama, Takashi Shinohe
  • Publication number: 20040173820
    Abstract: A high withstand voltage semiconductor device does not show any significant fall of its withstand voltage if the impurity concentration of the RESURF layer of a low impurity concentration semiconductor region thereof varies from the optimal level and/or influenced by the fixed electric charge.
    Type: Application
    Filed: March 9, 2004
    Publication date: September 9, 2004
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kozo Kinoshita, Tetsuo Hatakeyama, Takashi Shinohe
  • Publication number: 20030178672
    Abstract: A high-breakdown-voltage semiconductor device comprises a high-resistance semiconductor layer, trenches formed on the surface thereof in a longitudinal plane shape and in parallel, first regions formed on the semiconductor layer to be sandwiched between adjacent ones of the trenches and having an impurity concentration higher than that of the semiconductor layer, a second region having opposite conductivity to the first regions and continuously disposed in a trench sidewall and bottom portion, a sidewall insulating film disposed on the second region of the trench sidewall, a third region disposed on the second region of the trench bottom portion and having the same conductivity as and the higher impurity concentration than the second region, a fourth region disposed on the back surface of the semiconductor layer, a first electrode formed on each first region, a second electrode connected to the third region, and a third electrode formed on the fourth region.
    Type: Application
    Filed: March 24, 2003
    Publication date: September 25, 2003
    Inventors: Tetsuo Hatakeyama, Takashi Shinohe
  • Publication number: 20030103087
    Abstract: An electronic apparatus comprises a display unit having a display screen, and an input unit for inputting information. The input unit includes a first input operation section and a second input operation section. The second input operation section is located opposite to the first input operation section, and is larger than the first input operation section. The input unit is selectable between a first position in which the first input operation section can be operated while viewing the display screen, and a second position in which the second input operation section can be operated while viewing the display screen.
    Type: Application
    Filed: October 2, 2002
    Publication date: June 5, 2003
    Inventor: Tetsuo Hatakeyama
  • Publication number: 20030067033
    Abstract: A high withstand voltage semiconductor device does not show any significant fall of its withstand voltage if the impurity concentration of the RESURF layer of a low impurity concentration semiconductor region thereof varies from the optimal level and/or influenced by the fixed electric charge.
    Type: Application
    Filed: July 17, 2002
    Publication date: April 10, 2003
    Applicant: KABUSHHIKI KAISH TOSHIBA
    Inventors: Kozo Kinoshita, Tetsuo Hatakeyama, Takashi Shinohe
  • Patent number: 5651135
    Abstract: A set associative cache system in a computer system having a lower memory is provided with a plurality of cache memory sets. A cache data memory contains a plurality of cache lines to store data in units of blocks corresponding to data stored in the lower memory. A cache tag memory stores lower memory addresses for data stored in the cache lines. The plurality of cache memory sets have different numbers of cache lines. A read/write section reads out data stored in the lower memory into the plurality of cache lines and writing data in the plurality of cache lines back to the lower memory.
    Type: Grant
    Filed: March 29, 1995
    Date of Patent: July 22, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tetsuo Hatakeyama
  • Patent number: 4801109
    Abstract: The present invention relates to a roll core holding device equipped with a roll core release mechanism which can facilitate to automatically and certainly release the empty roll core from a rotary printing machine. The roll core holding device for each end of a roll core comprises a shifting means; a center member capable of shifting owing to the shifting motion of the shifting means and consisting of a base section and a shaft section protruded from the base section; a plurality of pawls capable of shifting along the shaft section of the center member, arranged so as to widen the space between the pawls as they are shifted toward the base section; an urging means for the pawls toward the top of the shaft section; and a stopper secured at the top of the shaft section of the center member.
    Type: Grant
    Filed: October 8, 1987
    Date of Patent: January 31, 1989
    Assignee: Kabushikigaisha Tokyo Kikai Seisakusho
    Inventors: Tetsuo Hatakeyama, Yoshinori Uera, Nobuaki Nagao
  • Patent number: 4715553
    Abstract: The present invention relates to a roll core holding device equipped with a roll core release mechanism which can facilitate to automatically and certainly release the empty roll core from a rotary printing machine. The roll core holding device for each end of a roll core comprises a shifting means; a center member capable of shifting owing to the shifting motion of the shifting means and consisting of a base section and a shaft section protruded from the base section; a plurality of pawls capable of shifting along the shaft section of the center member, arranged so as to widen the space between the pawls as they are shifted toward the base section; an urging means for the pawls toward the top of the shaft section; and a stopper secured at the top of the shaft section of the center member.
    Type: Grant
    Filed: August 22, 1986
    Date of Patent: December 29, 1987
    Assignee: Kabushikigaisha Tokyo Kikai Seisakusho
    Inventors: Tetsuo Hatakeyama, Yoshinori Uera, Nobuaki Nagao