Patents by Inventor Tetsuo Matsuda

Tetsuo Matsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6227658
    Abstract: A liquid material jetted from a nozzle is supplied onto a surface of the semiconductor substrate with use of an ink-jet mechanism comprising a liquid material receiving section, a driving section and a nozzle section. Since a film material (liquid material) is supplied by an ink-jet method, not only the film material only be supplied to a desired region of the semiconductor substrate surface and a supply to an unnecessary region is prevented, but also a variation of a film thickness comes not to be dependent on a pattern on the semiconductor substrate. Therefore, in forming a thin film on a semiconductor substrate, a thin film formation is realized so that utilization efficiency of a film material is increased with reduction in loss thereof and a variation of a thickness of the film formed is not influenced by a pattern on the semiconductor substrate.
    Type: Grant
    Filed: June 3, 1998
    Date of Patent: May 8, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuo Matsuda, Maria Ronay
  • Patent number: 6229211
    Abstract: A semiconductor device comprises a base layer, a barrier metal layer formed on the base layer and a metal interconnect formed on the barrier metal layer, the barrier metal layer being made of at least one element &agr; selected from metal elements and at least one element &bgr; selected from a group of boron, oxygen, carbon and nitrogen and having at least two compound films &agr;&bgr;n with different compositional ratios in atomic level arranged to form a laminate. When the elements &agr; contained in the compound films &agr;&bgr;n are same and identical and at least one of the at least two compound films &agr;&bgr;n is a compound film &agr;&bgr;x (x>1), the via resistance and the interconnect resistance of the device can be reduced, while maintaining the high barrier effect.
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: May 8, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Kawanoue, Junichi Wada, Tetsuo Matsuda, Hisashi Kaneko
  • Patent number: 6150270
    Abstract: A method comprises forming a barrier layer for copper metallization, selectively forming a silicon film on a surface of copper wiring formed on the main surface of a semiconductor substrate, and reacting the silicon film with a non-copper metal and/or nitrogen to form a barrier layer in a self-aligned manner relative to the copper wiring. In the method, the capacitance increase in the copper wirings formed is prevented, and the barrier layer formed has a satisfactory barrier property of protecting the copper wirings.
    Type: Grant
    Filed: January 7, 1999
    Date of Patent: November 21, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuo Matsuda, Tadashi Iijima, Hisashi Kaneko
  • Patent number: 5998100
    Abstract: A fabrication process includes a step of providing a substrate to be fabricated. A multi-layer antireflective layer is then formed on the substrate. A patterned resist having a thickness less than 850 nanometers is formed on the multi-layer antireflective layer and the substrate is fabricated using the patterned resist as a mask.
    Type: Grant
    Filed: September 5, 1997
    Date of Patent: December 7, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsukasa Azuma, Tokuhisa Ohiwa, Tetsuo Matsuda, David M. Dobuzinsky, Katsuya Okumura
  • Patent number: 5958630
    Abstract: The present invention is directed to the prevention of a decrease in the resolution of a film shifter-type alternating phase shifting mask, and the complexity of the mask forming step, and discusses the structure of a novel alternating phase shifting mask, and a novel manufacturing method which does not require the etching for forming a shifter. To achieve this object, hydrogen silsesquioxane (flowable oxide (FOX)) is used as the material for the phase shifter. The optical characteristics of this film are very close to those of a quartz substrate, and the property that the in-surface variation (.+-.3 .sigma.) of the thickness is 1% or less, is close to that of SOG (Spin On Glass). The most advantageous aspect of the FOX being used for the mask manufacturing process is that, since the FOX film is etched at the same time as the resist development, with the alkaline developing solution used for etching the resist, there is no need to provide a particular step for etching the shifter.
    Type: Grant
    Filed: December 30, 1997
    Date of Patent: September 28, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Hashimoto, Tetsuo Matsuda
  • Patent number: 5759746
    Abstract: A fabrication process includes a step of providing a substrate to be fabricated. A multi-layer antireflective layer is then formed on the substrate. A patterned resist having a thickness less than 850 nanometers is formed on the multi-layer antireflective layer and the substrate is fabricated using the patterned resist as a mask.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: June 2, 1998
    Assignees: Kabushiki Kaisha Toshiba, International Business Machines Corp.
    Inventors: Tsukasa Azuma, Tokuhisa Ohiwa, Tetsuo Matsuda, David M. Dobuzinsky, Katsuya Okumura
  • Patent number: 5679610
    Abstract: The present invention relates to a simple, low cost planarization technique whereby physical pressure is used to planarize the surface of a semiconductor device. The method of the present invention planarizes a semiconductor workpiece surface and results in an increase in the productivity of the processing steps that follow. In effect, the present invention applies physical pressure to flatten the surface layers of a semiconductor workpiece. The present invention is particularly adapted for use in planarizing surface layers made of plastic materials.
    Type: Grant
    Filed: December 15, 1994
    Date of Patent: October 21, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuo Matsuda, Katsuya Okumura
  • Patent number: 5658389
    Abstract: According to a thin film forming method, at least one type of gas is activated to produce a plurality of species having positive or negative charges. The plurality of species pass through an electric field or magnetic field to extract specific species. The specific species are supplied to a substrate surface. Thereafter, the specific species are chemically reacted with each other to form a thin film. This extraction is performed using a difference in track corresponding to a ratio of mass to charge of the species passing through the electric field.
    Type: Grant
    Filed: October 15, 1993
    Date of Patent: August 19, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuo Matsuda, Haruo Okano, Tokuhisa Ohiwa
  • Patent number: 5563105
    Abstract: Fluorine-doped oxide is formed that is resistant to water absorption by the use of two sources of silicon, one being the fluorine precursor and the other being available to react with excess fluorine from the fluorine precursor, thereby reducing the number of fluorine radicals in the layer; the fluorine precursor containing a glass-forming element that combines with the other glass constituents to carry into the gas a diatomic radical containing one atom of fluorine and one atom of the glass-forming element.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: October 8, 1996
    Assignee: International Business Machines Corporation
    Inventors: David M. Dobuzinsky, Tetsuo Matsuda, Son V. Nguyen, James G. Ryan, Michael Shapiro
  • Patent number: 5413967
    Abstract: An organic silane compound gas and an oxidizing gas are introduced into a reaction vessel from each gas source. Further a gas containing at least one kind of halogen, for example carbon tetrafluoride, is decomposed into halogen radicals, etc., by microwave discharge, and introduced into the reaction vessel. Reaction occurs between the gases, resulting in silicon oxide films being formed on substrates in the reaction vessel.
    Type: Grant
    Filed: May 3, 1994
    Date of Patent: May 9, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuo Matsuda, Haruo Okano
  • Patent number: 5286523
    Abstract: In a CVD apparatus, an epitaxial apparatus or an etching apparatus, the processing conditions are made uniform in a batch process by changing, with time, positions which are disposed in the direction of a gas flow in a reaction vessel and at which the optimal surface processing conditions are attained. By doing so, homogeneous and uniform films can be formed with a large substrate processing apparatus.
    Type: Grant
    Filed: August 27, 1991
    Date of Patent: February 15, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuo Matsuda, Yuuichi Mikata, Akimichi Yonekura
  • Patent number: 5132756
    Abstract: An improved method of manufacturing a semiconductor device wherein an insulating film, a conducting film, a first film to prevent conducting and refractory metal films from the reaction and a refractory metal film are sequentially deposited on a semiconductor substrate. Further, a second film is formed on the surface of the refractory metal film to prevent the exposed surface of the refractory metal film from the oxidization. Tungsten, molybdenum or the like is used as a refractory metal. A nitride film, a carbide film, or a silicide film of tungsten or molybdenum may be advantageously used as the second film.
    Type: Grant
    Filed: October 24, 1990
    Date of Patent: July 21, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tetsuo Matsuda
  • Patent number: 5094879
    Abstract: According to a thin film forming method, at least one type of gas is activated to produce a plurality of species having positive or negative charges. The plurality of species pass through an electric field or magnetic field to extract specific species. The specific species are supplied to a substrate surface. Thereafter, the specific species are chemically reacted with each other to form a thin film. This extraction is performed using a difference in track corresponding to a ratio of mass to charge of the species passing through the electric field.
    Type: Grant
    Filed: June 27, 1990
    Date of Patent: March 10, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuo Matsuda, Haruo Okano, Tokuhisa Ohiwa
  • Patent number: 4923715
    Abstract: A method for the formation of a thin, high melting-point metal film such as W, on a substrate surface, by means of CVD, is disclosed herein. In this method, the inner wall of the CVD reaction tube and the surface of the at least part of the fittings disposed therewithin are covered with a metal nitride film, in the process of performing the CVD operation. The method permits the formation of a high quality film, and also prevents the deposition of the high melting-point metal on the inner wall of the reaction chamber, even if the CVD operation is repeatedly performed over a long period of time.
    Type: Grant
    Filed: May 30, 1989
    Date of Patent: May 8, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuo Matsuda, Iwao Kunishima
  • Patent number: 4866009
    Abstract: A method of manufacturing a semiconductor device includes the steps of (a) forming a first conductive pattern on a semiconductor substrate, (b) forming a first interlayer insulating film, covering the first conductive pattern, (c) forming a second conductive pattern, composed of a refractory metal, on the first interlayer insulating film, (d) forming a contact hole reaching the first conductive pattern through the second conductive pattern and the first interlayer insulating film at a predetermined position, (e) performing an annealing step before or after formation of the contact hole in step (d), and (f) covering in the contact hole with a metal film, after annealing step (e), to connect the second conductive pattern to the first conductive pattern. In this method, annealing step--for example, gettering--is performed before the wiring layer of the refractory metal is placed in contact with the semiconductor layer.
    Type: Grant
    Filed: February 3, 1989
    Date of Patent: September 12, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tetsuo Matsuda
  • Patent number: 4406908
    Abstract: Tetrazolylcoumarin derivatives of the general formula: ##STR1## wherein R is hydrogen atom, an alkyl group, an alkenyl group, an alkoxyalkyl group or phenyl group, n is an integer of 2 to 4, and the R--O--(CH.sub.2).sub.n --O-- group is substituted at any of the 5, 6, 7 and 8 positions of the coumarin ring, and the salts thereof. The compounds are useful as antiallergic agents for preventing and treating allergic diseases.
    Type: Grant
    Filed: May 6, 1981
    Date of Patent: September 27, 1983
    Assignee: Kakenyaku Kako Co., Ltd.
    Inventors: Tetsuo Matsuda, Jun Nakano, Yukio Terashima, Yuji Suzuki, Kiyonoshin Itikawa
  • Patent number: 4345069
    Abstract: Deformyltylosin derivatives of the formula ##STR1## wherein A is ##STR2## --CH.dbd.CH-- or --CH.sub.2 --CH.sub.2 --, R.sub.1 is hydrogen, lower alkanoyl or aryl-lower alkanoyl, X.sub.1 and X.sub.2 are hydrogen or are connected to form a valence bond, Y.sub.1 and Y.sub.2 are hydrogen or are connected to form a valence bond, Q.sub.1 is hydrogen or methyl, Q.sub.2 is hydrogen or ##STR3## R.sub.2 is hydrogen or lower alkanoyl, R is hydrogen or ##STR4## R.sub.3 is hydrogen or C.sub.2-5 alkanoyl, and R.sub.4 is hydrogen or C.sub.2-6 alkanoyl, and when R.sub.3 is not hydrogen, then R.sub.4 is not hydrogen, or a pharmaceutically acceptable salt thereof, have strong antibacterial activities as compared to the known antibiotic tylosin, and also have enhanced antibacterial activities against all macrolide antibiotic-resistant strains such as A, B and C group strains, and have higher blood levels as compared with tylosin.
    Type: Grant
    Filed: September 5, 1980
    Date of Patent: August 17, 1982
    Assignee: Toyo Jozo Kabushiki Kaisha
    Inventors: Hideo Sakakibara, Tatsuro Fujiwara, Osamu Okegawa, Eiichi Honda, Susumu Watanabe, Tetsuo Matsuda
  • Patent number: 4268665
    Abstract: Derivatives of antibiotic tylosin of the formula ##STR1## wherein R.sub.1 is hydrogen or lower alkanoyl, A.sub.1 and A.sub.2 are groups of which one is R.sub.2 and the other is R.sub.3, and R.sub.2 and R.sub.3 are C.sub.2-6 alkanoyl, or a physiologically acceptable salt thereof, have enhanced antibacterial activity against macrolide antibiotic-resistant strains.
    Type: Grant
    Filed: September 14, 1979
    Date of Patent: May 19, 1981
    Assignee: Toyo Jozo Kabushiki Kaisha
    Inventors: Hideo Sakakibara, Tatsuro Fujiwara, Osamu Okegawa, Toshiyuki Watanabe, Susumu Watanabe, Tetsuo Matsuda
  • Patent number: 4242504
    Abstract: 3"-acylated macrolide antibiotics of the formula ##STR1## wherein R.sub.1 is hydrogen or C.sub.2-3 alkanoyl, R.sub.2 is hydrogen or C.sub.2-4 alkanoyl, at least one of R.sub.1 and R.sub.2 being hydrogen, and one of R' and R" being R.sub.3 and the other R.sub.4, R.sub.3 being C.sub.2-6 alkanoyl and R.sub.4 being C.sub.2-5 alkanoyl, or a pharmaceutically acceptable salt thereof.
    Type: Grant
    Filed: May 10, 1979
    Date of Patent: December 30, 1980
    Assignee: Toyo Jozo Kabushiki Kaisha
    Inventors: Hideo Sakakibara, Osamu Okegawa, Toshiyuki Watanabe, Tatsuro Fujiwara, Susumu Watanabe, Satoshi Omura, Tetsuo Matsuda
  • Patent number: 4118336
    Abstract: A novel cellulose microcapsule having adsorbing capacity, consisting of outer semipermeable barrier layer of cellulose and adsorbent powders dispersed within inner cellulose gel matrix, is prepared by ester hydrolysis of a precursor microcapsule consisting of cellulose ester derivative and adsorbent powders. It is excellent in resistance to chemicals such as acids, alkalis or organic solvents and is useful for various purposes.
    Type: Grant
    Filed: December 15, 1976
    Date of Patent: October 3, 1978
    Assignees: Toyo Jozo Company, Ltd., Asahi Kasei Kogyo Kabushiki Kaisha
    Inventors: Masataka Morishita, Yasuo Yokokawa, Tokio Nishikawa, Masahiro Mishiro, Shigeyasu Ohashi, Mitsuru Fukushima, Yoshihito Inaba, Tetsuo Matsuda