Patents by Inventor Tetsuya Kawashima

Tetsuya Kawashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9124187
    Abstract: A control device of an insulation type DC/DC converter includes a shunt regulator that detects an error in output voltage at the secondary side of a transformer, a photocoupler that transmits the detected error voltage to the primary side of the transformer, and a DPWM control unit on the primary side that generates a control pulse signal having a pulse width at a duty ratio based on the error voltage. The DPWM control unit includes an A/D conversion circuit, an A/D output stabilization circuit, a dither circuit, and a DPWM circuit. The A/D output stabilization circuit is provided after the A/D conversion circuit, and the output end of the A/D output stabilization circuit is connected to the input end of the dither circuit.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: September 1, 2015
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Tetsuya Kawashima
  • Publication number: 20150214845
    Abstract: A control device of an insulation type DC/DC converter includes a shunt regulator that detects an error in output voltage at the secondary side of a transformer, a photocoupler that transmits the detected error voltage to the primary side of the transformer, and a DPWM control unit on the primary side that generates a control pulse signal having a pulse width at a duty ratio based on the error voltage. The DPWM control unit includes an A/D conversion circuit, an A/D output stabilization circuit, a dither circuit, and a DPWM circuit. The A/D output stabilization circuit is provided after the A/D conversion circuit, and the output end of the A/D output stabilization circuit is connected to the input end of the dither circuit.
    Type: Application
    Filed: December 4, 2014
    Publication date: July 30, 2015
    Applicant: Fuji Electric Co., Ltd.
    Inventor: Tetsuya KAWASHIMA
  • Publication number: 20150023066
    Abstract: A control section for a current resonant converter section controls a DC output voltage of a current resonant converter section to settle to a target voltage by varying a resonant period between predetermined two resonant periods based on an error signal between the DC output voltage and the target voltage. A gain converter is provided in a preceding stage of a frequency generator for generating a square waveform signal with a duty ratio of 50% and the gain converter has a setting of a nonlinear gain characteristic that cancels nonlinearity in the input-output characteristics of the current resonant converter section. The nonlinear gain characteristic can be a characteristic of continuous gain conversion or discrete gain conversion.
    Type: Application
    Filed: June 13, 2014
    Publication date: January 22, 2015
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Tetsuya KAWASHIMA
  • Patent number: 8934274
    Abstract: A current flowing into one of half-bridge circuits of a power semiconductor module is detected by corresponding ones of current detection circuits through a current detection terminal provided in corresponding ones of semiconductor switching devices forming the half-bridge circuits and a current detection terminal provided in corresponding ones of flywheel diodes back-to-back connected to the corresponding ones of the semiconductor switching devices. A pulse voltage waveform indicating the current detected by the corresponding ones of the current detection circuits is held for a predetermined period and converted into a stepwise voltage waveform by use of corresponding ones of sample-and-hold circuits, so that the voltage held by the corresponding ones of the sample-and-hold circuits is transmitted to a control circuit through corresponding ones of insulating circuits.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: January 13, 2015
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Tetsuya Kawashima
  • Patent number: 8847566
    Abstract: A switching power supply that can suppress output variation at a time of transition of a control mode from a non-linear control mode to a linear control mode. The switching power supply includes instruction value forming circuitry that forms, in a linear control mode, a linear control instruction value for linearly control a switching circuit based on an error of an output voltage, and forms, in a non-linear control mode, a non-linear control instruction value for non-linearly control the switching circuit. The instruction value forming circuitry predicts, in the non-linear control mode, a linear control instruction value suited to the load current in the non-linear control mode, and uses the predicted linear control instruction value for an initial value of the linear control instruction value at a time of transition from the non-linear control mode to the linear control mode.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: September 30, 2014
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Masahiro Sasaki, Tetsuya Kawashima
  • Publication number: 20140226380
    Abstract: A current flowing into one of half-bridge circuits of a power semiconductor module (10) is detected by corresponding one of current detection circuits (11a and 11b to 11f) through a current detection terminal provided in corresponding one of semiconductor switching devices (Q1 and Q2 to Q6) forming the half-bridge circuits and a current detection terminal provided in corresponding one of flywheel diodes (D1 and D2 to D6) back-to-back connected to the corresponding one of the semiconductor switching devices (Q1 and Q2 to Q6).
    Type: Application
    Filed: September 20, 2012
    Publication date: August 14, 2014
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Tetsuya Kawashima
  • Patent number: 8692531
    Abstract: A switching regulator can convert an input voltage to a desired output voltage by ON-OFF controlling switching elements with PWM signals. The switching regulator can include a communication interface circuit that receives external operation instructions, an output voltage setting section that changes an output voltage to an output voltage setting value upon receiving an output voltage changing instruction from the outside, a voltage divider and an ADC that converts an error voltage into a digital error signal e[n], the error voltage being a difference between a reference voltage Vref and a detected output voltage value Vfb. The switching regulator can also include a controller that includes an operation control section for calculating a duty factor signal d[n] to determine an ON time proportion of the switching elements and an output voltage changing control section for controlling operation to change the output voltage.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: April 8, 2014
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Tetsuya Kawashima
  • Patent number: 8618632
    Abstract: There is provided a semiconductor device in which a wiring inductance of a DC/DC converter formed on a multi-layered wiring substrate can be reduced and the characteristics can be improved. In the semiconductor device, in an input-side capacitor, one capacitor electrode is electrically connected to a power-supply pattern between a control power MOSFET and a synchronous power MOSFET, and the other capacitor electrode is electrically connected to a ground pattern therebetween. The multi-layered wiring substrate includes: a via conductor arranged at a position of the one capacitor electrode for electrically connecting among a plurality of power-supply patterns in a thickness direction; and a via conductor arranged at a position of the other capacitor electrode for electrically connecting among a plurality of ground patterns in a thickness direction.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: December 31, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Tetsuya Kawashima, Takayuki Hashimoto
  • Patent number: 8598942
    Abstract: A current-voltage conversion circuit of a current correcting unit having a current detecting terminal connected to a sense terminal of a power semiconductor device converts a sense current into a voltage and detects the voltage. A temperature detecting unit detects the ambient temperature of the power semiconductor device, and a correction unit performs a predetermined operation for correcting a characteristic difference due to the temperature on the basis of the detected temperature and outputs a control signal to a variable voltage source. The variable voltage source changes an output voltage on the basis of the output control signal and adjusts the potential of the sense terminal of the power semiconductor device on the basis of the changed voltage value. In this way, the characteristic difference between a main region and a sense region of the power semiconductor device is corrected.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: December 3, 2013
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Tetsuya Kawashima
  • Patent number: 8592914
    Abstract: The electrical characteristics of a semiconductor device are enhanced. In the package of the semiconductor device, there are encapsulated first and second semiconductor chips with a power MOS-FET formed therein and a third semiconductor chip with a control circuit for controlling their operation formed therein. The bonding pads for source electrode of the first semiconductor chip on the high side are electrically connected to a die pad through a metal plate. The bonding pad for source electrode of the second semiconductor chip on the low side is electrically connected to lead wiring through a metal plate. The metal plate includes a first portion in contact with the bonding pad of the second semiconductor chip, a second portion extended from a short side of the first portion to the lead wiring, and a third portion extended from a long side of the first portion to the lead wiring.
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: November 26, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Tomoaki Uno, Nobuyoshi Matsuura, Yukihiro Sato, Keiichi Okawa, Tetsuya Kawashima, Kisho Ashida
  • Patent number: 8558527
    Abstract: A switching power supply system controlling switching operations of switching devices by a control circuit to convert an input voltage into a desired output voltage, the system being provided with a under voltage lock out circuit including: an input voltage detection unit detecting an input voltage and producing an input voltage digital signal corresponding to the input voltage Vin; and a voltage level comparison unit carrying out digital comparison of the input voltage digital signal with each of two voltage detection level data and outputting the results of the comparisons as an output signal, in which by changing voltage detection level data stored in two registers, desired voltage detection levels and hysteresis characteristic are easily actualized.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: October 15, 2013
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Masahiro Sasaki, Tetsuya Kawashima
  • Patent number: 8552702
    Abstract: A digital control switching regulator of the invention ON/OFF-controls switching elements by digital-controlled pulse width modulation signals and converts an input voltage to a desired output voltage. The switching regulator includes an input voltage detection circuit that includes: a voltage dividing circuit outputting a divided voltage of the input voltage; a comparator section comparing the divided voltage of the input voltage with a first reference voltage and a second reference voltage and outputting a first comparison signal and a second comparison signal indicating comparison results; and a control section controlling a dividing ratio of the voltage dividing circuit based on the first comparison signal and the second comparison signal to obtain the predetermined divided voltage, thereby outputting an input voltage digital signal corresponding to the input voltage. The input voltage digital signal controls controller coefficients for use in the digital control.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: October 8, 2013
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Masahiro Sasaki, Tetsuya Kawashima
  • Publication number: 20130257517
    Abstract: A current-voltage conversion circuit of a current correcting unit having a current detecting terminal connected to a sense terminal of a power semiconductor device converts a sense current into a voltage and detects the voltage. A temperature detecting unit detects the ambient temperature of the power semiconductor device, and a correction unit performs a predetermined operation for correcting a characteristic difference due to the temperature on the basis of the detected temperature and outputs a control signal to a variable voltage source. The variable voltage source changes an output voltage on the basis of the output control signal and adjusts the potential of the sense terminal of the power semiconductor device on the basis of the changed voltage value. In this way, the characteristic difference between a main region and a sense region of the power semiconductor device is corrected.
    Type: Application
    Filed: June 5, 2012
    Publication date: October 3, 2013
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Tetsuya Kawashima
  • Patent number: 8445669
    Abstract: The present invention provides a process for producing 2?,3?-didehydro-3?-deoxy-4?-ethynylthymidine, which is useful as a medicine, in an efficient and industrially advantageous manner, and more specifically, provides a process for producing 2?,3?-didehydro-3?-deoxy-4?-ethynylthymidine as shown below. (wherein R1 and R2 independently represent a protective group for a hydroxy group, or R1 and R2 together form a protective group for two hydroxy groups, R3 and R4 independently represent a protective group for a hydroxy group, R5 represents a protective group for a hydroxy group, R6 represents a protective group for a hydroxy group, X represents a leaving group, and Y represents a halogen atom.
    Type: Grant
    Filed: April 10, 2009
    Date of Patent: May 21, 2013
    Assignee: Hamari Chemicals, Ltd.
    Inventors: Tatsunori Sato, Tetsuya Kawashima, Toshio Miwa, Kazutoyo Dokei, Chikoto Fujimoto
  • Patent number: 8441242
    Abstract: A fully integrated DC-DC converter utilizes digitally controlled dual output stages to achieve fast load transient recovery is presented. The DC-DC converter includes a main converter output stage connected in parallel with an auxiliary output stage. The main output stage is responsible for steady-state operation and is designed to achieve high conversion efficiency using large inductor and power transistors with low on-resistance. The auxiliary stage is responsible for transient suppression and is only active when a load transient occurs. The auxiliary output stage performs well with inductor and power transistors much smaller than those of the main switching stage and thus achieves well balanced power conversion efficiency and dynamic performance with a much smaller area penalty than previously described dual-output-stage converters.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: May 14, 2013
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Wai Tung Ng, Jing Wang, Kendy Ng, Haruhiko Nishio, Masahiro Sasaki, Tetsuya Kawashima
  • Patent number: 8422261
    Abstract: A semiconductor device capable of reducing an inductance is provided. In the semiconductor device in which a rectification MOSFET, a commutation MOSFET, and a driving IC that drives these MOSFETs are mounted on one package, the rectification MOSFET, a metal plate, and the commutation MOSFET are laminated. A current of a main circuit flows from a back surface of the package to a front surface thereof. The metal plate is connected to an output terminal via a wiring in the package. Wire bondings are used for wirings for connecting the driving IC, the rectification MOSFET, and the commutation MOSFET, all terminals being placed on the same plane. For this reason, the inductance becomes small and also a power source loss and a spike voltage are reduced.
    Type: Grant
    Filed: July 13, 2012
    Date of Patent: April 16, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Takayuki Hashimoto, Nobuyoshi Matsuura, Masaki Shiraishi, Yukihiro Satou, Tetsuya Kawashima
  • Patent number: 8421430
    Abstract: A digital control switching power supply unit includes an A/D converter circuit having a delay line circuit that has a delay element array whose delay time is controlled by a bias current, and that converts a current value into a digital signal using a signal transmission delay time, a phase difference detector circuit that detects a phase difference between a switching cycle and an A/D conversion cycle, a charge pump circuit that generates a control voltage in accordance with the phase difference, and a bias current indicator circuit that determines a bias current in accordance with an output voltage of the charge pump circuit and a result of a comparison of a detected value of the output voltage and a reference voltage, wherein the digital control switching power supply unit controls in such a way that the A/D conversion cycle is synchronized with the switching cycle.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: April 16, 2013
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Masahiro Sasaki, Tetsuya Kawashima
  • Publication number: 20120273892
    Abstract: The electrical characteristics of a semiconductor device are enhanced. In the package of the semiconductor device, there are encapsulated first and second semiconductor chips with a power MOS-FET formed therein and a third semiconductor chip with a control circuit for controlling their operation formed therein. The bonding pads for source electrode of the first semiconductor chip on the high side are electrically connected to a die pad through a metal plate. The bonding pad for source electrode of the second semiconductor chip on the low side is electrically connected to lead wiring through a metal plate. The metal plate includes a first portion in contact with the bonding pad of the second semiconductor chip, a second portion extended from a short side of the first portion to the lead wiring, and a third portion extended from a long side of the first portion to the lead wiring.
    Type: Application
    Filed: July 11, 2012
    Publication date: November 1, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Tomoaki UNO, Nobuyoshi MATSUURA, Yukihiro SATO, Keiichi OKAWA, Tetsuya KAWASHIMA, Kisho ASHIDA
  • Publication number: 20120273893
    Abstract: A semiconductor device capable of reducing an inductance is provided. In the semiconductor device in which a rectification MOSFET, a commutation MOSFET, and a driving IC that drives these MOSFETs are mounted on one package, the rectification MOSFET, a metal plate, and the commutation MOSFET are laminated. A current of a main circuit flows from a back surface of the package to a front surface thereof. The metal plate is connected to an output terminal via a wiring in the package. Wire bondings are used for wirings for connecting the driving IC, the rectification MOSFET, and the commutation MOSFET, all terminals being placed on the same plane. For this reason, the inductance becomes small and also a power source loss and a spike voltage are reduced.
    Type: Application
    Filed: July 13, 2012
    Publication date: November 1, 2012
    Inventors: Takayuki Hashimoto, Nobuyoshi Matsuura, Masaki Shiraishi, Yukihiro Satou, Tetsuya Kawashima
  • Patent number: RE43663
    Abstract: In the semiconductor device, a control power MOSFET chip 2 is disposed on the input-side plate-like lead 5, and the drain terminal DT1 is formed on the rear surface of the chip 2, and the source terminal ST1 and gate terminal GT1 are formed on the principal surface of the chip 2, and the source terminal ST1 is connected to the plate-like lead for source 12. Furthermore, a synchronous power MOSFET chip 3 is disposed on the output-side plate-like lead 6, and the drain terminal DT2 is formed on the rear surface of the chip 3 and the output-side plate-like lead 6 is connected to the drain terminal DT2. Furthermore, source terminal ST2 and gate terminal GT2 are formed on the principal surface of the synchronous power MOSFET chip 3, and the source terminal ST2 is connected to the plate-like lead for source 13. The plate-like leads for source 12 and 13 are exposed, and therefore, it is possible to increase the heat dissipation capability of the MCM 1.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: September 18, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Tetsuya Kawashima, Akira Mishima