Abstract: An assembly of a liner and a flange for a vertical furnace for processing substrates is provided. The liner being configured to extend in the interior of a process tube of the vertical furnace, and the flange is configured to at least partially close a liner opening. The liner comprising a substantially cylindrical wall delimited by the liner opening at a lower end and closed at a higher end and being substantially closed for gases above the liner opening and defining an inner space. The flange comprising: an inlet opening configured to insert and remove a boat configured to carry substrates in the inner space of the liner; a gas inlet to provide a gas to the inner space. The assembly is constructed and arranged with a gas exhaust opening to remove gas from the inner space and a space between the liner and the low pressure tube.

Abstract: A vertical furnace processing system for processing semiconductor substrates, comprising the following modules: —a processing module including a vertical furnace; an I/O-station module including at least one load port to which a substrate cassette is dockable; a wafer handling module configured to transfer semiconductor substrates between the processing module and a substrate cassette docked to the load port of the I/O-station module; and a gas supply module including at least one gas supply or gas supply connection for providing the vertical furnace of the processing module with process gas, wherein at least two of the said modules are mutually decouplably coupled, such that said at least two modules are decouplable from one another to facilitate servicing of the system, and in particular the vertical furnace thereof.

Abstract: In some embodiments, silicon-filled openings are formed having no or a low occurrence of voids in the silicon fill, while maintaining a smooth exposed silicon surface. In some embodiments, an opening in a substrate may be filled with silicon, such as amorphous silicon. The deposited silicon may have interior voids. This deposited silicon is then exposed to a silicon mobility inhibitor, such as an oxygen-containing species and/or a semiconductor dopant. The deposited silicon fill is subsequently annealed. After the anneal, the voids may be reduced in size and, in some embodiments, this reduction in size may occur to such an extent that the voids are eliminated.

Abstract: In some embodiments, a reactive curing process may be performed by exposing a semiconductor substrate in a process chamber to an ambient containing hydrogen peroxide, with the pressure in the process chamber at about 300 Torr or less. In some embodiments, the residence time of hydrogen peroxide molecules in the process chamber is about five minutes or less. The curing process temperature may be set at about 500° C. or less. The curing process may be applied to cure flowable dielectric materials and may provide highly uniform curing results, such as across a batch of semiconductor substrates cured in a batch process chamber.

Abstract: In some embodiments, silicon-filled openings are formed having no or a low occurrence of voids in the silicon fill, while maintaining a smooth exposed silicon surface. In some embodiments, an opening in a substrate may be filled with silicon, such as amorphous silicon. The deposited silicon may have interior voids. This deposited silicon is then exposed to a silicon mobility inhibitor, such as an oxygen-containing species and/or a semiconductor dopant. The deposited silicon fill is subsequently annealed. After the anneal, the voids may be reduced in size and, in some embodiments, this reduction in size may occur to such an extent that the voids are eliminated.

Abstract: In some embodiments, a reactive curing process may be performed by exposing a semiconductor substrate in a process chamber to an ambient containing hydrogen peroxide, with the pressure in the process chamber at about 300 Torr or less. In some embodiments, the residence time of hydrogen peroxide molecules in the process chamber is about five minutes or less. The curing process temperature may be set at about 500° C. or less. The curing process may be applied to cure flowable dielectric materials and may provide highly uniform curing results, such as across a batch of semiconductor substrates cured in a batch process chamber.

Abstract: In some embodiments, an oxide layer is grown on a semiconductor substrate by oxidizing the semiconductor substrate by exposure to hydrogen peroxide at a process temperature of about 500° C. or less. The exposure to the hydrogen peroxide may continue until the oxide layer grows by a thickness of about 1 ? or more. Where the substrate is a germanium substrate, while oxidation using H2O has been found to form germanium oxide with densities of about 4.25 g/cm3, oxidation according to some embodiments can form an oxide layer with a density of about 6 g/cm3 or more (for example, about 6.27 g/cm3). In some embodiments, another layer of material is deposited directly on the oxide layer. For example, a dielectric layer may be deposited directly on the oxide layer.

Abstract: A semiconductor processing apparatus is described. The semiconductor processing apparatus includes a gas supply system. The gas supply system has at least one gas supply unit including a process gas source, a gas distribution manifold having an annular gas distribution conduit provided with an inlet and valved outlets; and a gas supply conduit fluidly connecting the process gas source to the inlet of the gas distribution manifold. The semiconductor processing apparatus also includes a plurality of reactors, each fluidly connected to a respective valved outlet of the gas distribution manifold, such that process gas from the process gas source of the at least one gas supply unit is selectively suppliable to a respective reactor via the gas supply conduit, the gas distribution manifold, and a respective valved outlet. A method of providing a plurality of reactors with process gas is also described.

Abstract: In some embodiments, silicon-filled openings are formed having no or a low occurrence of voids in the silicon fill, while maintaining a smooth exposed silicon surface. In some embodiments, an opening in a substrate may be filled with silicon, such as amorphous silicon. The deposited silicon may have interior voids. This deposited silicon is then exposed to a silicon mobility inhibitor, such as an oxygen-containing species and/or a semiconductor dopant. The deposited silicon fill is subsequently annealed. After the anneal, the voids may be reduced in size and, in some embodiments, this reduction in size may occur to such an extent that the voids are eliminated.

Abstract: An assembly of a liner and a support flange for a vertical furnace for processing wafers, wherein the support flange is configured for supporting the liner, at least two support members that are connected to the cylindrical wall, each having a downwardly directed supporting surface, wherein each downwardly directed supporting surface is positioned radially outwardly from the inner cylindrical surface, wherein the support flange and/or the liner are configured such that, when the liner is placed on the support flange, the downwardly directed supporting surfaces are in contact with an upper surface of the support flange and support the liner, and wherein at least the part of the lower end surface of the liner that bounds the inner cylindrical surface is spaced apart from the upper surface of the support flange.

Abstract: In some embodiments, silicon-filled openings are formed having no or a low occurrence of voids in the silicon fill, while maintaining a smooth exposed silicon surface. In some embodiments, an opening in a substrate may be filled with silicon, such as amorphous silicon. The deposited silicon may have interior voids. This deposited silicon is then exposed to a silicon mobility inhibitor, such as an oxygen-containing species and/or a semiconductor dopant. The deposited silicon fill is subsequently annealed. After the anneal, the voids may be reduced in size and, in some embodiments, this reduction in size may occur to such an extent that the voids are eliminated.

Abstract: In some embodiments, silicon-filled openings are formed having no or a low occurrence of voids in the silicon fill, while maintaining a smooth exposed silicon surface. In some embodiments, an opening in a substrate may be filled with silicon, such as amorphous silicon. The deposited silicon may have interior voids. This deposited silicon is then exposed to a silicon mobility inhibitor, such as an oxygen-containing species and/or a semiconductor dopant. The deposited silicon fill is subsequently annealed. After the anneal, the voids may be reduced in size and, in some embodiments, this reduction in size may occur to such an extent that the voids are eliminated.

Abstract: In some embodiments, a reactive curing process may be performed by exposing a semiconductor substrate in a process chamber to an ambient containing hydrogen peroxide, with the pressure in the process chamber at about 300 Torr or less. In some embodiments, the residence time of hydrogen peroxide molecules in the process chamber is about five minutes or less. The curing process temperature may be set at about 500° C. or less. The curing process may be applied to cure flowable dielectric materials and may provide highly uniform curing results, such as across a batch of semiconductor substrates cured in a batch process chamber.

Abstract: A semiconductor processing assembly, comprising at least one semiconductor processing system and a substrate cassette stocker with stocker positions that are at least partially disposed within a footprint of the at least one semiconductor processing system. The semiconductor processing system also includes a local substrate cassette transport system for exchanging substrate cassettes with a global cassette transport system of a processing facility. The local substrate cassette transport system transports cassettes between its substrate cassette exchange station and the stocker positions. Also disclosed is a semiconductor processing facility, having a clean room bay area and a clean room chase area, disposed adjacent to the clean room bay area and separated therefrom by a clean room bounding wall.

Abstract: A vertical furnace processing system for processing semiconductor substrates, comprising the following modules:—a processing module including a vertical furnace; an I/O-station module including at least one load port to which a substrate cassette is dockable; a wafer handling module configured to transfer semiconductor substrates between the processing module and a substrate cassette docked to the load port of the I/O-station module; and a gas supply module including at least one gas supply or gas supply connection for providing the vertical furnace of the processing module with process gas, wherein at least two of the said modules are mutually decouplably coupled, such that said at least two modules are decouplable from one another to facilitate servicing of the system, and in particular the vertical furnace thereof.

Abstract: A wafer boat for accommodating semiconductor wafers comprises two side rods and at least one back rod, the rods being vertically oriented and extending between a top member and a bottom member. The rods comprise vertically spaced recesses formed at corresponding heights, recesses at the same height defining a wafer accommodation for receiving and supporting a wafer in a substantially horizontal orientation, the recesses having an improved shape. The upwardly facing surfaces of the recesses comprise a first flat surface in an inward region of the recess which is horizontal or inclined upward in an outward direction of the recess and a second flat surface in an outer region of the recess which is inclined downward in an outward direction of the recess. The intersection of the first and second surface forming an edge for supporting the wafer. The recesses are easy to machine and prevent damage to the wafer.

Abstract: In some embodiments, a system is disclosed for delivering hydrogen peroxide to a semiconductor processing chamber. The system includes a process canister for holding a H2O2/H2O mixture in a liquid state, an evaporator provided with an evaporator heater, a first feed line for feeding the liquid H2O2/H2O mixture to the evaporator, and a second feed line for feeding the evaporated H2O2/H2O mixture to the processing chamber, the second feed line provided with a second feed line heater. The evaporator heater is configured to heat the evaporator to a temperature lower than 120° C. and the second feed line heater is configured to heat the feed line to a temperature equal to or higher than the temperature of the evaporator.

Abstract: Disclosed is a modular semiconductor substrate processing system (1), including a plurality of independently operable substrate processing units (100). Each unit (100) comprises a reactor module (104) and a substrate transfer module (102). Within the system (1), the substrate transfer modules (102) of the different units (100) are serially interconnected such that substrates (116) may be exchanged between them. Exchange of substrates (116) between neighboring processing units (100) is facilitated by a shared substrate hand-off station (130) that is associated with each pair of neighboring processing units. The actual transfer of substrates is performed by a substrate handling robot (122), which may preferably be of the SCARA-type.

Abstract: A semiconductor substrate processing apparatus (1), comprising a substrate support assembly (30), including a substrate support (32) defining an outer support surface (34) for supporting a substrate or substrate carrier (24) thereon, and a heater (50) comprising a heat dissipating portion (54) that is disposed within the substrate support (32) and that extends underneath and substantially parallel to the support surface (34), said substrate support (32) being rotatably mounted around a rotation axis (L) that extends through said support surface (34), such that the support surface (34) is rotatable relative to the heat dissipating portion (54) of the heater (50).

Abstract: A semiconductor processing apparatus (1), comprising: a gas supply system (2), comprising at least one gas supply unit (100) including: a process gas source (110); a gas distribution manifold (150), including an annular gas distribution conduit (152) provided with an inlet (154) and a plurality of valved outlets (156a-c); a gas supply conduit (130, 132) fluidly connecting the process gas source (110) to the inlet (154) of the gas distribution manifold (150); a plurality of reactors (4a-c), each fluidly connected to a respective valved outlet (156a-c) of the gas distribution manifold (150), such that process gas from the process gas source (110) of the at least one gas supply unit (100) is selectively suppliable to a respective reactor of said plurality of reactors (4a-c) via the gas supply conduit (130, 132), the gas distribution manifold (150), and a respective valved outlet (156a-c).