Abstract: One embodiment provides an integrated circuit including a first non-planar structure and a waveguide configured to provide electromagnetic waves to the first non-planar structure. The first non-planar structure provides a first signal in response to at least some of the electromagnetic waves.

Abstract: The invention relates to a high strength multi-phase steel for a cold- or hot-rolled steel strip having excellent forming properties, in particular for light vehicle construction, comprising the elements (contents in mass %): C 0.060 to=0.115; Al 0.020 to=0.060; Si 0.100 to=0.500; Mn 1.300 to=2.500; P=0.025; S=0.0100; Cr 0.280 to=0.480; Mo<0.150; Ti=0.005 to=0.050; Nb=0.005 to=0.050; B=0.0005 to=0.0060; N=0.0100; the remainder being iron including the usual elements present in steel and which are not mentioned above.

Abstract: A safened herbicidal composition for use, for example, in wheat or barley, comprising a herbicidally effective amount of (a) a compound of formula (I): or an agriculturally acceptable salt or ester thereof and (b) a safener, for example, from the quinolinyloxyacetate family of chemicals, including, but not limited to, cloquintocet mexyl, provide weed control of undesirable vegetation.

Abstract: An explanation is given of, inter alia, tunnel field effect transistors having a thicker gate dielectric (GD1) in comparison with other transistors (T2) on the same integrated circuit arrangement (10). As an alternative or in addition, said tunnel field effect transistors have gate regions at mutually remote sides of a channel forming region or an interface between the connection regions (D1, S1) of the tunnel field effect transistor.

Abstract: The invention relates to a method for the controlled operation of an industrial oven which is heated in a regenerative manner and which comprises an oven chamber, in particular a melting tank, in particular for glass, having the following steps: injecting fuel into the oven chamber via at least one fuel injector, which is designed to inject fuel, practically without combustion air in particular, conducting combustion air to the oven chamber in a first period duration and conducting exhaust gas (AG) out of the oven chamber in a second period duration separately from the fuel in a periodically alternating manner by means of a left regenerator and right regenerator which are associated with the at least one fuel injector and which are designed to regeneratively store heat from the exhaust gas and transmit heat to the combustion air. A supply of the combustion air is automatically controlled by means of a control loop.

Abstract: A device is provided with at least one control element that can be used to trigger a switching process for electrical or mechanical installations. The control element is positioned in a device housing for the device, such that the control element is designed as a snap disk, which is made of metal, and such that the snap disk has a rim which is connected to the device housing through material engagement and which forms a seal between the device housing and the control element, such that an area of the snap disk that borders the rim is designed as a reversibly deformable uncoupling area.

Abstract: The present invention relates to compositions and methods for inhibiting or suppressing undifferentiated or pluripotent stem cell growth and proliferation in a differentiated or differentiating cell population or culture.

Abstract: A device (1) for stabilising a supply voltage (UBatt) in a motor vehicle, having a function component of the motor vehicle, in particular in the form of a starter (4), a voltage source (10) which is connected to the function component (4) in order to supply the function component (4) with the supply voltage (UBatt) characterised in that the voltage source (10) is connected to the function component (4) via a resistor cascade (30) in order to stabilise the supply voltage (UBatt).

Abstract: Semiconductor devices and methods of manufacture thereof are disclosed. In a preferred embodiment, a method of manufacturing a semiconductor device includes forming a transistor, the transistor including a fin having a first side and a second side opposite the first side. The transistor includes a first gate electrode disposed on the first side of the fin and a second gate electrode disposed on the second side of the fin. The method includes forming a silicide or germanide of a metal on the first gate electrode and the second gate electrode of the transistor. The amount of the metal of the silicide or germanide is substantially homogeneous over the first gate electrode and the second gate electrode proximate the fin.

Abstract: In a method for producing a thyristor, first and second connection regions are formed on or above a substrate; the first connection region is doped with dopant atoms of a first conductivity type and the second connection region is doped with dopant atoms of a second conductivity type; first and second body regions are formed between the connection regions, wherein the first body region is formed between the first connection region and second body region, and the second body region is formed between the first body region and second connection region; the first body region is doped with dopant atoms of the second conductivity type and the second body region is doped with dopant atoms of the first conductivity type, wherein the dopant atoms are in each case introduced into the respective body region using a Vt implantation method; a gate region is formed on or above the body regions.

Abstract: In a method for producing a thyristor, first and second connection regions are formed on or above a substrate; the first connection region is doped with dopant atoms of a first conductivity type and the second connection region is doped with dopant atoms of a second conductivity type; first and second body regions are formed between the connection regions, wherein the first body region is formed between the first connection region and second body region, and the second body region is formed between the first body region and second connection region; the first body region is doped with dopant atoms of the second conductivity type and the second body region is doped with dopant atoms of the first conductivity type, wherein the dopant atoms are in each case introduced into the respective body region using a Vt implantation method; a gate region is formed on or above the body regions.

Abstract: A light barrier detects an object which interrupts a beam of light of the light barrier. A light transmitter transmits a light beam in the direction of a reflector and a light receiver receives a reflected portion of the light beam. The improved light barrier has a reflector which is made as a cylindrical reflector column having a plurality of retroreflecting elements aligned toward the outer surface. The diameter of the reflector column is considerably smaller than the extent of the light beam perpendicular to the cylinder axis so that an optically effective detection beam of light is formed between the sensor and the reflector column whose cross-section at the sensor is determined by the light transmitter and, in direct proximity to the reflector column. The cross-section is determined by the areal overlap of the light beam with the reflector column.

Abstract: Semiconductor devices and methods of manufacture thereof are disclosed. A complimentary metal oxide semiconductor (CMOS) device includes a PMOS transistor having at least two first gate electrodes comprising a first parameter, and an NMOS transistor having at least two second gate electrodes comprising a second parameter, wherein the second parameter is different than the first parameter. The first parameter and the second parameter may comprise the thickness or the dopant profile of the gate electrode materials of the PMOS and NMOS transistors. The first and second parameter of the at least two first gate electrodes and the at least two second gate electrodes establish the work function of the PMOS and NMOS transistors, respectively.

Abstract: In a method for producing an electronic component, a first doped connection region and a second doped connection region are formed on or above a substrate; a body region is formed between the first doped connection region and the second doped connection region; at least two gate regions separate from one another are formed on or above the body region; at least one partial region of the body region is doped by means of introducing dopant atoms, wherein the dopant atoms are introduced into the at least one partial region of the body region through at least one intermediate region formed between the at least two separate gate regions.

Abstract: Semiconductor devices and methods of manufacture thereof are disclosed. A complimentary metal oxide semiconductor (CMOS) device includes a PMOS transistor having at least two first gate electrodes comprising a first parameter, and an NMOS transistor having at least two second gate electrodes comprising a second parameter, wherein the second parameter is different than the first parameter. The first parameter and the second parameter may comprise the thickness or the dopant profile of the gate electrode materials of the PMOS and NMOS transistors. The first and second parameter of the at least two first gate electrodes and the at least two second gate electrodes establish the work function of the PMOS and NMOS transistors, respectively.

Abstract: In a method for suppressing interference in a controlled variable in a control circuit, in which the actuating variable is the useful signal, the controlled variable is detected continuously, at two successive sampling instants in each case, the values of the controlled variable are subtracted, and if the absolute amount of the difference deviates by a predefinable setpoint value, at least one control parameter is modified, in such a way that the response of the actuating variable to the interference is minimized.

Abstract: Semiconductor devices and methods of manufacture thereof are disclosed. In a preferred embodiment, a method of manufacturing a semiconductor device includes forming a transistor, the transistor including a fin having a first side and a second side opposite the first side. The transistor includes a first gate electrode disposed on the first side of the fin and a second gate electrode disposed on the second side of the fin. The method includes forming a silicide or germanide of a metal on the first gate electrode and the second gate electrode of the transistor. The amount of the metal of the silicide or germanide is substantially homogeneous over the first gate electrode and the second gate electrode proximate the fin.

Abstract: The invention relates to a potential distribution system for motor vehicles, which makes provision for a reserve on contact bars of an excess number of connection possibilities for further outlets. The connection possibilities which are not required can be closed off with a blanking plug and the connection possibilities which are required are brought in contact by means of an intermediate element, wherein the intermediate element can be designed as a fuse box or as an intermediate plug with integrated fuses.

Abstract: Semiconductor devices and methods of manufacture thereof are disclosed. In a preferred embodiment, a method of manufacturing a semiconductor device includes forming a transistor, the transistor including a fin having a first side and a second side opposite the first side. The transistor includes a first gate electrode disposed on the first side of the fin and a second gate electrode disposed on the second side of the fin. The method includes forming a silicide or germanide of a metal on the first gate electrode and the second gate electrode of the transistor. The amount of the metal of the silicide or germanide is substantially homogeneous over the first gate electrode and the second gate electrode proximate the fin.

Abstract: An integrated circuit arrangement contains an insulating region, which is part of a planar insulating layer, and a capacitor which contains: near and far electrode regions near and remote from the insulating region and a dielectric region. The capacitor and an active component are on the same side of the insulating layer, and the near electrode region and an active region of the component are planar and parallel to the insulating layer. The near electrode region is monocrystalline and contains multiple webs.