Patents by Inventor Tim J. Corbett
Tim J. Corbett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20030080770Abstract: A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical test equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical test are completed. After burn-in stress and electrical testing, it is possible to establish interconnection between the single die or separate and package dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.Type: ApplicationFiled: December 11, 2002Publication date: May 1, 2003Inventors: Alan G. Wood, Tim J. Corbett
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Patent number: 6538264Abstract: A semiconductor test chip including a plurality of test functions. The test functions of the semiconductor test chip include bond pad pitch and size effects on chip design, wire bond placement accuracy regarding placement of the wire bond on the bond pad, evaluation of bond pad damage (cratering) effect on the area of the chip below the bond pad during bonding of the wire on the bond pad, street width effects regarding the use of thinner saw cuts in cutting the individual chips from the wafer, thermal impedance effects for thermal testing capabilities, ion mobility evaluation capabilities and chip on board in flip chip application test capabilities.Type: GrantFiled: August 28, 2001Date of Patent: March 25, 2003Assignee: Micron Technology, Inc.Inventors: Tim J. Corbett, Raymond P. Scholer, Fernando Gonzalez
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Patent number: 6535012Abstract: A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical test equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical test are completed. After burn-in stress and electrical testing, it is possible to establish interconnection between the single die or separate and package dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.Type: GrantFiled: May 11, 2000Date of Patent: March 18, 2003Assignee: Micron Technology, Inc.Inventors: Alan G. Wood, Tim J. Corbett
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Patent number: 6461690Abstract: A laser marking apparatus and method for marking the surface of a semiconductor chip are described herein. A laser beam is directed to a location on the surface of the chip where a laser reactive material, such as a pigment containing epoxy, is present. The heat associated with the laser beam causes the laser reactive material to fuse to the surface of the chip, creating a visibly distinct mark in contrast to the rest of the surface of the chip. Only reactive material contacted by the laser fuses to the chip surface, and the remaining residue on the non-irradiated portion can be readily removed.Type: GrantFiled: April 3, 2001Date of Patent: October 8, 2002Assignee: Micron Technology, Inc.Inventor: Tim J. Corbett
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Publication number: 20020135670Abstract: A laser marking apparatus and method for marking the surface of a semiconductor chip are described herein. A laser beam is directed to a location on the surface of the chip where a laser reactive material, such as a pigment containing epoxy is present. The heat associated with the laser beam causes the laser reactive material to fuse to the surface of the chip creating a visibly distinct mark in contrast to the rest of the surface of the chip. Only reactive material contacted by the laser fuses to the chip surface, and the remaining residue on the non-irradiated portion can be readily removed.Type: ApplicationFiled: May 23, 2002Publication date: September 26, 2002Inventor: Tim J. Corbett
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Publication number: 20020132060Abstract: A laser marking apparatus and method for marking the surface of a semiconductor chip are described herein. A laser beam is directed to a location on the surface of the chip where a laser reactive material, such as a pigment containing epoxy, is present. The heat associated with the laser beam causes the laser reactive material to fuse to the surface of the chip, creating a visibly distinct mark in contrast to the rest of the surface of the chip. Only reactive material contacted by the laser fuses to the chip surface, and the remaining residue on the non-irradiated portion can be readily removed.Type: ApplicationFiled: May 2, 2002Publication date: September 19, 2002Inventor: Tim J. Corbett
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Patent number: 6429890Abstract: A laser marking apparatus and method for marking the surface of a semiconductor chip are described herein. A laser beam is directed to a location on the surface of the chip where a laser reactive material, such as a pigment containing epoxy is present. The heat associated with the laser beam causes the laser reactive material to fuse to the surface of the chip creating a visibly distinct mark in contrast to the rest of the surface of the chip. Only reactive material contacted by the laser fuses to the chip surface, and the remaining residue on the non-irradiated portion can be readily removed.Type: GrantFiled: August 29, 2001Date of Patent: August 6, 2002Assignee: Micron Technology, Inc.Inventor: Tim J. Corbett
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Publication number: 20020070742Abstract: A reusable bum-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical test equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical test are completed. After bum-in stress and electrical test, it is possible to establish interconnection between the single die or separate and package dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.Type: ApplicationFiled: February 1, 2002Publication date: June 13, 2002Inventors: Alan G. Wood, Tim J. Corbett
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Publication number: 20020030732Abstract: A laser marking apparatus and method for marking the surface of a semiconductor chip are described herein. A laser beam is directed to a location on the surface of the chip where a laser reactive material, such as a pigment containing epoxy is present. The heat associated with the laser beam causes the laser reactive material to fuse to the surface of the chip creating a visibly distinct mark in contrast to the rest of the surface of the chip. Only reactive material contacted by the laser fuses to the chip surface, and the remaining residue on the non-irradiated portion can be readily removed.Type: ApplicationFiled: August 29, 2001Publication date: March 14, 2002Inventor: Tim J. Corbett
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Publication number: 20020024046Abstract: A semiconductor test chip including a plurality of test functions. The test functions of the semiconductor test chip include bond pad pitch and size effects on chip design, wire bond placement accuracy regarding placement of the wire bond on the bond pad, evaluation of bond pad damage (cratering) effect on the area of the chip below the bond pad during bonding of the wire on the bond pad, street width effects regarding the use of thinner saw cuts in cutting the individual chips from the wafer, thermal impedance effects for thermal testing capabilities, ion mobility evaluation capabilities and chip on board in flip chip application test capabilities.Type: ApplicationFiled: August 28, 2001Publication date: February 28, 2002Inventors: Tim J. Corbett, Raymond P. Scholer, Fernando Gonzalez
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Patent number: 6342789Abstract: A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical test equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical test are completed. After burn-in stress and electrical test, it is possible to establish interconnection between the single die or separate and package dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.Type: GrantFiled: December 14, 1998Date of Patent: January 29, 2002Assignee: Micron Technology, Inc.Inventors: Alan G. Wood, Tim J. Corbett
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Patent number: 6342912Abstract: A laser marking apparatus and method for marking the surface of a semiconductor chip are described herein. A laser beam is directed to a location on the surface of the chip where a laser reactive material, such as a pigment containing epoxy is present. The heat associated with the laser beam causes the laser reactive material to fuse to the surface of the chip creating a visibly distinct mark in contrast to the rest of the surface of the chip. Only reactive material contacted by the laser fuses to the chip surface, and the remaining residue on the non-irradiated portion can be readily removed.Type: GrantFiled: July 18, 2000Date of Patent: January 29, 2002Assignee: Micron Technology, Inc.Inventor: Tim J. Corbett
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Publication number: 20010055825Abstract: A laser marking apparatus and method for marking the surface of a semiconductor chip are described herein. A laser beam is directed to a location on the surface of the chip where a laser reactive material, such as a pigment containing epoxy, is present. The heat associated with the laser beam causes the laser reactive material to fuse to the surface of the chip, creating a visibly distinct mark in contrast to the rest of the surface of the chip. Only reactive material contacted by the laser fuses to the chip surface, and the remaining residue on the non-irradiated portion can be readily removed.Type: ApplicationFiled: August 13, 2001Publication date: December 27, 2001Inventor: Tim J. Corbett
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Patent number: 6320201Abstract: A semiconductor test chip including a plurality of test functions. The test functions of the semiconductor test chip include bond pad pitch and size effects on chip design, wire bond placement accuracy regarding placement of the wire bond on the bond pad, evaluation of bond pad damage (cratering) effect on the area of the chip below the bond pad during bonding of the wire on the bond pad, street width effects regarding the use of thinner saw cuts in cutting the individual chips from the wafer, thermal impedance effects for thermal testing capabilities, ion mobility evaluation capabilities and chip on board in flip chip application test capabilities.Type: GrantFiled: July 20, 2000Date of Patent: November 20, 2001Assignee: Micron Technology, Inc.Inventors: Tim J. Corbett, Raymond P. Scholer, Fernando Gonzalez
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Publication number: 20010010392Abstract: A laser marking apparatus and method for marking the surface of a semiconductor chip are described herein. A laser beam is directed to a location on the surface of the chip where a laser reactive material, such as a pigment containing epoxy, is present. The heat associated with the laser beam causes the laser reactive material to fuse to the surface of the chip, creating a visibly distinct mark in contrast to the rest of the surface of the chip. Only reactive material contacted by the laser fuses to the chip surface, and the remaining residue on the non-irradiated portion can be readily removed.Type: ApplicationFiled: April 3, 2001Publication date: August 2, 2001Inventor: Tim J. Corbett
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Patent number: 6217949Abstract: A laser marking apparatus and method for marking the surface of a semiconductor chip are described herein. A laser beam is directed to a location on the surface of the chip where a laser reactive material, such as a pigment containing epoxy, is present. The heat associated with the laser beam causes the laser reactive material to fuse to the surface of the chip, creating a visibly distinct mark in contrast to the rest of the surface of the chip. Only reactive material contacted by the laser fuses to the chip surface, and the remaining residue on the non-irradiated portion can be readily removed.Type: GrantFiled: July 26, 2000Date of Patent: April 17, 2001Assignee: Micron Technology, Inc.Inventor: Tim J. Corbett
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Patent number: 6157046Abstract: A semiconductor test chip including a plurality of test functions. The test functions of the semiconductor test chip include bond pad pitch and size effects on chip design, wire bond placement accuracy regarding placement of the wire bond on the bond pad, evaluation of bond pad damage (cratering) effect on the area of the chip below the bond pad during bonding of the wire on the bond pad, street width effects regarding the use of thinner saw cuts in cutting the individual chips from the wafer, thermal impedance effects for thermal testing capabilities, ion mobility evaluation capabilities and chip on board in flip chip application test capabilities.Type: GrantFiled: April 23, 1999Date of Patent: December 5, 2000Assignee: Micron Technology, Inc.Inventors: Tim J. Corbett, Raymond P. Scholer, Fernando Gonzalez
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Patent number: 6113992Abstract: A laser marking apparatus and method for marking the surface of a semiconductor chip are described herein. A laser beam is directed to a location on the surface of the chip where a laser reactive material, such as a pigment containing epoxy, is present. The heat associated with the laser beam causes the laser reactive material to fuse to the surface of the chip, creating a visibly distinct mark in contrast to the rest of the surface of the chip. Only reactive material contacted by the laser fuses to the chip surface, and the remaining residue on the non-irradiated portion can be readily removed.Type: GrantFiled: July 20, 1999Date of Patent: September 5, 2000Assignee: Micron Technology, Inc.Inventor: Tim J. Corbett
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Patent number: 6108026Abstract: A laser marking apparatus and method for marking the surface of a semiconductor chip are described herein. A laser beam is directed to a location on the surface of the chip where a laser reactive material, such as a pigment containing epoxy is present. The heat associated with the laser beam causes the laser reactive material to fuse to the surface of the chip creating a visibly distinct mark in contrast to the rest of the surface of the chip. Only reactive material contacted by the laser fuses to the chip surface, and the remaining residue on the non-irradiated portion can be readily removed.Type: GrantFiled: October 20, 1998Date of Patent: August 22, 2000Assignee: Micron Technology, Inc.Inventor: Tim J. Corbett
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Patent number: 6091254Abstract: A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical test equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical test are completed. After burn-in stress and electrical testing, it is possible to establish interconnection between the single die or separate and package dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.Type: GrantFiled: December 14, 1998Date of Patent: July 18, 2000Assignee: Micron Technology, Inc.Inventors: Alan G. Wood, Tim J. Corbett