Abstract: A reusable burn-in/test fixture for discrete TAB die consists of two halves. The first half of the test fixture contains cavity in which die is inserted. When the two halves are assembled, the fixture establishes electrical contact with the die and with a burn-in oven. The test fixture need not be opened until the burn-in and electrical test are completed. The fixture permits the die to be characterized prior to assembly.

Abstract: A reusable burn-in/test fixture for discrete TAB die consists of two halves. The first half of the test fixture contains cavity in which die is inserted. When the two halves are assembled, the fixture establishes electrical contact with the die and with a burn-in oven. The test fixture need not be opened until the burn-in and electrical test are completed. The fixture permits the die to be characterized prior to assembly.

Abstract: A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical test equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical test are completed. After burn-in stress and electrical testing, it is possible to establish interconnection between the single die or separate and package dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.

Abstract: A laser marking apparatus and method for marking the surface of a semiconductor chip are described herein. A laser beam is directed to a location on the surface of the chip where a laser reactive material, such as a pigment containing epoxy, is present. The heat associated with the laser beam causes the laser reactive material to fuse to the surface of the chip, creating a visibly distinct mark in contrast to the rest of the surface of the chip. Only reactive material contacted by the laser fuses to the chip surface, and the remaining residue on the non-irradiated portion can be readily removed.

Abstract: A method for attaching a semiconductor wafer section to a lead frame comprises a carrier having an outside surface and an adhesive coating the carrier. Prior to use, the structure can be placed onto spools for easy shipment and storage.

Abstract: A semiconductor test chip including a plurality test functions. The test functions of the semiconductor test chip include bond pad pitch and size effects on chip design, wire bond placement accuracy regarding placement of the wire bond on the bond pad, evaluation of bond pad damage (cratering) effect on the area of the chip below the bond pad during bonding of the wire on the bond pad, street width effects regarding the use of thinner saw cuts in cutting the individual chips from the wafer, thermal impedance effects for thermal testing capabilities, ion mobility evaluation capabilities and chip on board in flip chip application test capabilities.

Abstract: A multi-die encapsulation device has a plurality of die chambers. Each of the die chambers has parallel opposing walls, retaining edges which define an insertion void, and a retaining contact in contact with a printed circuit board. Each of the retaining contacts is characterized as having a compliant foot for making contact with a printed circuit board. The encapsulation device comprises a cap with a compression pad for protecting and biasing each of the bare die in its respective chamber.

Abstract: A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a die cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical test equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical test are completed. After burn-in stress and electrical test, it is possible to establish interconnection between the single die separate and package the dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.

Abstract: A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical test equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical test are completed. After burn-in stress and electrical test, it is possible to establish interconnection between the single die or separate and package the dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.

Abstract: A laser marking apparatus and method for marking the surface of a semiconductor chip are described herein. A laser beam is directed to a location on the surface of the chip where a laser reactive material, such as a pigment containing epoxy is present. The heat associated with the laser beam causes the laser reactive material to fuse to the surface of the chip creating a visibly distinct mark in contrast to the rest of the surface of the chip. Only reactive material contacted by the laser fuses to the chip surface, and the remaining residue on the non-irradiated portion can be readily removed.

Abstract: A die contacting substrate for establishing ohmic contact with the die is formed with raised portions on contact members. The raised portions are dimensioned so that a compression force applied to the die against the substrate results in a limited penetration of the contact member into the bondpads. In the preferred embodiment, the substrate is formed of semiconductor material, with the raised portion being formed by etching. The arrangement may be used for establishing temporary electrical contact and with a burn-in oven and with a discrete die tester. This permits the die to be characterized prior to assembly, so that the die may then be transferred in an unpackaged form. A Z-axis anisotropic conductive interconnect material may be interposed between the die attachment surface and the die.

Abstract: Disclosed is an encapsulation device for bare die. The encapsulation device includes chambers having parallet walls, an insertion void, and a spring retention electrical contact having a compliant foot and comprises a cap having a compression pad. The encapsulation device of the invention provides a reliable contact between the die and a mounting board via the compliant foot. The insertion void allows for a safe insertion of a die into a chamber of the encapsulation device. The compression pad and the spring retention electrical contact provide positive retainment of the bare die within the encapsulation device.

Abstract: A semiconductor test chip including a plurality of test functions. The test functions of the semiconductor test chip include bond pad pitch and size effects on chip design, wire bond placement accuracy regarding placement of the wire bond on the bond pad, evaluation of bond pad damage (cratering) effect on the area of the chip below the bond pad during bonding of the wire on the bond pad, street width effects regarding the use of thinner saw cuts in cutting the individual chips from the wafer, thermal impedance effects for thermal testing capabilities, ion mobility evaluation capabilities and chip on board in flip chip application test capabilities.

Abstract: A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a die cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical test equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical test are completed. After burn-in stress and electrical test, it is possible to establish interconnection between the single die or separate and package the dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.

Abstract: A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a die cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical test equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical test are completed. After burn-in stress and electrical test, it is possible to establish interconnection between the single dice or separate and package the dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.

Abstract: A method for attaching a semiconductor wafer section to a lead free comprises a carrier having an outside surface and an adhesive coating the carrier. Prior to use, the structure can be placed onto spools for easy shipment and storage.

Abstract: A process for forming die contacting substrate for establishing ohmic contact with the die is formed with raised portions on contact members. The raised portions are dimensioned so that a compression force applied to the die against the substrate results in a limited penetration of the contact member into the bondpads. In the preferred embodiment, the substrate is formed of semiconductor material, with the raised portions being formed by etching. The arrangement may be used for establishing temporary electrical contact with a burn-in oven and with a discrete die tester. This permits the die to be characterized prior to assembly, so that the die may then be transferred in an unpackaged form. A Z-axis anisotropic conductive interconnect material may be interposed between the die attachment surface and the die.

Abstract: A structure for attaching a semiconductor wafer section to a lead frame comprises a carrier having an outside surface and an adhesive coating the carrier. Prior to use, the structure can be placed onto spools for easy shipment and storage.

Abstract: A leadframe interconnect package is tape automated bond (TAB) bonded to circuitry on the chip and which provides a circuit connection for subsequent connection to a printed circuit board. The encapsulated chips will replace both the leadframe and printed circuit board (electrical only) as we now know it in the conventional SIMM module.

Abstract: A logic module design is disclosed which incorporates an unencapsulated wafer section or sections. The disclosed module is an improvement over previous designs in that it is less expensive and easier to manufacture due to the reduced number of components and the complexity of the components, is faster and consumes less power because of its shorter trace lengths and smaller size, and is more reliable as a result of its greatly reduced number of interconnects.