Patents by Inventor Tomohiko Yamamoto

Tomohiko Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7982851
    Abstract: An amount is flare is measured by a method including steps of applying a photosensitive material to a substrate; exposing a part of the photosensitive material using a mask including a transmitting section which has no pattern so that the part of the photosensitive material varies in thickness; and measuring an amount of flare based on a distribution of film amounts of the photosensitive material remaining in a first region corresponding to the transmitting section and on a second region other than the first region after the step of exposing.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: July 19, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Tomohiko Yamamoto
  • Publication number: 20110157262
    Abstract: In a method of controlling power of a light emitting device for image display that irradiates illumination light from divided regions, light emission brightness data of each light emitting element of the light emitting device is determined based on image data for image display (S20). Power in each region and total light emission power are computed based on the light emission brightness data of each light emitting element for each region (S40). If the computed total light emission power exceeds predetermined allowable power, the power in each region is limited so that the total light emission power is equal to or less than the predetermined allowable power (S50).
    Type: Application
    Filed: July 17, 2009
    Publication date: June 30, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Kohji Fujiwara, Takayuki Mueai, Tomohiko Yamamoto
  • Patent number: 7952696
    Abstract: An exposure measurement apparatus is configured by including a size measurer measuring respective sizes of at least a pair of transferred patterns having mutually different optimal focus positions out of a plurality of transferred patterns formed by being transferred onto a transfer object, a difference value calculator obtaining a difference value between the size of one transferred pattern and the size of the other transferred pattern, a focus variation amount calculator calculating a focus variation amount of the transfer object using the difference value, and an exposure variation amount calculator calculating an exposure error amount of a wafer.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: May 31, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Tomohiko Yamamoto
  • Patent number: 7944521
    Abstract: A display apparatus includes a liquid crystal display panel, a front side viscoelastic layer, a front side hard layer, a back side viscoelastic layer, a back side hard layer, a backlight unit, a driving circuit board, and a metal plate. The front side viscoelastic layer that is viscoelastic covers a display surface of the liquid crystal display panel. The front side hard layer has a higher modulus of elasticity than the front side viscoelastic layer. The back side viscoelastic layer that is viscoelastic covers a back surface of the liquid crystal display panel. The back side hard layer has a higher modulus of elasticity than the back side viscoelastic layer. The back side viscoelastic layer has a thickness Tb of not less than about 20 ?m, and the front side viscoelastic layer has a thickness Ta and satisfies: Ta/Tb>1 (Tb?0).
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: May 17, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hideki Ichioka, Tomohiko Yamamoto
  • Patent number: 7944520
    Abstract: A liquid crystal display apparatus includes a liquid crystal display panel, a backlight system, a driving circuit board for driving the liquid crystal display panel and the backlight system, and a housing for housing the foregoing members. A metal plate is provided between the backlight system and the driving circuit board, which metal plate has a plane surface on a front and back surface which is broader than the backlight system and the driving circuit board. On at least a pair of opposed edges of the metal plate, at least one of a falling portion and a rising portion is provided along the edges of the metal plate. Further, a bezel is provided between the housing and at least one of the falling portion and rising portion, which bezel is arranged so as to integrally support the metal plate and at least the liquid crystal display panel and the backlight system.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: May 17, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hideki Ichioka, Tomohiko Yamamoto
  • Publication number: 20110043783
    Abstract: Exposure for performing patterning in which micropatterns differing in pitch exist in close vicinity to one another is handled, and micropatterns are formed with high accuracy with sufficient manufacture process margins without using a photomask complicated in manufacturing process at high manufacture cost like an alternating phase shift mask. A light intensity distribution of irradiation light constituted of double pole illuminations is formed to correspond to L&S patterns. The double pole illumination is constituted of a pair of illumination modes, and the double pole illumination is constituted of a pair of illumination modes.
    Type: Application
    Filed: November 1, 2010
    Publication date: February 24, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Tomohiko Yamamoto
  • Patent number: 7847918
    Abstract: Exposure for performing patterning in which micropatterns differing in pitch exist in close vicinity to one another is handled, and micropatterns are formed with high accuracy with sufficient manufacture process margins without using a photomask complicated in manufacturing process at high manufacture cost like an alternating phase shift mask. A light intensity distribution of irradiation light constituted of double pole illuminations is formed to correspond to L&S patterns. The double pole illumination is constituted of a pair of illumination modes, and the double pole illumination is constituted of a pair of illumination modes.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: December 7, 2010
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Tomohiko Yamamoto
  • Publication number: 20100271565
    Abstract: An illumination device includes an LED package, an LED driver including an FET, and a thermistor disposed on a substrate. A plurality of such LED packages are disposed on the substrate such that a first area and a second area, each determined by vertices corresponding to LED packages, are defined on the substrate. The thermistor is disposed in the first area, and the FET is disposed in the second area, which is outside of the first area. The thermistor detects a temperature in the first area. Such a configuration allows the thermistor to detect, in accordance with the temperature in the area, the temperature of heat transferred from the LED packages, without being affected by heat generated by the FET. This makes it possible to efficiently make temperature corrections to stabilize color temperature and luminance.
    Type: Application
    Filed: July 2, 2008
    Publication date: October 28, 2010
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Shinji Suminoe, Tomohiko Yamamoto, Akira Tomiyoshi, Naoto Inoue
  • Publication number: 20100177259
    Abstract: A display apparatus includes a liquid crystal display panel, a front side viscoelastic layer, a front side hard layer, a back side viscoelastic layer, a back side hard layer, a backlight unit, a driving circuit board, and a metal plate. The front side viscoelastic layer that is viscoelastic covers a display surface of the liquid crystal display panel. The front side hard layer has a higher modulus of elasticity than the front side viscoelastic layer. The back side viscoelastic layer that is viscoelastic covers a back surface of the liquid crystal display panel. The back side hard layer has a higher modulus of elasticity than the back side viscoelastic layer. The back side viscoelastic layer has a thickness Tb of not less than about 20 ?m, and the front side viscoelastic layer has a thickness Ta and satisfies: Ta/Tb>1 (Tb?0).
    Type: Application
    Filed: June 14, 2007
    Publication date: July 15, 2010
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hideki Ichioka, Tomohiko Yamamoto
  • Patent number: 7719515
    Abstract: The invention concerns an input device including an input receiving panel and a stylus enabling an input, the input device sensing an input by means of capacitive coupling between a panel electrode on the input receiving panel and a stylus electrode on the stylus, and includes: a signal supply section supplying an input sensing signal to the panel electrode; a signal detecting circuit detecting a signal generated in the stylus electrode; and an input sensing section comparing the input sensing signal with the detection signal detected by the signal detecting circuit and sensing an input based on a result of the comparison. An input-sensing digital code is superimposed on the input sensing signal. This allows for further reduction in the possibility of false sensing caused by noise than conventional techniques.
    Type: Grant
    Filed: April 17, 2003
    Date of Patent: May 18, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Koji Fujiwara, Naoto Inoue, Tomohiko Yamamoto, Keiichi Tanaka, Hideki Ichioka
  • Publication number: 20090290089
    Abstract: A liquid crystal display apparatus includes a liquid crystal display panel, a backlight system, a driving circuit board for driving the liquid crystal display panel and the backlight system, and a housing for housing the foregoing members. A metal plate is provided between the backlight system and the driving circuit board, which metal plate has a plane surface on a front and back surface which is broader than the backlight system and the driving circuit board. On at least a pair of opposed edges of the metal plate, at least one of a falling portion and a rising portion is provided along the edges of the metal plate. Further, a bezel is provided between the housing and at least one of the falling portion and rising portion, which bezel is arranged so as to integrally support the metal plate and at least the liquid crystal display panel and the backlight system.
    Type: Application
    Filed: June 14, 2007
    Publication date: November 26, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hideki Ichioka, Tomohiko Yamamoto
  • Patent number: 7598005
    Abstract: Data (pattern data) (21) of a mask data (2) to form a mask pattern is made into an octagon. An electron-beam lithography system has a high resolution, and it requires a polygonal pattern data having many more vertexes such as an octagon. With the use of such a pattern data, a photomask (3) having a mask pattern (22) being an aperture closer to a circle (approximated circle) can be obtained. Backed by this, it is possible to form resist patterns at smaller pitches without causing failures in manufacturing a device such as a reduction in resist film thickness, a disconnection between actual patterns such as of contact holes, and so forth. Further, it is possible to eliminate the factor of mask manufacturing process from the optical proximity correction to simplify the optical proximity correction, so that desired macro actual patterns can be formed easily and accurately.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: October 6, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventor: Tomohiko Yamamoto
  • Patent number: 7598007
    Abstract: A reticle of the present invention has a main pattern (11) and a monitor pattern (12) each having a different thickness of a light-shielding film (4), the light-shielding film (4) of the monitor pattern (12) being formed thicker than that of the main pattern (11). Therefore, in a CD-focus curve, a focus center at which a focus value is the optimal value is shifted from the extremal value, so that a positive/negative direction of the focus is specified by monitoring the amount of shift using this shifted focus center. This configuration provides easy and highly accurate measurements of a focus error amount and the positive/negative direction of the focus. Ultimately, the measured focus error information is fed back to a next lot and is fed forward to a next process to manufacture a semiconductor device stably.
    Type: Grant
    Filed: March 6, 2008
    Date of Patent: October 6, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventor: Tomohiko Yamamoto
  • Publication number: 20090130603
    Abstract: A method for manufacturing a semiconductor device includes the steps of: forming a resist film above a semiconductor wafer having a layer to be processed, the resist film not being formed on a circumferential portion of the semiconductor wafer; exposing the resist film; after exposing the resist film, forming a resist pattern by developing the resist film; after forming the resist pattern by developing the resist film, cleaning the semiconductor wafer by supplying a thinner to the circumferential portion of the semiconductor wafer; and after cleaning the semiconductor wafer, processing the layer to be processed of the semiconductor wafer using the resist pattern.
    Type: Application
    Filed: November 11, 2008
    Publication date: May 21, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Tomohiko YAMAMOTO
  • Patent number: 7532204
    Abstract: A coordinate input system includes: a digitizer for indicating coordinate positions; a controller for extracting a plurality of coordinate data units from the indicated coordinate positions; a temporary storage memory for sequentially storing the extracted coordinate data units; a cosine value deriving section for defining vectors each connecting two of points associated with the respective coordinate data units and for deriving a cosine value of an angle formed by adjacent two of the vectors sandwiching a point selected from the points; and a control circuit for discarding one of the coordinate data units associated with the selected point when the cosine value is smaller than a given value and for transmitting and inputting one of the coordinate data units associated with the selected point when the cosine value is equal to or larger than the given value.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: May 12, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasunori Ake, Tomohiko Yamamoto
  • Patent number: 7505092
    Abstract: A display device includes a display panel, a first protection layer having viscoelasticity, and a second protection layer having an elastic modulus higher than first protection layer. The first protection layer covers one face of the display panel and the second protection layer is arranged on the first protection layer to cover the display panel.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: March 17, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hideki Ichioka, Tomohiko Yamamoto
  • Patent number: 7463237
    Abstract: A programmable logic IC and a ROM are set in a controller section between a display and ICs (an IC for wireless communication and an IF IC). In each of plural program sets stored in the ROM, a series of operation up to the time that image data, after being read from the IC for wireless communication and converted into a logic signal, is sent to the display is described. On the other hand, the programmable logic IC changes the program set being read, according to what is displayed on the display, television images, a monitor image supplied from a computer, or image data from a memory card. This makes it possible to attain an image-display-device controller circuit that has a small circuit scale, consumes a small amount of power, and is small in size and weight are small, but can change operation.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: December 9, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tomohiko Yamamoto, Kohji Fujiwara
  • Publication number: 20080241972
    Abstract: A method of manufacturing a semiconductor device includes measuring a first width of a first mask pattern formed in a photomask and a second width of a second mask pattern formed in the photomask, and deciding a temperature of heat treatment of a thickening material over a resist film based on measured results.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 2, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Tomohiko YAMAMOTO
  • Patent number: 7414713
    Abstract: A shape value of a pattern having a pivotal characteristic is measured (step S1), an exposure energy variation is detected from the measured value, a first data base is accessed using a result of the measurement of the shape value (Step S2), an exposure energy is calculated (Step S3), a shape value of an isolated pattern is measured (Step S4), a second data base is accessed using a result of the measurement (Step S5), and a focal variation is determined using the calculated proper exposure energy (Step S6).
    Type: Grant
    Filed: March 15, 2004
    Date of Patent: August 19, 2008
    Assignee: Fujitsu Limited
    Inventor: Tomohiko Yamamoto
  • Publication number: 20080153011
    Abstract: A reticle of the present invention has a main pattern (11) and a monitor pattern (12) each having a different thickness of a light-shielding film (4), the light-shielding film (4) of the monitor pattern (12) being formed thicker than that of the main pattern (11). Therefore, in a CD-focus curve, a focus center at which a focus value is the optimal value is shifted from the extremal value, so that a positive/negative direction of the focus is specified by monitoring the amount of shift using this shifted focus center. This configuration provides easy and highly accurate measurements of a focus error amount and the positive/negative direction of the focus. Ultimately, the measured focus error information is fed back to a next lot and is fed forward to a next process to manufacture a semiconductor device stably.
    Type: Application
    Filed: March 6, 2008
    Publication date: June 26, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Tomohiko Yamamoto