Abstract: According to one embodiment, in a method for manufacturing a semiconductor device, a surface region of a semiconductor substrate is modified into an amorphous layer. A microwave is irradiated to the semiconductor substrate in which the amorphous layer is formed in a dopant-containing gas atmosphere so as to form a diffusion layer in the semiconductor substrate. The dopant is diffused into the amorphous layer and is activated.

Abstract: A semiconductor device includes a semiconductor substrate; a gate insulation film formed on the semiconductor substrate; a silicide gate electrode of an n-type MISFET formed on the gate insulation film; and a silicide gate electrode of a p-type MISFET formed on the gate insulation film and having a thickness smaller than that of the silicide gate electrode of the n-type MISFET, the silicide gate electrode of the p-type MISFET having a ratio of metal content higher than that of the silicide gate electrode of the n-type MISFET.

Abstract: A semiconductor device manufacturing method includes: removing an insulating film on a semiconductor substrate by etching and subsequently oxidizing a surface of the semiconductor substrate by using a liquid oxidation agent without exposing this surface to an atmosphere, thereby forming a first insulating film containing an oxide of a constituent element of the semiconductor substrate on the surface of the semiconductor substrate; forming a second insulating film containing an aluminum oxide on the first insulating film; forming a third insulating film containing a rare earth oxide on the second insulating film; forming a high-k insulating film on the third insulating film; introducing nitrogen into the high-k insulating film to thereby make it a fourth insulating film; and conducting heat treatment to change the first through third insulating films into a insulating film made of a mixture containing aluminum, a rare earth element, the constituent element of the semiconductor substrate, and oxygen.

Abstract: A semiconductor device according to an embodiment of the present invention includes an N-type transistor formed in a first region on a substrate, and a P-type transistor formed in a second region on the substrate.

Abstract: A method of fabricating a semiconductor device according to one embodiment includes: laying out a first region, a second region, a third region and a fourth region on a semiconductor substrate by forming an element isolation region in the semiconductor substrate; forming a first insulating film on the first region and the second region; forming a first semiconductor film on the first insulating film; forming a second insulating film and an aluminum oxide film thereon on the fourth region after forming of the first semiconductor film; forming a third insulating film and a lanthanum oxide film thereon on the third region after forming of the first semiconductor film; forming a high dielectric constant film on the aluminum oxide film and the lanthanum oxide film; forming a metal film on the high dielectric constant film; forming a second semiconductor film on the first semiconductor film and the metal film; and patterning the first insulating film, the first semiconductor film, the second insulating film, the al

Abstract: A silicon oxynitride film is formed on entire surface of a semiconductor substrate, a lanthanum oxide film is formed on the silicon oxynitride film and the lanthanum oxide film is removed from a pMOS region. Then, a nitrided hafnium silicate film serving as a highly dielectric film is formed on the entire surface, an aluminum-containing titanium nitride film is formed, a polysilicon film is formed, and the stacked films are patterned into a gate electrode configuration. Next, impurities are introduced into a source/drain region, and an annealing for activating the impurities is utilized to diffuse the aluminum included in the aluminum-containing titanium nitride film to the interface between the silicon oxynitride film and the nitrided hafnium aluminum silicate film in the pMOS region.

Abstract: A constant velocity joint, where the tilt angle of a first trunnion relative to a plane crossing perpendicularly to the axis of a second shaft is set to be different from the tilt angle of a second trunnion and the tilt angle of a third trunnion. The tilt angle of the second trunnion and the tilt angle of the third trunnion are set to be equal to or different from each other, and three axes of the first to third trunnions are set to be included on a same plane.

Abstract: A semiconductor device includes a semiconductor substrate containing a p-type diffusion layer and an n-type diffusion layer which are separated by an element separation film; a gate insulating film formed on or above the p-type diffusion layer and the n-type diffusion layer of the semiconductor substrate, respectively; a gate electrode containing a metallic film and formed on the gate insulating film; a Ge inclusion formed at an interface between the gate insulating film and the metallic film; and a silicon-containing layer formed on the metallic film.

Abstract: A method of manufacturing a semiconductor device includes forming a trench in an interlayer dielectric film on the semiconductor substrate, the trench reaching a semiconductor substrate and having a sidewall made of silicon nitride film; depositing a gate insulation film made of a HfSiO film at a temperature within a range of 200 degrees centigrade to 260 degrees centigrade, so that the HfSiO film is deposited on the semiconductor substrate which is exposed at a bottom surface of the trench without depositing the HfSiO film on the silicon nitride film; and filling the trench with a gate electrode made of metal.

Abstract: In a commodity and service trading system, a client computer 60 receives an input window from a Web server 70 connected via the Internet 72 for the user's entry of transaction data regarding a trade of commodity or service. The user's entry of transaction data on the input window is registered in the form of a user data table into a memory 33 of a transreceiver 20 (transreceiver main body 30). The transreceiver 20 enables delivery of the transaction data registered in the user data table, in parallel with reception of transaction data from another transreceiver 20B or 20C. When a commodity or service option set as an object trade and transaction conditions required for the object trade in the received transaction data match with the commodity or service option and the transaction conditions in the transaction data registered in the user data table, the received transaction data is registered in the form of a receiving data table into the memory 33.

Abstract: An annular member is installed on a circular cylinder section of a trunnion, and a roller member, in the inner periphery of which a needle bearing is held, is installed on the circular cylinder section. The needle bearing is held between a flange section formed on one end of the roller member and the annular member installed on the trunnion with a predetermined gap between them. Further, a gap (X) between the needle bearing and the annular member is set to satisfy the following relationship. X>R/2·(1/cos ? max?1) where R: Radius of rotation of the center of the roller member relative to the center axis of an outer member. ? max: Maximum inclination angle of an inner member.

Abstract: A method of manufacturing a semiconductor device includes forming a trench in an interlayer dielectric film on the semiconductor substrate, the trench reaching a semiconductor substrate and having a sidewall made of silicon nitride film; depositing a gate insulation film made of a HfSiO film at a temperature within a range of 200 degrees centigrade to 260 degrees centigrade, so that the HfSiO film is deposited on the semiconductor substrate which is exposed at a bottom surface of the trench without depositing the HfSiO film on the silicon nitride film; and filling the trench with a gate electrode made of metal.

Abstract: A method of fabricating a semiconductor device according to one embodiment includes: forming a SiGe crystal layer on a semiconductor substrate, the SiGe crystal layer having a first plane and a second plane inclined with respect to the first plane; forming an amorphous Si film on the SiGe crystal layer; crystallizing a portion located adjacent to the first and second planes of the amorphous Si film by applying heat treatment using the first and second planes of the SiGe crystal layer as a seed, thereby forming a Si crystal layer; selectively removing or thinning a portion of the amorphous Si film that is not crystallized by the heat treatment; applying oxidation treatment to a surface of the Si crystal layer, thereby forming a gate insulating film on the surface of the Si crystal layer; and forming a gate electrode on the gate insulating film.

Abstract: A semiconductor device includes a substrate having first and second regions on a surface thereof, a first conductivity type first MISFET formed in the first region and a second conductivity type second MISFET formed in the second region. The first MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate and a first insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film and which has a first element forming electric dipoles that reduce a threshold voltage of the first MISFET and the second MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate, and a second insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film formed on the surface of the substrate and which has a second element forming electric dipoles in a direction opposite to that in the first MISFET.

Abstract: A element isolation insulating film is formed around the device regions in the silicon substrate. The device regions are formed an n-type diffusion layer region, a p-type diffusion layer region, a p-type extension region, an n-type extension region, a p-type source/drain region, an n-type source/drain region, and a nickel silicide film. Each gate dielectric film is made up of a silicon oxide film and a hafnium silicon oxynitride film. The n-type gate electrode is made up of an n-type silicon film and a nickel silicide film, and the p-type gate electrode is made up of a nickel silicide film. The hafnium silicon oxynitride films are not formed on the sidewalls of the gate electrodes.

Abstract: A method of manufacturing a semiconductor device having a MOSFET of a first conductivity type and a MOSFET of a second conductivity type different from the first conductivity type formed on a semiconductor substrate, the method has: forming a gate insulating film; forming a first gate electrode layer, and forming a second gate electrode layer; forming a first metal containing layer on said first gate electrode layer and said second gate electrode layer; forming a second metal containing layer for preventing diffusion of a metal on said first metal containing layer; forming a third metal containing layer on said second gate electrode layer from which said first metal containing layer and said second metal containing layer are selectively removed, the third metal containing layer having a thickness different from the thickness of said first metal containing layer in a case where the third metal containing layer contains the same metal or alloy as the metal or alloy contained in said first metal containing layer

Abstract: The Ge channel device comprises: a Ge channel layer (2); a Si-containing interface layer (4) formed on the Ge channel layer (2); a La2O3 layer (6) formed on the interface layer (4); and an electrically conductive layer (8) formed on the La2O3 layer (6). In this device, the Si-containing interface layer (4) functions to suppress the diffusion of Ge atoms into the La2O3 layer (6) and thereby prevents the formation of Ge oxide in the La2O3 layer (6); accordingly, a Ge channel device whose C-V characteristic exhibits only a small hysteresis can be achieved.

Abstract: A semiconductor device includes a semiconductor substrate, and a p-channel MOS transistor provided on the semiconductor substrate, the p-channel MOS transistor comprising a first gate dielectric film including Hf, a second gate dielectric film provided on the first gate dielectric film and including aluminum oxide, and a first metal silicide gate electrode provided on the second gate dielectric film.

Abstract: A method of manufacturing a semiconductor device includes forming a trench in an interlayer dielectric film on the semiconductor substrate, the trench reaching a semiconductor substrate and having a sidewall made of silicon nitride film; depositing a gate insulation film made of a HfSiO film at a temperature within a range of 200 degrees centigrade to 260 degrees centigrade, so that the HfSiO film is deposited on the semiconductor substrate which is exposed at a bottom surface of the trench without depositing the HfSiO film on the silicon nitride film; and filling the trench with a gate electrode made of metal.

Abstract: A method of manufacturing a semiconductor device having a MOSFET of a first conductivity type and a MOSFET of a second conductivity type different from the first conductivity type formed on a semiconductor substrate, the method has: forming a gate insulating film; forming a first gate electrode layer, and forming a second gate electrode layer; forming a first metal containing layer on said first gate electrode layer and said second gate electrode layer; forming a second metal containing layer for preventing diffusion of a metal on said first metal containing layer; forming a third metal containing layer on said second gate electrode layer from which said first metal containing layer and said second metal containing layer are selectively removed, the third metal containing layer having a thickness different from the thickness of said first metal containing layer in a case where the third metal containing layer contains the same metal or alloy as the metal or alloy contained in said first metal containing layer