Abstract: A method of manufacturing a semiconductor device having a MOSFET of a first conductivity type and a MOSFET of a second conductivity type different from the first conductivity type formed on a semiconductor substrate, the method has: forming a gate insulating film; forming a first gate electrode layer, and forming a second gate electrode layer; forming a first metal containing layer on said first gate electrode layer and said second gate electrode layer; forming a second metal containing layer for preventing diffusion of a metal on said first metal containing layer; forming a third metal containing layer on said second gate electrode layer from which said first metal containing layer and said second metal containing layer are selectively removed, the third metal containing layer having a thickness different from the thickness of said first metal containing layer in a case where the third metal containing layer contains the same metal or alloy as the metal or alloy contained in said first metal containing layer

Abstract: A constant velocity joint, wherein the tilt angle of a first trunnion relative to a plane crossing perpendicularly to the axis of a second shaft is set to be different from the tilt angle of a second trunnion and the tilt angle of a third trunnion.

Abstract: A element isolation insulating film is formed around the device regions in the silicon substrate. The device regions are formed an n-type diffusion layer region, a p-type diffusion layer region, a p-type extension region, an n-type extension region, a p-type source/drain region, an n-type source/drain region, and a nickel silicide film. Each gate dielectric film is made up of a silicon oxide film and a hafnium silicon oxynitride film. The n-type gate electrode is made up of an n-type silicon film and a nickel silicide film, and the p-type gate electrode is made up of a nickel silicide film. The hafnium silicon oxynitride films are not formed on the sidewalls of the gate electrodes.

Abstract: A method of manufacturing a semiconductor device includes forming a trench in an interlayer dielectric film on the semiconductor substrate, the trench reaching a semiconductor substrate and having a sidewall made of silicon nitride film; depositing a gate insulation film made of a HfSiO film at a temperature within a range of 200 degrees centigrade to 260 degrees centigrade, so that the HfSiO film is deposited on the semiconductor substrate which is exposed at a bottom surface of the trench without depositing the HfSiO film on the silicon nitride film; and filling the trench with a gate electrode made of metal.

Abstract: This disclosure concerns a semiconductor device comprising a semiconductor substrate; a gate dielectric film provided on the semiconductor substrate and containing Hf, Si, and O or containing Zr, Si and O; a gate electrode of an n-channel FET provided on the gate dielectric film, the gate electrode being made of nickel silicide containing nickel at a higher content than silicon; an aluminum layer provided at a bottom portion of the gate electrode of the n-channel FET; and a gate electrode of a p-channel FET provided on the gate dielectric film, the gate electrode being made of nickel silicide containing nickel at a higher content than silicon.

Abstract: A manufacturing method of a semiconductor device according to an embodiment of this invention, includes: forming a gate dielectric film on a substrate and forming a gate electrode layer for a P-type FET on the gate dielectric film, ranging from a P-type FET region to a N-type FET region; in the P-type FET region and the N-type FET region, processing the gate electrode layer for the P-type FET, to form a gate electrode for the P-type FET in the P-type FET region, and to form a dummy gate electrode in the N-type FET region; and in the N-type FET region, forming a trench by removing the dummy gate electrode on the gate dielectric film, and forming a gate electrode for the N-type FET on the gate dielectric film by burying a gate electrode material in the trench.

Abstract: An element isolation dielectric film is formed around device regions in a silicon substrate. The device regions are an n-type diffusion region, a p-type diffusion region, a p-type extension region, an n-type extension region, a p-type source/drain region, an n-type source/drain region, and a nickel silicide film. Each gate dielectric film includes a silicon oxide film and a hafnium silicate nitride film. The n-type gate electrode includes an n-type silicon film and a nickel silicide film, and the p-type gate electrode includes a nickel silicide film. The hafnium silicate nitride films are not on the sidewalls of the gate electrodes.

Abstract: A method of manufacturing a semiconductor device, includes forming a gate insulating film on a semiconductor substrate, and forming a gate electrode on the gate insulting film, wherein forming the gate insulating film includes forming a metal silicate film, and a silicon source used for forming the metal silicate film includes at least one of a first hydrocarbon silicon compound obtained by replacing at least one of hydrogen atoms in monosilane with an alkyl group, a second hydrocarbon silicon compound obtained by replacing at least one of hydrogen atoms in disilane with an alkyl group, and a third hydrocarbon silicon compound obtained by replacing at least one of hydrogen atoms in trisilane with an alkyl group.

Abstract: An annular member is installed on a circular cylinder section of a trunnion, and a roller member, in the inner periphery of which a needle bearing is held, is installed on the circular cylinder section. The needle bearing is held between a flange section formed on one end of the roller member and the annular member installed on the trunnion with a predetermined gap between them. Further, a gap (X) between the needle bearing and the annular member is set to satisfy the following relationship. X>R/2·(1/cos ? max?1) where R: Radius of rotation of the center of the roller member relative to the center axis of an outer member. ? max: Maximum inclination angle of an inner member.

Abstract: A semiconductor device includes a semiconductor substrate; a gate insulation film formed on the semiconductor substrate; a silicide gate electrode of an n-type MISFET formed on the gate insulation film; and a silicide gate electrode of a p-type MISFET formed on the gate insulation film and having a thickness smaller than that of the silicide gate electrode of the n-type MISFET, the silicide gate electrode of the p-type MISFET having a ratio of metal content higher than that of the silicide gate electrode of the n-type MISFET.

Abstract: A method of manufacturing a semiconductor device includes forming a trench in an interlayer dielectric film on the semiconductor substrate, the trench reaching a semiconductor substrate and having a sidewall made of silicon nitride film; depositing a gate insulation film made of a HfSiO film at a temperature within a range of 200 degrees centigrade to 260 degrees centigrade, so that the HfSiO film is deposited on the semiconductor substrate which is exposed at a bottom surface of the trench without depositing the HfSiO film on the silicon nitride film; and filling the trench with a gate electrode made of metal.

Abstract: Roller members of a constant velocity universal joint are externally fitted to trunnions with a plurality of needle bearings interposed between the roller members and the trunnions. The roller member has an inner diameter portion having an L-shaped cross section by a flange section which protrudes radially inwardly and an annular recess section which is provided and defined by a gap with respect to the trunnion. The plurality of needle bearings are retained on the inner diameter portion of the roller member by paste wax.

Abstract: An element isolation dielectric film is formed around device regions in a silicon substrate. The device regions are an n-type diffusion region, a p-type diffusion region, a p-type extension region, an n-type extension region, a p-type source/drain region, an n-type source/drain region, and a nickel silicide film. Each gate dielectric film includes a silicon oxide film and a hafnium silicate nitride film. The n-type gate electrode includes an n-type silicon film and a nickel silicide film, and the p-type gate electrode includes a nickel silicide film. The hafnium silicate nitride films are not on the sidewalls of the gate electrodes.

Abstract: A semiconductor device includes a first insulating film on a silicon substrate and a second insulating film on the first insulating film. The first insulating film is a silicon oxide film having a thickness of 1 nm or less and a suboxide content of 30% or less. The second insulating film is a high dielectric constant insulating film.

Abstract: A semiconductor device includes a first insulating film on a silicon substrate and a second insulating film on the first insulating film. The first insulating film is a silicon oxide film having a thickness of 1 nm or less and a suboxide content of 30% or less. The second insulating film is a high dielectric constant insulating film.

Abstract: A semiconductor device includes a first insulating film on a silicon substrate and a second insulating film on the first insulating film. The first insulating film is a silicon oxide film having a thickness of 1 nm or less and a suboxide content of 30% or less. The second insulating film is a high dielectric constant insulating film.

Abstract: A semiconductor device comprises a semiconductor substrate in which a semiconductor element is formed, an interlayer insulating film formed on the semiconductor substrate, an insulating barrier layer, formed on the interlayer insulating film by plasma nitriding, for preventing diffusion of a metal constituting a wiring layer, a conductive barrier layer, formed on the insulating barrier layer, for preventing diffusion of the metal, and a wiring layer formed of the metal on the conductive barrier layer. A bottom portion of the wiring layer is protected by the conductive barrier layer and the insulating barrier layer. Therefore, the diffusion of the metal constituting the wiring layer can be surely prevented.

Abstract: A semiconductor device comprises a semiconductor substrate in which a semiconductor element is formed, an interlayer insulating film formed on the semiconductor substrate, an insulating barrier layer, formed on the interlayer insulating film by plasma nitriding, for preventing diffusion of a metal constituting a wiring layer, a conductive barrier layer, formed on the insulating barrier layer, for preventing diffusion of the metal, and a wiring layer formed of the metal on the conductive barrier layer. A bottom portion of the wiring layer is protected by the conductive barrier layer and the insulating barrier layer. Therefore, the diffusion of the metal constituting the wiring layer can be surely prevented.

Abstract: An SrRuO3 film as the lower electrode and upper electrode of a capacitor is formed by CVD using a gas mixture of Sr(THD)2 and Ru(THD)3 as source gases. A BaxSr1-xRuO3 film is used as a capacitor insulating film.

Abstract: A p-type silicon substrate has an element isolation region of an STI structure formed therein. A transistor region isolated by the isolation region has a n-type source/drain diffusion layer. Further, a p-channel impurity layer is formed substantially only in its channel region for controlling its threshold voltage (Vth). A gate insulator film consisting of a high dielectric film is formed on the channel region with an Si3N4 film interposed therebetween. A metal gate electrode having its bottom and side surfaces covered with the gate insulator film is provided in a self-alignment manner with respect to the source/drain diffusion layer.