Patents by Inventor Torayuki Tsukada

Torayuki Tsukada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050035844
    Abstract: A chip resistor includes a metal resistor element having a flat lower surface. The lower surface is formed with two electrodes spaced from each other, and an insulating resin film is formed between these electrodes. Each of the electrodes partially overlaps the insulating film so that a portion of the insulating film is inserted between each of the electrodes and the lower surface of the resistor element.
    Type: Application
    Filed: April 27, 2004
    Publication date: February 17, 2005
    Applicant: ROHM CO., LTD.
    Inventor: Torayuki Tsukada
  • Patent number: 6856233
    Abstract: A chip resistor having a highly accurately adjusted low resistance value is obtained. The chip resistor having a vertically three-layered structure is obtained by forming a first electrode 1A by printing paste for an electrode on an insulating substrate 5 and drying it, a resistor layer 3 by printing paste for a resistor on the first electrode 1A and drying it, a second electrode 1B by printing paste for an electrode on the resistor layer 3 and the insulating substrate 5 and baking it. Trimming is applied to the thus fabricated chip resistor so as to adjust a resistance value to a given value.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: February 15, 2005
    Assignee: Rohm Co., Ltd.
    Inventors: Torayuki Tsukada, Mitsuo Nonaka
  • Publication number: 20040252009
    Abstract: A chip resistor includes a resistor element in the form of a chip, and at least two electrodes formed on the resistor element. The resistor element includes an upper surface, a lower surface, and two end surfaces extending between the upper and the lower surfaces and spaced from each other. The two electrodes are provided on the lower surface of the resistor element. Each of the end surfaces of the resistor element is formed with a conductor film integrally connected to a corresponding one of the electrodes. The conductor film is made of copper, for example, and is higher in solder-wettability than the resistor element.
    Type: Application
    Filed: April 27, 2004
    Publication date: December 16, 2004
    Applicant: ROHM CO., LTD.
    Inventor: Torayuki Tsukada
  • Patent number: 6727111
    Abstract: A multi-element electronic chip device is manufactured which has a plurality of elements such as film resistors 2 or the like on one insulating substrate 1 by carrying out a step of performing primary division of a ceramic material plate A corresponding to a multiplicity of insulating substrates 1 into ceramic bars A′ each corresponding to a row of plural insulating substrates 1, a step of forming grooves 6 in lengthwise side faces of each ceramic bar A′ before forming side electrodes 5 for both ends of each film resistor 2 or forming grooves 6 after forming side electrodes 5, and a step of performing secondary division of the ceramic bar A′ into individual insulating substrates 1. This structure is a low cost solution for preventing the side electrodes 5 for different film resistors 2 from connecting with each other.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: April 27, 2004
    Assignee: Rohm Co., Ltd.
    Inventor: Torayuki Tsukada
  • Patent number: 6724295
    Abstract: A method of making a chip resistor is provided. According to this method, an aggregate board is first prepared which includes a first region and a second region which are spaced from each other via an excess portion. Then, a conductor pattern is formed which extends to bridge the first region and the second region. Subsequently, a resistor element is formed in each of the first region and the second region for connection to the conductor pattern. Then, the aggregate board is cut at the excess portion. The conductor pattern includes a thinner-walled portion extending across the excess portion and a thicker-walled portion connected to the thinner-walled portion and spaced from the excess portion.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: April 20, 2004
    Assignee: Rohm Co., Ltd.
    Inventor: Torayuki Tsukada
  • Publication number: 20030005576
    Abstract: A multi-element electronic chip device is manufactured which has a plurality of elements such as film resistors 2 or the like on one insulating substrate 1 by carrying out a step of performing primary division of a ceramic material plate A corresponding to a multiplicity of insulating substrates 1 into ceramic bars A′ each corresponding to a row of plural insulating substrates 1, a step of forming grooves 6 in lengthwise side faces of each ceramic bar A′ before forming side electrodes 5 for both ends of each film resistor 2 or forming grooves 6 after forming side electrodes 5, and a step of performing secondary division of the ceramic bar A′ into individual insulating substrates 1. This structure is a low cost solution for preventing the side electrodes 5 for different film resistors 2 from connecting with each other.
    Type: Application
    Filed: June 11, 2002
    Publication date: January 9, 2003
    Applicant: ROHM CO., LTD.
    Inventor: Torayuki Tsukada
  • Publication number: 20020148106
    Abstract: A method of making a chip resistor is provided. The method includes the following steps. First, a resistive element is provided on a substrate. Then, a resin layer is formed on the substrate to enclose the resistive element. Then, the substrate and the resin layer are cut in this order. To prevent the breakage of the substrate during the cutting, the resin layer has better machinability than the substrate.
    Type: Application
    Filed: April 15, 2002
    Publication date: October 17, 2002
    Inventors: Torayuki Tsukada, Takahiro Kuriyama
  • Publication number: 20020130761
    Abstract: A method of making a chip resistor is provided. According to this method, an aggregate board is first prepared which includes a first region and a second region which are spaced from each other via an excess portion. Then, a conductor pattern is formed which extends to bridge the first region and the second region. Subsequently, a resistor element is formed in each of the first region and the second region for connection to the conductor pattern. Then, the aggregate board is cut at the excess portion. The conductor pattern includes a thinner-walled portion extending across the excess portion and a thicker-walled portion connected to the thinner-walled portion and spaced from the excess portion.
    Type: Application
    Filed: March 7, 2002
    Publication date: September 19, 2002
    Inventor: Torayuki Tsukada
  • Publication number: 20020125985
    Abstract: A chip resistor having a highly accurately adjusted low resistance value is obtained. The chip resistor having a vertically three-layered structure is obtained by forming a first electrode 1A by printing paste for an electrode on an insulating substrate 5 and drying it, a resistor layer 3 by printing paste for a resistor on the first electrode 1A and drying it, a second electrode 1B by printing paste for an electrode on the resistor layer 3 and the insulating substrate 5 and baking it. Trimming is applied to the thus fabricated chip resistor so as to adjust a resistance value to a given value.
    Type: Application
    Filed: March 11, 2002
    Publication date: September 12, 2002
    Applicant: ROHM CO., LTD.
    Inventors: Torayuki Tsukada, Mitsuo Nonaka