Patents by Inventor Toru Matsuda
Toru Matsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140284691Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor memory device. The method includes forming a first stopper film forming a lower gate layer, making a recess in the lower gate layer, filling a sacrificial film into the recess, forming a second stopper film, making an opening in the second stopper film, forming a stacked body. The stacked body includes electrode films and insulating films. The method includes, making a slit in the stacked body, making a hole in the stacked body, removing the sacrificial film via the hole, forming a memory film including a charge storage film. The method includes forming a channel body on a side wall of the memory film. An etching rate of the first stopper film and the second stopper film is lower than an etching rate of the electrode films and the insulating films.Type: ApplicationFiled: September 4, 2013Publication date: September 25, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Kazuhide Takamura, Ryota Katsumata, Masaru Kidoh, Yoshihiro Uozumi, Daigo Ichinose, Toru Matsuda
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Publication number: 20140254003Abstract: A reflective optical system includes: a telescope section which includes a concave primary mirror and a concave secondary mirror; and a collimator section which includes at least one concave mirror disposed in a tilted manner with respect to an optical axis of the telescope section and at least one convex mirror disposed in a tilted manner with respect to the optical axis of the telescope section and on which converged light flux is incident, the collimator section receiving light flux from the telescope section.Type: ApplicationFiled: March 4, 2014Publication date: September 11, 2014Inventors: Yuji Katashiba, Toru Matsuda
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Patent number: 8814277Abstract: A rustproof cover for an automobile disk brake which is attached to a surface portion of a disk portion of a automobile wheel so as to shield a plurality of penetration portions penetrating the disk portion in a direction from the surface portion of the disk portion to a rear-surface portion thereof, the rustproof cover comprising, a recessed portion which is recessed from the surface portion of the disk portion to the rear-surface portion thereof so as to follow the shape of each penetration portion, wherein each recessed portion includes a protrusion portion which engages with a rear surface of the disk portion at the rear-surface portion of the disk portion so as to prevent a separation of the rustproof cover, and wherein the rustproof cover is formed of a flexible resin.Type: GrantFiled: May 13, 2009Date of Patent: August 26, 2014Assignee: Honda Motor Co., Ltd.Inventors: Hidemi Ichinose, Yoshimine Miyagawa, Toru Matsuda, Takashi Kawashima, Mineko Asano
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Patent number: 8735246Abstract: According to one embodiment, a method is disclosed for manufacturing nonvolatile semiconductor memory device including forming a stacked body by alternately stacking an electrode layer and a layer-to-be-etched, and forming an oxidized layer between the layer-to-be-etched provided at least in any side of an upper side and a lower side of the electrode layer and the electrode layer. The method can include forming a groove which passes through the stacked body. The method can include embedding an insulating body within the groove. The method can include forming a hole which passes through the stacked body. The method can include selectively removing the layer-to-be-etched via the hole. The method can include forming a charge storage layer in an inner side of the hole. The method can include forming a channel body layer in an inner side of the charge storage layer.Type: GrantFiled: August 31, 2012Date of Patent: May 27, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Shuichi Kuboi, Tadashi Iguchi, Masao Iwase, Toru Matsuda
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Patent number: 8735965Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a substrate, an electrode layer provided above the substrate, a first insulating layer provided on the electrode layer, a stacked body provided on the insulating layer, a memory film, a channel body layer, a channel body connecting portion and a second insulating layer. The stacked body has a plurality of conductive layers and a plurality of insulating film alternately stacked on each other. The memory film is provided on a sidewall of each of a pair of holes penetrating the stacked body in a direction of stacking the stacked body. The channel body layer is provided on an inner side of the memory film in each of the pair of the holes.Type: GrantFiled: March 15, 2012Date of Patent: May 27, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Hanae Ishihara, Mitsuru Sato, Toru Matsuda
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Publication number: 20130341703Abstract: According to one embodiment, the electrode films are provided on the substrate. The first insulating films are provided between the electrode films. The second insulating film is provided on an uppermost electrode film of the electrode films. The select gate is provided on the second insulating film. The channel body extends in a stacking direction in a stacked body. The memory film is provided between the channel body and the electrode films and includes a charge storage film. The memory film includes a block film, the charge storage film, and a tunnel film. The second insulating film includes at least the block film of the memory film.Type: ApplicationFiled: June 18, 2013Publication date: December 26, 2013Inventors: Hiroshi SHINOHARA, Toru Matsuda
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Publication number: 20130334591Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method includes forming a second stacked body on the planarized interlayer insulating film and on the uppermost stair. The second stacked body includes a second conductive film thicker than the first conductive film and a second insulating film stacked on the second conductive film. The method includes dividing the second stacked body into a select gate on the uppermost stair and a plurality of wall portions in a staircase region below the uppermost stair. The method includes forming a plurality of vias piercing the interlayer insulating film under a region between the wall portions and reaching the first conductive film of each of the stairs.Type: ApplicationFiled: June 12, 2013Publication date: December 19, 2013Inventor: Toru MATSUDA
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Patent number: 8575681Abstract: A semiconductor memory device includes a substrate, a conductive layer provided on a major surface of the substrate, a stacked body, a memory film, and a channel body. The stacked body includes multiple insulating layers alternately stacked with multiple electrode layers on the conductive layer. The memory film includes a charge storage film provided on side walls of holes made to pierce the stacked body. The channel body includes a pair of columnar portions and a linking portion. The pair of columnar portions is provided on an inner side of the memory film inside the holes. The linking portion is provided inside the conductive layer to link lower ends of the pair of columnar portions. The electrode layers are tilted with respect to the major surface of the substrate. The columnar portions of the channel body and the memory film pierce the tilted portion of the electrode layers.Type: GrantFiled: August 9, 2012Date of Patent: November 5, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Toru Matsuda, Tomoya Osaki, Masaru Kito
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Publication number: 20130234235Abstract: In one embodiment, a manufacturing method of a semiconductor memory device is disclosed. The method can include forming a stacked body on a substrate. The stacked body includes first silicon films containing impurities and having a concentration difference of the impurities provided among different layers, and non-doped second silicon films each provided between the first silicon films. The method can include forming a hole in the stacked body. The method can include removing the second silicon films by etching through the hole and forming an inter-electrode space between the first silicon films. The method can include forming a memory film including a charge storage film on a side wall of the hole and also forming at least a part of the memory film in the inter-electrode space.Type: ApplicationFiled: March 7, 2013Publication date: September 12, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Toru MATSUDA, Tadashi Iguchi, Katsunori Yahashi
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Publication number: 20130228841Abstract: According to one embodiment, a method is disclosed for manufacturing nonvolatile semiconductor memory device including forming a stacked body by alternately stacking an electrode layer and a layer-to-be-etched, and forming an oxidized layer between the layer-to-be-etched provided at least in any side of an upper side and a lower side of the electrode layer and the electrode layer. The method can include forming a groove which passes through the stacked body. The method can include embedding an insulating body within the groove. The method can include forming a hole which passes through the stacked body. The method can include selectively removing the layer-to-be-etched via the hole. The method can include forming a charge storage layer in an inner side of the hole. The method can include forming a channel body layer in an inner side of the charge storage layer.Type: ApplicationFiled: August 31, 2012Publication date: September 5, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Shuichi KUBOI, Tadashi Iguchi, Masao Iwase, Toru Matsuda
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Publication number: 20130113032Abstract: A semiconductor memory device includes a substrate, a conductive layer provided on a major surface of the substrate, a stacked body, a memory film, and a channel body. The stacked body includes multiple insulating layers alternately stacked with multiple electrode layers on the conductive layer. The memory film includes a charge storage film provided on side walls of holes made to pierce the stacked body. The channel body includes a pair of columnar portions and a linking portion. The pair of columnar portions is provided on an inner side of the memory film inside the holes. The linking portion is provided inside the conductive layer to link lower ends of the pair of columnar portions. The electrode layers are tilted with respect to the major surface of the substrate. The columnar portions of the channel body and the memory film pierce the tilted portion of the electrode layers.Type: ApplicationFiled: August 9, 2012Publication date: May 9, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Toru MATSUDA, Tomoya Osaki, Masaru Kito
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Patent number: 8427745Abstract: A telescope includes: a concave mirror reflecting light from an object; an image pickup element receiving light from the mirror; a compensation optical system for guiding light from the mirror to the image pickup element; a lens barrel integrally holding the image pickup element and the compensation optical system; and a drive mechanism for driving the lens barrel to change the angle of the optical axis of the compensation optical system with respect to the optical axis of the concave mirror.Type: GrantFiled: October 1, 2009Date of Patent: April 23, 2013Assignee: Canon Kabushiki KaishaInventors: Naoto Doujou, Toru Matsuda
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Patent number: 8405141Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a substrate, a stacked body, an insulating film, a non-doped semiconductor film, a semiconductor pillar, a charge storage film, a contact, and a spacer insulating film. The stacked body is provided on the substrate. The stacked body includes a plurality of doped semiconductor films stacked. The insulating film is provided between the doped semiconductor films in a first region. The non-doped semiconductor film is provided between the doped semiconductor films in a second region. The semiconductor pillar pierces the stacked body in a stacking direction of the stacked body in the first region. The charge storage film is provided between the doped semiconductor film and the semiconductor pillar. The contact pierces the stacked body in the stacking direction in the second region. The spacer insulating film is provided around the contact.Type: GrantFiled: September 3, 2010Date of Patent: March 26, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Toru Matsuda, Kazuyuki Higashi
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Publication number: 20130069139Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a substrate, an electrode layer provided above the substrate, a first insulating layer provided on the electrode layer, a stacked body provided on the insulating layer, a memory film, a channel body layer, a channel body connecting portion and a second insulating layer. The stacked body has a plurality of conductive layers and a plurality of insulating film alternately stacked on each other. The memory film is provided on a sidewall of each of a pair of holes penetrating the stacked body in a direction of stacking the stacked body. The channel body layer is provided on an inner side of the memory film in each of the pair of the holes.Type: ApplicationFiled: March 15, 2012Publication date: March 21, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Hanae ISHIHARA, Mitsuru SATO, Toru MATSUDA
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Publication number: 20120241842Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes first and second stacked body, first and second semiconductor pillars, a connecting portion, a first memory film, and a dividing portion. The stacked bodies include a plurality of electrode films stacked along a first axis and as interelectrode insulating film provided between the electrode films. The first and second semiconductor pillars penetrate through the first and second stacked bodies along the first axis, respectively. The connecting portion electrically connects the first and second semiconductor pillars. The first memory film is provided between the electrode film and the semiconductor pillar. The dividing portion electrically divides the first and second electrode films from each other between the first semiconductor pillar and the second semiconductor pillar, is in contact with the connecting portion, and includes a stacked film including a material used for the first memory film.Type: ApplicationFiled: September 18, 2011Publication date: September 27, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Toru MATSUDA
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Publication number: 20120147409Abstract: A method of controlling user information for an information processing apparatus includes the steps of a process of an application program requesting user information controlling unit to obtain an item of said user information, and said user information controlling unit providing the obtained item of said user information to said process. The user information controlling unit obtains the user information requested by the process of an application program and provides the user information to the process. Accordingly, the user information can be shared by the application programs and centrally controlled.Type: ApplicationFiled: February 17, 2012Publication date: June 14, 2012Inventor: Toru MATSUDA
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Patent number: 8171526Abstract: A service providing system is disclosed. The service providing system includes an information processing apparatus and a service providing server, each having an authentication mechanism, that are connected via a network, wherein the information processing apparatus and the service providing server provides a service in response to a request by an authenticated user. The information processing apparatus includes: an information obtaining part for obtaining authentication information for performing authentication in the service providing server wherein the authentication information is associated with a user authenticated in the information processing apparatus; and a process request part for sending a process request including the authentication information to the service providing server.Type: GrantFiled: October 3, 2005Date of Patent: May 1, 2012Assignee: Ricoh Company, Ltd.Inventors: Sachiko Takeuchi, Toru Matsuda
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Patent number: 8135734Abstract: A method of controlling user information for an information processing apparatus includes the steps of a process of an application program requesting user information controlling unit to obtain an item of said user information, and said user information controlling unit providing the obtained item of said user information to said process. The user information controlling unit obtains the user information requested by the process of the application program and provides the user information to the process. Accordingly, the user information can be shared by the application programs and centrally controlled.Type: GrantFiled: April 19, 2011Date of Patent: March 13, 2012Assignee: Ricoh Company, Ltd.Inventor: Toru Matsuda
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Publication number: 20120032249Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a multilayer body, a semiconductor pillar, a memory layer, a first insulating film and a second insulating film. The multilayer body includes a plurality of interelectrode insulating films and a plurality of electrode films alternately stacked in a first direction. The semiconductor pillar penetrates through the multilayer body in the first direction. The memory layer is provided between each of the electrode films and the semiconductor pillar and extends in the first direction. The first insulating film is provided between the memory layer and the semiconductor pillar and extends in the first direction. The second insulating film is provided between each of the electrode films and the memory layer and extends in the first direction. The second insulating film is projected between the electrode films.Type: ApplicationFiled: November 29, 2010Publication date: February 9, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Toru MATSUDA
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Publication number: 20110278910Abstract: A rustproof cover for an automobile disk brake which is attached to a surface portion of a disk portion of a automobile wheel so as to shield a plurality of penetration portions penetrating the disk portion in a direction from the surface portion of the disk portion to a rear-surface portion thereof, the rustproof cover comprising, a recessed portion which is recessed from the surface portion of the disk portion to the rear-surface portion thereof so as to follow the shape of each penetration portion, wherein each recessed portion includes a protrusion portion which engages with a rear surface of the disk portion at the rear-surface portion of the disk portion so as to prevent a separation of the rustproof cover, and wherein the rustproof cover is formed of a flexible resin.Type: ApplicationFiled: May 13, 2009Publication date: November 17, 2011Applicant: HONDA MOTOR CO., LTD.Inventors: Hidemi Ichinose, Yoshimine Miyagawa, Hisao Asano, Mineko Asano, Toru Matsuda, Takashi Kawashima