Abstract: A semiconductor device having a silicide film above source-drain regions comprises an element isolation insulating film which is provided so as to enclose an element forming region of a semiconductor substrate whose main component is silicon and contains silicon oxide as a main component, a gate electrode which is formed above the element forming region via a gate insulating film, diffused layers which are formed in the semiconductor substrate so as to sandwich a channel region below the gate electrode, semiconductor regions which are formed so as to sandwich the channel region and diffused regions and are composed of semiconductor material whose lattice constant differs from that of silicon, a silicon nitride film which is formed between the semiconductor regions and the element isolation insulating film and above the lowest part of the semiconductor regions, and a conducting film which is formed at the surface of the semiconductor regions.

Abstract: The present invention discloses a semiconductor device and a manufacturing method thereof which improves its characteristics even though it is miniaturized. According to one aspect of the present invention, it is provided a semiconductor device comprising a first semiconductor element device including a pair of first diffusion layers formed in the semiconductor substrate with a first gate electrode therebetween, and a first conductor layer formed in the first diffusion layer and having an internal stress in a first direction, and a second semiconductor element device including a pair of second diffusion layers formed in the semiconductor substrate with a second gate electrode therebetween, and a second conductor layer formed in the second diffusion layer, having an internal stress in a second direction opposite to the first direction, and constituted of the same element as that of the first conductor layer.

Abstract: A semiconductor device manufacturing method is disclosed. A silicon-containing gate electrode is first formed above the surface of a silicon-containing semiconductor substrate. Then, a sidewall insulating film is formed on the sidewall of the gate electrode and a film of metal is formed on the semiconductor substrate to cover the gate electrode and the sidewall insulating film. The front and back sides of the semiconductor substrate are heated through heat conduction by an ambient gas. Thereby, the metal is caused to react with silicon contained in the semiconductor substrate and the gate electrode to form a metal silicide film.

Abstract: In a semiconductor device in which the gate electrode of a MISFET formed on a semiconductor substrate is electrically connected to a well region under the channel of the MISFET, the MISFET is formed in an island-shaped element region formed on the semiconductor substrate, and electrical connection between the gate electrode of the MISFET and the well region in the semiconductor substrate is done on the side surface of the island-shaped element region.

Abstract: A semiconductor device includes a semiconductor substrate which has a cavity and has a source region, a drain region, and a channel region above the cavity, a gate electrode which is formed on the channel region with a gate insulating film interposed between the gate electrode and the channel region, and a stress generating film which has a first portion formed on the upper surface of the cavity and which gives a strain to the channel region.

Abstract: The present invention discloses a semiconductor device and a manufacturing method thereof which improves its characteristics even though it is miniaturized. According to one aspect of the present invention, it is provided a semiconductor device comprising a first semiconductor element device including a pair of first diffusion layers formed in the semiconductor substrate with a first gate electrode therebetween, and a first conductor layer formed in the first diffusion layer and having an internal stress in a first direction, and a second semiconductor element device including a pair of second diffusion layers formed in the semiconductor substrate with a second gate electrode therebetween, and a second conductor layer formed in the second diffusion layer, having an internal stress in a second direction opposite to the first direction, and constituted of the same element as that of the first conductor layer.

Abstract: A semiconductor device includes a silicon region including Si, and a silicide film provided on the silicon region, the silicide film comprising a compound of Si with Ni, Co, Pd, or Pt and including Er.

Abstract: Disclosed is a method for manufacturing a semiconductor device comprising implanting ions of an impurity element into a semiconductor region, implanting, into the semiconductor region, ions of a predetermined element which is a group IV element or an element having the same conductivity type as the impurity element and larger in mass number than the impurity element, and irradiating a region into which the impurity element and the predetermined element are implanted with light to anneal the region, the light having an emission intensity distribution, a maximum point of the distribution existing in a wavelength region of not more than 600 nm.

Abstract: A semiconductor integrated circuit includes a rectangular low speed circuit area including a low speed circuit comprising a low speed transistor having a first source extension region and a first drain extension region, and a rectangular high speed circuit area adjacent to the low speed circuit area and including a high speed circuit comprising a high speed transistor having a second source extension region and a second drain extension region thinner than the first source and drain extension regions.

Abstract: Disclosed is a method for manufacturing a semiconductor device comprising implanting ions of an impurity element into a semiconductor region, implanting, into the semiconductor region, ions of a predetermined element which is a group IV element or an element having the same conductivity type as the impurity element and larger in mass number than the impurity element, and irradiating a region into which the impurity element and the predetermined element are implanted with light to anneal the region, the light having an emission intensity distribution, a maximum point of the distribution existing in a wavelength region of not more than 600 nm.

Abstract: There is disclosed a method of manufacturing a semiconductor device comprising forming a diffusion region containing arsenic impurity at a concentration of 1×1020 cm?3 or more in an element region of Si substrate which is isolated by an element isolating insulation film with a gate electrode being employed as a mask, depositing Ni metal all over the substrate, heat-treating the substrate at a temperature of less than 400° C., thereby forming a nickel silicide film containing Ni2Si on the diffusion region, removing unreacted Ni metal deposited on the element isolating insulation film, heat-treating the substrate at a temperature of 450° C. or more, thereby forming an NiSi film having a arsenic compound layer on the surface thereof, removing the arsenic compound layer by an alkaline liquid, depositing an interlayer insulating film the entire surface of the substrate, and forming a wiring layer piercing through the interlayer insulating film.

Abstract: A semiconductor device includes an element separating insulating film provided on a semiconductor substrate to separate an element region. A gate electrode is arranged above the element region. Source/drain regions are formed in the semiconductor substrate to sandwich a region below the gate electrode. A silicide film is provided on the source/drain regions, extending onto the element separating insulating film. A contact hole extends through the interlayer insulating film, which is provided on the element separating insulating film and the silicide film, and reaches the silicide film. Ends of the contact hole are positioned on the silicide film and on the element separating insulating film. The contact hole includes a trench portion whose one end contacts with the edge of the silicide film in the bottom of the contact hole and in an upper portion of the element separating insulating film. A wiring layer is arranged in the contact hole.

Abstract: A method of manufacturing a semiconductor device includes forming a semiconductor region containing silicon and an insulator region on a major surface of a semiconductor substrate containing silicon as a main component; depositing a semiconductor film containing silicon as a main component on the semiconductor region and the insulator region; depositing a metal film which forms a silicide film by reacting with silicon on the semiconductor film; annealing the semiconductor substrate to form a first silicide film on the semiconductor region by reacting the metal film with silicon in the semiconductor film and in the semiconductor substrate under the semiconductor film in the semiconductor region and to form a second silicide film on the insulator region by reacting the metal film with the silicon in the semiconductor film in the insulator region; and selectively removing the second silicide film on the basis of a difference between the component of silicon and metal in the first silicide film and the component

Abstract: A semiconductor device comprises a support substrate, an insulation film provided on the support substrate, a rectangular silicon island provided on the insulation film, the rectangular silicon island having first side surfaces mutually opposed in a first direction and second side surfaces mutually opposed in a second direction perpendicular to the first direction, an insulation layer provided on an upper surface of the silicon island, a gate insulation film provided on the mutually opposed first side surfaces, respectively, a gate electrode provided on the insulation film such that the gate electrode extends to the first direction via the gate insulation film, a side-wall spacer provided respectively on both side walls of the gate electrode extending to the first direction, source/drain regions provided on the second side surfaces respectively, and source and drain electrodes that are provided respectively on the second side surfaces and are connected to the source/drain regions.

Abstract: There is disclosed is a semiconductor device which comprises a semiconductor substrate, isolation regions formed within the semiconductor substrate to define the active region, a pair of impurity diffusion regions formed within the element region in a manner to have surfaces elevated from the isolation region, a SiGe film formed on an upper surface of the impurity diffusion region so as to cover partly the side surface of the impurity diffusion region, a Ge concentration in the SiGe film being higher at a lower surface of the SiGe film than at an upper surface of the SiGe film, a metal silicide layer formed on the SiGe film, and a gate electrode formed in the active region of the semiconductor substrate with a gate insulating film interposed therebetween and having a sidewall insulating film formed on the side surface.

Abstract: To provide a cavity in the portion of the silicon substrate which lies beneath the channel region of the MOS transistor.

Abstract: There is disclosed is a semiconductor device which comprises a semiconductor substrate, isolation regions formed within the semiconductor substrate to define the active region, a pair of impurity diffusion regions formed within the element region in a manner to have surfaces elevated from the isolation region, a SiGe film formed on an upper surface of the impurity diffusion region so as to cover partly the side surface of the impurity diffusion region, a Ge concentration in the SiGe film being higher at a lower surface of the SiGe film than at an upper surface of the SiGe film, a metal silicide layer formed on the SiGe film, and a gate electrode formed in the active region of the semiconductor substrate with a gate insulating film interposed therebetween and having a sidewall insulating film formed on the side surface.

Abstract: There is disclosed a method of manufacturing a semiconductor device comprising forming a diffusion region containing arsenic impurity at a concentration of 1×1020 cm−3 or more in an element region of Si substrate which is isolated by an element isolating insulation film with a gate electrode being employed as a mask, depositing Ni metal all over the substrate, heat-treating the substrate at a temperature of less than 400° C., thereby forming a nickel silicide film containing Ni2Si on the diffusion region, removing unreacted Ni metal deposited on the element isolating insulation film, heat-treating the substrate at a temperature of 450° C. or more, thereby forming an NiSi film having a arsenic compound layer on the surface thereof, removing the arsenic compound layer by an alkaline liquid, depositing an interlayer insulating film the entire surface of the substrate, and forming a wiring layer piercing through the interlayer insulating film.

Abstract: A semiconductor device includes an element separating insulating film provided on a semiconductor substrate to separate an element region. A gate electrode is arranged above the element region. Source/drain regions are formed in the semiconductor substrate to sandwich a region below the gate electrode. A silicide film is provided on the source/drain regions, extending onto the element separating insulating film. A contact hole extends through the interlayer insulating film, which is provided on the element separating insulating film and the silicide film, and reaches the silicide film. Ends of the contact hole are positioned on the silicide film and on the element separating insulating film. The contact hole includes a trench portion whose one end contacts with the edge of the silicide film in the bottom of the contact hole and in an upper portion of the element separating insulating film. A wiring layer is arranged in the contact hole.

Abstract: In a semiconductor device in which the gate electrode of a MISFET formed on a semiconductor substrate is electrically connected to a well region under the channel of the MISFET, the MISFET is formed in an island-shaped element region formed on the semiconductor substrate, and electrical connection between the gate electrode of the MISFET and the well region in the semiconductor substrate is done on the side surface of the island-shaped element region.