Abstract: A semiconductor device includes: an n?-type base layer; a p-type base layer formed in a part of a front surface portion of the n?-type base layer; an n+-type source layer formed in a part of a front surface portion of the p-type base layer; a gate insulating film formed on the front surface of the p-type base layer between the n+-type source layer and the n?-type base layer; a gate electrode that faces the p-type base layer through the gate insulating film; a p-type column layer formed continuously from the p-type base layer in the n?-type base layer; a p+-type collector layer formed in a part of a rear surface portion of the n?-type base layer; a source electrode electrically connected to the n+-type source layer; and a drain electrode electrically connected to the n?-type base layer and to the p+-type collector layer.

Abstract: A semiconductor device includes an n-type drain layer, an n-type base layer provided on the n-type drain layer, a p-type base layer and an n-type source layer partially formed in surface layer portions of the n-type base layer and the p-type base layer, respectively, a gate insulation film formed on a surface of the p-type base layer between the n-type source layer and the n-type base layer, a gate electrode formed on the gate insulation film facing the p-type base layer across the gate insulation film, a p-type column layer formed within the n-type base layer to extend from the p-type base layer toward the n-type drain layer, a depletion layer alleviation region arranged between the p-type column layer and the n-type drain layer and including first baryons converted to donors, a source electrode connected to the n-type source layer, and a drain electrode connected to the n-type drain layer.

Abstract: A semiconductor device includes a p-type semiconductor layer, n-type column regions formed of columnar thermal donors exhibiting an n-type property, a p-type column region interposed between the n-type column regions, the n-type column regions configured to form a super-junction structure in cooperation with the p-type column region, a channel region formed in the semiconductor layer, a source region formed in the channel region, a gate insulator film formed on the semiconductor layer, and a gate electrode formed on the gate insulator film and opposite to the channel region across the gate insulator film.

Abstract: A semiconductor device includes: a first base layer; a drain layer disposed on the back side surface of the first base layer; a second base layer formed on the surface of the first base layer; a source layer formed on the surface of the second base layer; a gate insulating film disposed on the surface of both the source layer and the second base layer; a gate electrode disposed on the gate insulating film; a column layer formed in the first base layer of the lower part of both the second base layer and the source layer by opposing the drain layer; a drain electrode disposed in the drain layer; and a source electrode disposed on both the source layer and the second base layer, wherein heavy particle irradiation is performed to the column layer to form a trap level locally.

Abstract: A semiconductor device that includes the following is manufactured: an n? base layer; a p-type base layer formed on the surface of the n? base layer; an n+ source layer formed in the inner area of the p-type base layer; a gate electrode formed so as to face a channel region across a gate insulating film; a plurality of p-type columnar regions that are formed in the n? base layer so as to continue from the p-type base layer and that are arranged at a pitch P1; and a plurality of p+ collector layers that are selectively formed on the rear surface of the n? base layer and that are arranged at a pitch P2 larger than the pitch P1.

Abstract: A semiconductor device includes: an n?-type base layer; a p-type base layer formed in a part of a front surface portion of the n?-type base layer; an n+-type source layer formed in a part of a front surface portion of the p-type base layer; a gate insulating film formed on the front surface of the p-type base layer between the n+-type source layer and the n?-type base layer; a gate electrode that faces the p-type base layer through the gate insulating film; a p-type column layer formed continuously from the p-type base layer in the n?-type base layer; a p+-type collector layer formed in a part of a rear surface portion of the n?-type base layer; a source electrode electrically connected to the n+-type source layer; and a drain electrode electrically connected to the n?-type base layer and to the p+-type collector layer.

Abstract: An electrode tip magazine for a spot welder that does not interfere with the welding gun is provided. The magazine includes a magazine body formed with a storage part slidably aligning and storing a plurality of electrode tips therein, one end of this storage part serving as an externally opened supply port, a push-out member disposed to be freely slidable between both ends inside the storage part, a pulley disposed at a position adjacent to the supply port of the magazine body, a spiral spring disposed at a position at the other end of the storage part of the magazine body, and a wire connecting a distal end of the spiral spring and the push-out member with an intermediate portion thereof being wound around the pulley so as to always pull the push-out member toward the supply port by a biasing force of the spiral spring.

Abstract: A semiconductor device includes: a first base layer; a drain layer disposed on the back side surface of the first base layer; a second base layer formed on the surface of the first base layer; a source layer formed on the surface of the second base layer; a gate insulating film disposed on the surface of both the source layer and the second base layer; a gate electrode disposed on the gate insulating film; a column layer formed in the first base layer of the lower part of both the second base layer and the source layer by opposing the drain layer; a drain electrode disposed in the drain layer; and a source electrode disposed on both the source layer and the second base layer, wherein heavy particle irradiation is performed to the column layer to form a trap level locally.

Abstract: A semiconductor device includes a p-type semiconductor layer, n-type column regions formed of columnar thermal donors exhibiting an n-type property, a p-type column region interposed between the n-type column regions, the n-type column regions configured to form a super-junction structure in cooperation with the p-type column region, a channel region formed in the semiconductor layer, a source region formed in the channel region, a gate insulator film formed on the semiconductor layer, and a gate electrode formed on the gate insulator film and opposite to the channel region across the gate insulator film.

Abstract: A semiconductor device includes: an n?-type base layer; a p-type base layer formed in a part of a front surface portion of the n?-type base layer; an n+-type source layer formed in a part of a front surface portion of the p-type base layer; a gate insulating film formed on the front surface of the p-type base layer between the n+-type source layer and the n?-type base layer; a gate electrode that faces the p-type base layer through the gate insulating film; a p-type column layer formed continuously from the p-type base layer in the n?-type base layer; a p+-type collector layer formed in a part of a rear surface portion of the n?-type base layer; a source electrode electrically connected to the n+-type source layer; and a drain electrode electrically connected to the n?-type base layer and to the p+-type collector layer.

Abstract: A semiconductor device includes: a first base layer; a drain layer disposed on the back side surface of the first base layer; a second base layer formed on the surface of the first base layer; a source layer formed on the surface of the second base layer; a gate insulating film disposed on the surface of both the source layer and the second base layer; a gate electrode disposed on the gate insulating film; a column layer formed in the first base layer of the lower part of both the second base layer and the source layer by opposing the drain layer; a drain electrode disposed in the drain layer; and a source electrode disposed on both the source layer and the second base layer, wherein heavy particle irradiation is performed to the column layer o form a trap level locally.

Abstract: Provided are a semiconductor device which can shorten reverse recovery time without increasing leakage current between the drain and the source, and a fabrication method for such semiconductor device.

Abstract: A semiconductor device includes a p-type semiconductor layer, n-type column regions formed of columnar thermal donors exhibiting an n-type property, a p-type column region interposed between the n-type column regions, the n-type column regions configured to form a super-junction structure in cooperation with the p-type column region, a channel region formed in the semiconductor layer, a source region formed in the channel region, a gate insulator film formed on the semiconductor layer, and a gate electrode formed on the gate insulator film and opposite to the channel region across the gate insulator film.

Abstract: A magazine for spot welding electrodes that stores mini chips and can feed the mini chips one by one. A mini chip storage portion and a cap chip storage portion slidably aligning and storing a plurality of mini chips and a plurality of cap chips are formed such that the mini chip storage portion and cap chip storage portion communicate with each other at one of their ends, where they open to the outside to serve as a supply port. When an arm is inserted into the supply port, a cap chip is mounted to the arm, as well as the cap chip presses the mini chip so that the mini chip is also mounted to the chip base. When the mounting operation is complete, a push-out member pushes the mini chips and cap chips so that the mini chips and cap chips are automatically fed to the supply port.

Abstract: A synthetic resin composition containing, 100 parts by mass of a synthetic resin, 0.001-10 parts by mass of a triazine compound represented by (1) below, and 0.001-10 parts by mass of a diarylpentaerythritol diphosphite compound represented by general formula (2) shown below and/or 0.001-10 parts by mass of an organic cyclic phosphite compound represented by formula (3) below and/or 0.001-10 parts by mass of a hindered phenol compound represented by formula (4) below. In formula (1), R1 is C1-C12 alkyl group, etc.; R2 is C1-C8 alkyl group, etc.; R3 is hydroxyl group, etc.; and R4 is —O—R1, etc. In formula (2), R5 is C1-C4 alkyl group, etc. In formula (3), R6 and R8 is each C1-C4 alkyl group, etc, and R7 is C1-C18 alkyl group. In formula (4), R9 is a residue remaining after removing n hydroxyl groups from a mono- to tetravalent alcohol, and n is an integer 1-4.

Abstract: A semiconductor device includes an n-type drain layer, an n-type base layer provided on the n-type drain layer, a p-type base layer and an n-type source layer partially formed in surface layer portions of the n-type base layer and the p-type base layer, respectively, a gate insulation film formed on a surface of the p-type base layer between the n-type source layer and the n-type base layer, a gate electrode formed on the gate insulation film facing the p-type base layer across the gate insulation film, a p-type column layer formed within the n-type base layer to extend from the p-type base layer toward the n-type drain layer, a depletion layer alleviation region arranged between the p-type column layer and the n-type drain layer and including first baryons converted to donors, a source electrode connected to the n-type source layer, and a drain electrode connected to the n-type drain layer.

Abstract: The semiconductor device according to the present invention includes an SJMOSFET having a plurality of base regions formed at an interval from each other and an SBD (Schottky Barrier Diode) having a Schottky junction between the plurality of base regions. The SBD is provided in parallel with a parasitic diode of the SJMOSFET.

Abstract: A synthetic resin composition is obtained by mixing, to 100 parts by mass of a synthetic resin, 0.001-10 parts by mass of a triazine-based compound represented by general formula (1), 0.001-10 parts by mass of a diaryl pentaerythritol diphosphite compound represented by general formula (2), and/or 0.001-10 parts by mass of an organic cyclic phosphite compound represented by general formula (3), and/or 0.001-10 parts by mass of a hindered phenolic compound represented by general formula (4). (In formula (1), R1 represents an alkyl group having 1-12 carbon atoms, R2 represents an alkyl group having 1-8 carbon atoms, R3 represents a hydroxy group, and R4 represents —O—R1. In formula (2), R5 represents an alkyl group having 1-4 carbon atoms. In formula (3), R5 and R8 represent an alkyl group having 1-4 carbon atoms, and R7 represents an alkyl group having 1-18 carbon atoms.

Abstract: This invention provides a swing type electrode chip replacement apparatus which enables an electrode chip to be attached/detached without damaging a shank even if the shank is bent. The swing type electrode chip replacement apparatus comprises a fixed plate 20 located in the vicinity of a spot welding machine and a movable plate 21 slidable in the back-forth direction on the fixed plate 20, its front end being swingable in the right-left direction. An attaching unit 1 for attaching an electrode chip 95 to the tip of a shank 90 of a spot welding machine or a magazine of the electrode chip 60 for removing the electrode chip 95 is loaded on this movable plate 21, which is slidable in the back-forth direction and swingable in the right-left direction when the shank 90 comes into contact with the attaching unit 1 or the magazine of electrode chips 60.

Abstract: Provided are a semiconductor device which can shorten reverse recovery time without increasing leakage current between the drain and the source, and a fabrication method for such semiconductor device.