Patents by Inventor Toshio Negishi

Toshio Negishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11981129
    Abstract: An element substrate comprises a plurality of stages of shift registers that inputs and holds a serial data signal; a latch circuit that latches the serial data held by the shift registers; a decoder circuit that inputs an output of the latch circuit and outputs a selection signal for selecting a block of the print elements or the memory elements; and a mask circuit that masks the output of the selection signal for selecting the block of the memory elements from the decoder circuit in accordance with an input bit data signal. The block of the print elements or the memory elements includes a plurality of print elements or memory elements in which one element is selected in each of the plurality of groups.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: May 14, 2024
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Soichiro Nagamochi, Toshio Negishi, Yasuhiro Soeda
  • Patent number: 11975536
    Abstract: An element substrate including a liquid discharge element, comprising a memory element capable of storing individual information of the element substrate by a write, the memory element being configured to change an impedance value by the write, a plurality of current supply elements capable of supplying a current to the memory element, and a determination unit configured to determine presence/absence of the write based on a voltage generated in the memory element by the current selectively supplied from the plurality of current supply elements, wherein the plurality of current supply elements constitute a part of a current mirror circuit and each supply the current in an amount according to a size ratio to the memory element.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: May 7, 2024
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshio Negishi, Yasuhiro Soeda
  • Patent number: 11845274
    Abstract: A recording element substrate for a liquid ejection head is provided with a storage section including an antifuse element and a first resistor connected in parallel with the antifuse element, and a second resistor that is connected in parallel with the storage section and serves as a reference in rating information of the antifuse element, and a second switch connected to the second resistor.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: December 19, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshio Negishi, Suguru Taniguchi, Kazunari Fujii
  • Patent number: 11837301
    Abstract: A substrate includes a plurality of memory units each including an anti-fuse element and a switching element configured to switch application of a predetermined voltage to the anti-fuse element, a wiring to which the plurality of memory units are connected, a first electrode pad to which a voltage for supplying the predetermined voltage to the wiring is applied, and a second electrode pad to which a voltage for supplying the predetermined voltage to the wiring is applied.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: December 5, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masashi Fukuda, Toshio Negishi, Yasuhiro Soeda
  • Publication number: 20230302786
    Abstract: A printing element board includes a plurality of memory modules each including a memory element and a driving circuit, a plurality of discharge modules, a control data supply unit configured to select one of a memory module and a discharge module from the plurality of memory modules and the plurality of discharge modules and perform drive control, and a logical product calculation unit configured to, when the memory module is selected, receive a first signal and a second signal output at the same timing, and supply a signal indicating a logical product of the first and second signals to the control data supply unit. When the signal indicating the logical product of the first and second signals is not supplied from the calculation unit, the supply unit does not perform drive control of the memory module.
    Type: Application
    Filed: March 21, 2023
    Publication date: September 28, 2023
    Inventors: RYOHEI YAMADA, TOSHIO NEGISHI
  • Publication number: 20230290421
    Abstract: A readout method of a memory module of a substrate including the memory module including an anti-fuse element, and a function module connected in parallel with the memory module and including a resistance element, including setting the function module to a conducted state when reading out the memory module, setting the function module from the conducted state to an open state following the setting the function module to the conducted state, and reading out a terminal voltage of the anti-fuse element by setting the memory module to the conducted state following the setting the function module from the conducted state to the open state.
    Type: Application
    Filed: February 15, 2023
    Publication date: September 14, 2023
    Inventors: RYOHEI YAMADA, TOSHIO NEGISHI
  • Patent number: 11607881
    Abstract: In a head substrate according to an embodiment of the present invention comprises a plurality of nozzles for discharging liquid; a plurality of electrothermal transducers corresponding to the plurality of nozzles; and a plurality of drivers corresponding to the plurality of electrothermal transducers, the substrate has the following configuration. Specifically, it comprises a detection circuit that detects, in a case where one of the plurality of electrothermal transducers is selected, a temperature of the selected transducer to which a first signal is applied to in order to discharge a liquid from a nozzle corresponding to the selected electrothermal transducer, and then a second signal is applied to heat the selected electrothermal transducer.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: March 21, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Ryo Kasai, Toshio Negishi, Nobuyuki Hirayama
  • Publication number: 20220293201
    Abstract: A device, comprising a plurality of units arrayed in a predetermined direction, a first terminal configured to supply a voltage to the plurality of units, and a second terminal configured to supply a voltage to the plurality of units, wherein the plurality of units include a first unit including a memory element arranged between the first terminal and the second terminal, and a first transistor configured to perform write to the memory element, and a second unit including a second transistor arranged between the first terminal and the second terminal in correspondence with the first transistor of the first unit.
    Type: Application
    Filed: March 4, 2022
    Publication date: September 15, 2022
    Inventors: Sadayoshi Sakuma, Toshio Negishi, Yasuhiro Soeda
  • Publication number: 20220288924
    Abstract: An element substrate comprises a plurality of stages of shift registers that inputs and holds a serial data signal; a latch circuit that latches the serial data held by the shift registers; a decoder circuit that inputs an output of the latch circuit and outputs a selection signal for selecting a block of the print elements or the memory elements; and a mask circuit that masks the output of the selection signal for selecting the block of the memory elements from the decoder circuit in accordance with an input bit data signal. The block of the print elements or the memory elements includes a plurality of print elements or memory elements in which one element is selected in each of the plurality of groups.
    Type: Application
    Filed: March 10, 2022
    Publication date: September 15, 2022
    Inventors: Soichiro Nagamochi, Toshio Negishi, Yasuhiro Soeda
  • Publication number: 20220293199
    Abstract: A switch is configured to switch connection between a second terminal to which a data signal is input and a memory control signal of a memory element in accordance with a switching signal included in a data signal. In write to a memory element, the switching signal switches such that the switch connects the second terminal and the memory control signal of the memory element, and a pulse signal for the write to the memory element is input via the second terminal.
    Type: Application
    Filed: March 10, 2022
    Publication date: September 15, 2022
    Inventors: Suguru Taniguchi, Toshio Negishi, Yasuhiro Soeda
  • Publication number: 20220293200
    Abstract: A substrate includes a plurality of memory units each including an anti-fuse element and a switching element configured to switch application of a predetermined voltage to the anti-fuse element, a wiring to which the plurality of memory units are connected, a first electrode pad to which a voltage for supplying the predetermined voltage to the wiring is applied, and a second electrode pad to which a voltage for supplying the predetermined voltage to the wiring is applied.
    Type: Application
    Filed: March 3, 2022
    Publication date: September 15, 2022
    Inventors: Masashi Fukuda, Toshio Negishi, Yasuhiro Soeda
  • Publication number: 20220266590
    Abstract: An element substrate including a liquid discharge element, comprising a memory element capable of storing individual information of the element substrate by a write, the memory element being configured to change an impedance value by the write, a plurality of current supply elements capable of supplying a current to the memory element, and a determination unit configured to determine presence/absence of the write based on a voltage generated in the memory element by the current selectively supplied from the plurality of current supply elements, wherein the plurality of current supply elements constitute a part of a current mirror circuit and each supply the current in an amount according to a size ratio to the memory element.
    Type: Application
    Filed: February 11, 2022
    Publication date: August 25, 2022
    Inventors: Toshio Negishi, Yasuhiro Soeda
  • Publication number: 20220126576
    Abstract: A recording element substrate for a liquid ejection head is provided with a storage section including an antifuse element and a first resistor connected in parallel with the antifuse element, and a second resistor that is connected in parallel with the storage section and serves as a reference in rating information of the antifuse element, and a second switch connected to the second resistor.
    Type: Application
    Filed: January 6, 2022
    Publication date: April 28, 2022
    Inventors: Toshio Negishi, Suguru Taniguchi, Kazunari Fujii
  • Patent number: 11247461
    Abstract: A recording element substrate for a liquid ejection head is provided with a storage section including an antifuse element and a first resistor connected in parallel with the antifuse element, and a second resistor that is connected in parallel with the storage section and serves as a reference in rating information of the antifuse element, and a second switch connected to the second resistor.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: February 15, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshio Negishi, Suguru Taniguchi, Kazunari Fujii
  • Publication number: 20210187941
    Abstract: In a head substrate according to an embodiment of the present invention comprises a plurality of nozzles for discharging liquid; a plurality of electrothermal transducers corresponding to the plurality of nozzles; and a plurality of drivers corresponding to the plurality of electrothermal transducers, the substrate has the following configuration. Specifically, it comprises a detection circuit that detects, in a case where one of the plurality of electrothermal transducers is selected, a temperature of the selected transducer to which a first signal is applied to in order to discharge a liquid from a nozzle corresponding to the selected electrothermal transducer, and then a second signal is applied to heat the selected electrothermal transducer.
    Type: Application
    Filed: December 16, 2020
    Publication date: June 24, 2021
    Inventors: Ryo Kasai, Toshio Negishi, Nobuyuki Hirayama
  • Patent number: 10894403
    Abstract: An apparatus includes a substrate, a transistor provided on the substrate and connected to a first terminal supplied with a first voltage, an anti-fuse element provided on the substrate and connected between the transistor and a second terminal supplied with a second voltage, a first resistive element provided on the substrate and connected in parallel to the anti-fuse element and between the transistor and the second terminal, and an adjusting unit provided on the substrate and configured to function so as to reduce an influence of variation in resistance of the first resistive element in reading out of information from the anti-fuse element.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: January 19, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazunari Fujii, Naoki Isoda, Toshio Negishi, Wataru Endo
  • Publication number: 20200207089
    Abstract: A recording element substrate for a liquid ejection head is provided with a storage section including an antifuse element and a first resistor connected in parallel with the antifuse element, and a second resistor that is connected in parallel with the storage section and serves as a reference in rating information of the antifuse element, and a second switch connected to the second resistor.
    Type: Application
    Filed: December 20, 2019
    Publication date: July 2, 2020
    Inventors: Toshio Negishi, Suguru Taniguchi, Kazunari Fujii
  • Patent number: 10566069
    Abstract: A semiconductor apparatus includes a transistor connected to a first potential terminal having a first potential, an anti-fuse element connected between the transistor and a second potential terminal having a second potential, a resistive element connected in parallel with the anti-fuse element between the transistor and the second potential terminal, and a temperature adjustment unit disposed to face the resistive element.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: February 18, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazunari Fujii, Toshio Negishi
  • Patent number: 10500851
    Abstract: A print element substrate, comprises: a heater layer; a wiring layer that is connected to the heater layer and is for causing the heater layer to generate heat; an insulating layer arranged on the wiring layer; an anti-cavitation layer arranged on the insulating layer that is for protecting the insulating layer; and a switch that has a control terminal that is pulled-down to a ground, and causes the anti-cavitation layer and the ground to have an electrical connection when the control terminal is in a high-level state.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: December 10, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yohei Osuki, Koichi Omata, Hideo Tamura, Takaaki Yamaguchi, Kousuke Kubo, Ryoji Oohashi, Yuji Tamaru, Toshio Negishi, Suguru Taniguchi
  • Patent number: 10201969
    Abstract: A recording element substrate includes a signal supply circuit and a common line which connects the signal supply circuit to first logic circuit array for a recording element and a second logic circuit array for a memory element in common. Furthermore, the first and second logic circuit arrays extend along a direction in which the common line extends, the first logic circuit array is disposed on one side of the common line, the second logic circuit array is disposed on the other side of the common line, and the first and second logic circuit arrays are arranged so that at least a portion of the first logic circuit array and a portion of the second logic circuit array overlap with each other in a direction orthogonal to the extending direction.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: February 12, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshio Negishi, Suguru Taniguchi, Kazunari Fujii