Patents by Inventor Toshiro Sato

Toshiro Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090209653
    Abstract: Provided is a substance which is a safer and more commonly-consumed food ingredient that increase the testosterone level. The testosterone enhancer of the invention comprises vitamin K as an active ingredient. The vitamin is preferably menaquinone-4 and/or menaquinone-7. This enhancer is useful as pharmaceutical agents, supplements, health foods or functional foods for the prevention, amelioration and/or treatment of a condition or disease induced by the decreased testosterone level.
    Type: Application
    Filed: May 21, 2007
    Publication date: August 20, 2009
    Inventors: Michio Komai, Hitoshi Shirakawa, Yusuke Ohsaki, Tadashi Takumi, Asagi Ito, Toshiro Sato, Rumi Ozaki
  • Publication number: 20090186145
    Abstract: The present invention is intended to provide a composition for preventing or improving metabolic syndrome, which is safe and efficiently ingestible. Provided is a composition for reducing blood cholesterol level, improving blood HDL/LDL cholesterol ratio, reducing blood triglyceride level, reducing blood sugar level, controlling increase in liver weight, and/or reducing body weight, the composition containing soybean germ protein as an active ingredient. The composition according to the present invention improves blood cholesterol level, triglyceride, and glucose levels thereby contributing to health promotion.
    Type: Application
    Filed: June 19, 2007
    Publication date: July 23, 2009
    Applicant: J-OIL MILLS, INC.
    Inventors: Sanshirou Saito, Toshiro Sato, Syuichi Kamo, Yousuke Isobe
  • Publication number: 20090118226
    Abstract: To promote the growth of human beings or animals, prevent the onset of diarrhea and prevent or ameliorate various diseases, it is intended to provide a substance which has an effect of decreasing eosinophils in the intestinal tract and a feed comprising the same as a feed additive. Namely, an intestinal eosinophil-suppressing composition which contains an ?-linked galactooligosaccharide as the active ingredient. When added in an amount of from 0.01 to 10% by weight, in terms of the saccharide, to an animal feed, this composition is useful in providing an intestinal eosinophil-suppressing feed.
    Type: Application
    Filed: May 21, 2007
    Publication date: May 7, 2009
    Inventors: Kazunari Ushida, Sanshiro Saito, Toshiro Sato, Yosuke Isobe, Koki Fujita, Tetsuya Ito
  • Patent number: 7454725
    Abstract: The invention is aimed to analyze the characteristics of a transmission line only by inputting the specific distributed parameters without mesh dividing the transmission line to be analyzed into minimal unit required for the analysis. An arithmetic operation section 12 solves a differential equation regarding electromagnetic interaction of each line segment based on the predetermined distributed parameters, including a distributed self-inductance Li, a distributed resistance Ri, and a distributed capacitance ci and a distributed conductance gi in relation to a reference potential plane in the transmission line, and a distributed mutual inductance Mij, a distributed capacitance Cij, and a distributed conductance Gij between the transmission line and another transmission line, which are input from an input section 11, and calculates the characteristic data of the transmission line.
    Type: Grant
    Filed: July 6, 2004
    Date of Patent: November 18, 2008
    Assignee: Hioki Denki Kabushiki Kaisha
    Inventors: Koichi Yanagisawa, Fuchun Zhang, Toshiro Sato
  • Patent number: 7398497
    Abstract: An electronic circuit designing method and apparatus designs an electronic circuit by CAD, by generating design constraints with respect to the electronic circuit based on at least one of general layout and wiring information related to devices and wirings included in the electronic circuit, user requirements defined by a user, and user resources defined by the user, and urging an input to the user by displaying the design constraints.
    Type: Grant
    Filed: November 22, 2004
    Date of Patent: July 8, 2008
    Assignee: Fujitsu Limited
    Inventors: Toshiro Sato, Kazumasa Kobayashi, Shogo Fujimori
  • Patent number: 7322019
    Abstract: An electronic circuit designing method and apparatus designs an electronic circuit by CAD, by generating design constraints with respect to the electronic circuit based on at least one of general layout and wiring information related to devices and wirings included in the electronic circuit, user requirements defined by a user, and user resources defined by the user, and urging an input to the user by displaying the design constraints.
    Type: Grant
    Filed: July 9, 2002
    Date of Patent: January 22, 2008
    Assignee: Fujitsu Limited
    Inventors: Toshiro Sato, Kazumasa Kobayashi, Shogo Fujimori
  • Patent number: 7166582
    Abstract: The present invention provides a sate and excellent antiallergic composition, and more particularly a preventive and therapeutic composition for atopic dermatitis, including an antiallergic composition blended with stachyose as an effective ingredient, and a medicine, food and beverage containing the composition.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: January 23, 2007
    Assignee: J-Oil Mills, Inc.
    Inventors: Toshiro Sato, Shuichi Kamo, Yutaka Ohtani, Yasushi Ueno
  • Publication number: 20050256084
    Abstract: The present invention provides a sate and excellent antiallergic composition, and more particularly a preventive and therapeutic composition for atopic dermatitis, including an antiallergic composition blended with stachyose as an effective ingredient, and a medicine, food and beverage containing the composition.
    Type: Application
    Filed: July 25, 2005
    Publication date: November 17, 2005
    Applicant: KABUSHIKI KAISHA HONEN CORPORATION
    Inventors: Toshiro Sato, Shuichi Kamo, Yutaka Ohtani, Yasushi Ueno
  • Patent number: 6915249
    Abstract: In order to achieve augmentation of the accuracy in calculation of noise and augmentation of the accuracy in a noise check which is performed, for example, when an electronic circuit is designed and further realize significant reduction of the time required for a noise check and augmentation of the operation efficiency by reduction of the man-hours of a designer in a noise analysis, a noise checking apparatus includes a model production section (3) for producing a simulation model of a circuit portion relating to a noticed wiring line, a simulation section (4) for performing a simulation using the simulation model to calculate a signal waveform which propagates in the noticed wiring line and calculate a noise waveform superposed on the signal waveform for each kind of noise, a noise waveform synthesis section (5) for synthesizing the signal waveform and the noise waveforms with generation timings of the noise waveforms taken into consideration to obtain a noise composite waveform, and a noise checking section
    Type: Grant
    Filed: November 9, 2000
    Date of Patent: July 5, 2005
    Assignee: Fujitsu Limited
    Inventors: Toshiro Sato, Yuji Suwa, Yoshiyuki Iwakura, Kazunari Gotou, Toshiaki Sato, Kazuyoshi Kanei, Masaki Tosaka, Yasuhiro Yamashita
  • Publication number: 20050086626
    Abstract: An electronic circuit designing method and apparatus designs an electronic circuit by CAD, by generating design constraints with respect to the electronic circuit based on at least one of general layout and wiring information related to devices and wirings included in the electronic circuit, user requirements defined by a user, and user resources defined by the user, and urging an input to the user by displaying the design constraints.
    Type: Application
    Filed: November 22, 2004
    Publication date: April 21, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Toshiro Sato, Kazumasa Kobayashi, Shogo Fujimori
  • Publication number: 20050010380
    Abstract: The invention is aimed to analyze the characteristics of a transmission line only by inputting the specific distributed parameters without mesh dividing the transmission line to be analyzed into minimal unit required for the analysis. An arithmetic operation section 12 solves a differential equation regarding electromagnetic interaction of each line segment based on the predetermined distributed parameters, including a distributed self-inductance Li, a distributed resistance Ri, and a distributed capacitance ci and a distributed conductance gi in relation to a reference potential plane in the transmission line, and a distributed mutual inductance Mij, a distributed capacitance Cij, and a distributed conductance Gij between the transmission line and another transmission line, which are input from an input section 11, and calculates the characteristic data of the transmission line.
    Type: Application
    Filed: July 6, 2004
    Publication date: January 13, 2005
    Inventors: Koichi Yanagisawa, Fuchun Zhang, Toshiro Sato
  • Publication number: 20040102416
    Abstract: The present invention provides a safe and excellent antiallergic composition, and more particularly a preventive and therapeutic composition for atopic dermatitis, including an antiallergic composition blended with stachyose as an effective ingredient, and a medicine, food and beverage containing the composition.
    Type: Application
    Filed: November 7, 2003
    Publication date: May 27, 2004
    Applicant: KABUSHIKI KAISHA HONEN CORPORATION
    Inventors: Toshiro Sato, Shuichi Kamo, Yutaka Ohtani, Yasushi Ueno
  • Patent number: 6593841
    Abstract: Disclosed herein is a planar magnetic element comprising a substrate, a first magnetic layer arranged over the substrate, a first insulation layer arranged over the first magnetic layer, a planer coil formed of a conductor, having a plurality of turns, arranged over the first insulation layer and having a gap aspect ratio of at least 1, the gap aspect ratio being the ratio of the thickness of the conductor to the gap between any adjacent two of the turns, a second insulation layer arranged over the planar coil, and a second magnetic layer arranged over the second insulation layer. When used as an inductor, the planar magnetic element has a great quality coefficient Q. When used as a transformer, it has a large gain and a high voltage ratio. Since the element is small and thin, it is suitable for use in an integrated circuit, and can greatly contribute to miniaturization of electronic devices.
    Type: Grant
    Filed: August 23, 1996
    Date of Patent: July 15, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuhiko Mizoguchi, Toshiro Sato, Masashi Sahashi, Michio Hasegawa, Hiroshi Tomita, Atsuhito Sawabe
  • Publication number: 20030014725
    Abstract: An electronic circuit designing method and apparatus designs an electronic circuit by CAD, by generating design constraints with respect to the electronic circuit based on at least one of general layout and wiring information related to devices and wirings included in the electronic circuit, user requirements defined by a user, and user resources defined by the user, and urging an input to the user by displaying the design constraints.
    Type: Application
    Filed: July 9, 2002
    Publication date: January 16, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Toshiro Sato, Kazumasa Kobayashi, Shogo Fujimori
  • Patent number: 6404317
    Abstract: Disclosed herein is a planar magnetic element comprising a substrate, a first magnetic layer arranged over the substrate, a first insulation layer arranged over the first magnetic layer, a planer coil formed of a conductor, having a plurality of turns, arranged over the first insulation layer and having a gap aspect ratio of at least 1, the gap aspect ratio being the ratio of the thickness of the conductor to the gap between any adjacent two of the turns, a second insulation layer arranged over the planar coil, and a second magnetic layer arranged over the second insulation layer. When used as an inductor, the planar magnetic element has a great quality coefficient Q. When used as a transformer, it has a large gain and a high voltage ratio. Since the element is small and thin, it is suitable for use in an integrated circuit, and can greatly contribute to miniaturization of electronic devices.
    Type: Grant
    Filed: August 23, 1996
    Date of Patent: June 11, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuhiko Mizoguchi, Toshiro Sato, Masashi Sahashi, Michio Hasegawa, Hiroshi Tomita, Atsuhito Sawabe
  • Patent number: 6356079
    Abstract: The present invention provides a magnetic-field sensor using a magnetic substance. In the magnetic-field sensor, a transmission-line element constituted of a conductor layer, dielectric layer and a magnetic layer is inserted in a feedback circuit of a phase-shift type oscillation circuit using an open-loop operational amplifier as an amplifier. An output of the operational amplifier is fed back to an input thereof through the transmission-line element. Thus, a variation in oscillation frequency depending upon the intensity of an external magnetic field is detected as an output of the sensor.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: March 12, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuhiko Mizoguchi, Tetsuo Inoue, Toshiro Sato
  • Patent number: 6278951
    Abstract: A crosstalk noise calculation method for calculating crosstalk noise among a plurality of wirings, includes calculating a crosstalk noise using a function in which the crosstalk noise becomes approximately constant when a predetermined wiring length is exceeded, so as to improve the design efficiency of the wirings by preventing an excessively strict checking from being performed.
    Type: Grant
    Filed: January 5, 1999
    Date of Patent: August 21, 2001
    Assignee: Fujitsu Limited
    Inventor: Toshiro Sato
  • Patent number: 5966063
    Abstract: A planar magnetic device in which the high-frequency loss in the coil conductor can be reduced. The device comprises a planar coil formed of a coil conductor constituted by a plurality of conductor lines. The coil conductor is provided in the form of a spiral. The planar coil is interposed between two insulating layers which are sandwiched between two soft-magnetic layers.
    Type: Grant
    Filed: August 19, 1996
    Date of Patent: October 12, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiro Sato, Tetsuhiko Mizoguchi
  • Patent number: 5801521
    Abstract: Disclosed herein is a planar magnetic element comprising a substrate, a first magnetic layer arranged over the substrate, a first insulation layer arranged over the first magnetic layer, a planer coil formed of a conductor, having a plurality of turns, arranged over the first insulation layer and having a gap aspect ratio of at least 1, the gap aspect ratio being the ratio of the thickness of the conductor to the gap between any adjacent two of the turns, a second insulation layer arranged over the planar coil, and a second magnetic layer arranged over the second insulation layer. When used as an inductor, the planar magnetic element has a great quality coefficient Q. When used as a transformer, it has a large gain and a high voltage ratio. Since the element is small and thin, it is suitable for use in an integrated circuit, and can greatly contribute to miniaturization of electronic devices.
    Type: Grant
    Filed: September 3, 1996
    Date of Patent: September 1, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuhiko Mizoguchi, Toshiro Sato, Masashi Sahashi, Michio Hasegawa, Hiroshi Tomita, Atsuhito Sawabe
  • Patent number: 5738931
    Abstract: A electronic device is disclosed having an underlying conductor formed in a predetermined pattern on a surface of an underlying insulator and made of at least one member selected from the group consisting of Ti, Ta, Mo, Cr, Nb and W and their alloy, a main conductor made of Cu formed in a predetermined pattern on the underlying conductor, a first coating conductor made of at least one member selected from the group consisting of Ti, Ta, Mo, Nb and Ni and their alloy, and a second coating conductor made of at least one member selected from the group consisting of Au and Al and their alloy that are formed in this order so as to coat a surface of the main conductor made of Cu facing the surrounding insulator.
    Type: Grant
    Filed: September 13, 1995
    Date of Patent: April 14, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiro Sato, Tetsuhiko Mizoguchi