Patents by Inventor Toshiya Uozumi
Toshiya Uozumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080278245Abstract: An RF IC in which a PLL circuit including a loop filter is incorporated into a semiconductor chip is achieved without increasing power consumption or chip size. The RF IC includes a VCO capable of switching oscillation frequency bands, a variable frequency divider, a phase comparator, and a loop filter, which are contained in the PLL loop. A discrimination circuit discriminates a lead or lag in a phase of an output signal from the variable frequency divider against a reference signal and an automatic band selecting circuit generates a signal for switching the frequency bands of the VCO based on output from the discrimination circuit. While switching the frequency bands of the VCO by means of bisection algorithm, the RF IC detects an optimum frequency band, and adds offset to it to determine a final usable frequency band.Type: ApplicationFiled: July 10, 2008Publication date: November 13, 2008Inventors: Toshiya Uozumi, Hirotaka Osawa, Jiro Shinbo, Satoru Yamamoto
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Patent number: 7450921Abstract: The invention provides a communication semiconductor integrated circuit (RF IC) that, when a transmission oscillator is incorporated into a semiconductor chip, secures the oscillation operation over a wide frequency range, prevents a deterioration of a transmission spectrum, and thereby enhances the accuracy of an oscillation frequency. The integrated circuit corrects a dispersion of the KV characteristic of the transmission oscillator by calibrating a current Icp of the charge pump inside the phase control loop. More in concrete, the integrated circuit measures a KV value Kv of the transmission oscillator, and calibrates the current Icp of the charge pump so that Kv·Icp falls into a predetermined value.Type: GrantFiled: January 11, 2007Date of Patent: November 11, 2008Assignee: Renesas Technology Corp.Inventors: Satoshi Arayashiki, Hirotaka Oosawa, Noriyuki Kurakami, Akira Okasaka, Yasuyuki Kimura, Toshiya Uozumi, Hirokazu Miyagawa, Satoshi Tanaka
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Patent number: 7423493Abstract: An RF IC in which a PLL circuit including a loop filter is incorporated into a semiconductor chip is achieved without increasing power consumption or chip size. The RF IC includes a VCO capable of switching oscillation frequency bands, a variable frequency divider, a phase comparator, and a loop filter, which are contained in the PLL loop. A discrimination circuit discriminates a lead or lag in a phase of an output signal from the variable frequency divider against a reference signal and an automatic band selecting circuit generates a signal for switching the frequency bands of the VCO based on output from the discrimination circuit. While switching the frequency bands of the VCO by means of bisection algorithm, the RF IC detects an optimum frequency band, and adds offset to it to determine a final usable frequency band.Type: GrantFiled: August 10, 2006Date of Patent: September 9, 2008Assignee: Renesas Technology CorporationInventors: Toshiya Uozumi, Hirotaka Osawa, Jiro Shinbo, Satoru Yamamoto
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Publication number: 20080012649Abstract: In a PLL circuit including an oscillator, a phase comparator, a charge pump circuit, and a loop filter, without providing a plurality of capacitative elements, that is, without increasing the occupied area so much, the characteristics of the PLL circuit can be adjusted according to manufacture variations in a resistive element and a capacitative element, and a loop filter can be formed on a chip. A resistive element and a capacitative element of a loop filter are formed on a semiconductor chip. As the resistive element, a plurality of elements having different resistance values are provided and switched by a switch, thereby enabling the resistance value to be adjusted. Current in a charge pump circuit is also made adjustable, and the current of the charge pump circuit is adjusted according to switching among the resistance values of the resistive elements.Type: ApplicationFiled: September 5, 2007Publication date: January 17, 2008Inventors: Jiro Shinbo, Satoshi Arayashiki, Hirotaka Oosawa, Toshiya Uozumi, Satoru Yamamoto
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Publication number: 20080012650Abstract: In a PLL circuit including an oscillator, a phase comparator, a charge pump circuit, and a loop filter, without providing a plurality of capacitative elements, that is, without increasing the occupied area so much, the characteristics of the PLL circuit can be adjusted according to manufacture variations in a resistive element and a capacitative element, and a loop filter can be formed on a chip. A resistive element and a capacitative element of a loop filter are formed on a semiconductor chip. As the resistive element, a plurality of elements having different resistance values are provided and switched by a switch, thereby enabling the resistance value to be adjusted. Current in a charge pump circuit is also made adjustable, and the current of the charge pump circuit is adjusted according to switching among the resistance values of the resistive elements.Type: ApplicationFiled: September 5, 2007Publication date: January 17, 2008Inventors: Jiro Shinbo, Satoshi Arayashiki, Hirotaka Oosawa, Toshiya Uozumi, Satoru Yamamoto
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Publication number: 20070281651Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.Type: ApplicationFiled: June 8, 2007Publication date: December 6, 2007Inventors: Hirotaka Oosawa, Masumi Kasahara, Noriyuki Kurakami, Toshiya Uozumi
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Publication number: 20070236297Abstract: A level converter level-converts an oscillation output signal of a reference frequency oscillator and supplies the level-converted signal to a phase comparator of a PLL/fractional synthesizer for controlling an oscillation frequency of an RF transmission voltage-controlled oscillator. The level converter includes a self-bias type voltage amplifier which amplifies a reference frequency signal of the reference frequency oscillator. The self-bias type voltage amplifier includes a coupling capacitor, an amplifying transistor, a load and a bias element and suppresses a variation in the level of each harmonic component even though an external power supply voltage varies.Type: ApplicationFiled: January 24, 2007Publication date: October 11, 2007Inventors: Toshiya UOZUMI, Jiro Shimbo
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Patent number: 7279991Abstract: In a PLL circuit including an oscillator, a phase comparator, a charge pump circuit, and a loop filter, without providing a plurality of capacitative elements, that is, without increasing the occupied area so much, the characteristics of the PLL circuit can be adjusted according to manufacture variations in a resistive element and a capacitative element, and a loop filter can be formed on a chip. A resistive element and a capacitative element of a loop filter are formed on a semiconductor chip. As the resistive element, a plurality of elements having different resistance values are provided and switched by a switch, thereby enabling the resistance value to be adjusted. Current in a charge pump circuit is also made adjustable, and the current of the charge pump circuit is adjusted according to switching among the resistance values of the resistive elements.Type: GrantFiled: July 12, 2005Date of Patent: October 9, 2007Assignee: Renesas Technology Corp.Inventors: Jiro Shinbo, Satoshi Arayashiki, Hirotaka Oosawa, Toshiya Uozumi, Satoru Yamamoto
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Patent number: 7269402Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.Type: GrantFiled: July 25, 2006Date of Patent: September 11, 2007Assignees: Renesas Technology Corp., TTP Com LimitedInventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Astle Henshaw
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Patent number: 7263340Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.Type: GrantFiled: July 25, 2006Date of Patent: August 28, 2007Assignees: Renesas Technology Corporation, TTP Com LimitedInventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Astle Henshaw
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Publication number: 20070164828Abstract: In a communication semiconductor integrated circuit device using offset PLL architectures and including an oscillator circuit and a frequency divider circuit generating an intermediate frequency signal, the oscillator circuit includes an oscillator, a programmable frequency divider which frequency-divides the oscillation signal in accordance with frequency division information, a phase comparator detecting a phase difference between an output signal of the programmable frequency divider and a reference signal, and a frequency control unit for outputting a signal indicative of the phase difference and controlling the oscillation frequency of the oscillator, wherein a frequency division ratio generator circuit generates an integer part I and a fraction part F/G based on band information concerning the use frequency band and mode information along with channel information and for producing the frequency division ratio information to thereby give it to the programmable frequency divider.Type: ApplicationFiled: March 26, 2007Publication date: July 19, 2007Inventors: Toshiya Uozumi, Yasuyuki Kimura, Hirotaka Osawa, Satoru Yamamoto, Robert Henshaw
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Publication number: 20070161360Abstract: In a communication semiconductor integrated circuit device using offset PLL architectures and including an oscillator circuit and a frequency divider circuit generating an intermediate frequency signal, the oscillator circuit includes an oscillator, a programmable frequency divider which frequency-divides the oscillation signal in accordance with frequency division information, a phase comparator detecting a phase difference between an output signal of the programmable frequency divider and a reference signal, and a frequency control unit for outputting a signal indicative of the phase difference and controlling the oscillation frequency of the oscillator, wherein a frequency division ratio generator circuit generates an integer part I and a fraction part F/G based on band information concerning the use frequency band and mode information along with channel information and for producing the frequency division ratio information to thereby give it to the programmable frequency divider.Type: ApplicationFiled: March 26, 2007Publication date: July 12, 2007Inventors: Toshiya Uozumi, Yasuyuki Kimura, Hirotaka Osawa, Satoru Yamamoto, Robert Henshaw
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Patent number: 7242916Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.Type: GrantFiled: September 12, 2006Date of Patent: July 10, 2007Assignee: Renesas Technology Corp.Inventors: Hirotaka Oosawa, Masumi Kasahara, Noriyuki Kurakami, Toshiya Uozumi
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Publication number: 20070111675Abstract: The invention provides a communication semiconductor integrated circuit (RF IC) that, when a transmission oscillator is incorporated into a semiconductor chip, secures the oscillation operation over a wide frequency range, prevents a deterioration of a transmission spectrum, and thereby enhances the accuracy of an oscillation frequency. The integrated circuit corrects a dispersion of the KV characteristic of the transmission oscillator by calibrating a current Icp of the charge pump inside the phase control loop. More in concrete, the integrated circuit measures a KV value Kv of the transmission oscillator, and calibrates the current Icp of the charge pump so that Kv·Icp falls into a predetermined value.Type: ApplicationFiled: January 11, 2007Publication date: May 17, 2007Inventors: Satoshi Arayashiki, Hirotaka Oosawa, Noriyuki Kurakami, Akira Okasaka, Yasuyuki Kimura, Toshiya Uozumi, Hirokazu Miyagawa, Satoshi Tanaka
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Patent number: 7205850Abstract: In a communication semiconductor integrated circuit device using offset PLL architectures and including an oscillator circuit and a frequency divider circuit generating an intermediate frequency signal, the oscillator circuit includes an oscillator, a programmable frequency divider which frequency-divides the oscillation signal in accordance with frequency division information, a phase comparator detecting a phase difference between an output signal of the programmable frequency divider and a reference signal, and a frequency control unit for outputting a signal indicative of the phase difference and controlling the oscillation frequency of the oscillator, wherein a frequency division ratio generator circuit generates an integer part I and a fraction part F/G based on band information concerning the use frequency band and mode information along with channel information and for producing the frequency division ratio information to thereby give it to the programmable frequency divider.Type: GrantFiled: July 15, 2005Date of Patent: April 17, 2007Assignees: Renesas Technology Corp., TTPCom LimitedInventors: Toshiya Uozumi, Yasuyuki Kimura, Hirotaka Osawa, Satoru Yamamoto, Robert Astel Henshaw
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Patent number: 7187911Abstract: The invention provides a communication semiconductor integrated circuit (RF IC) that, when a transmission oscillator is incorporated into a semiconductor chip, secures the oscillation operation over a wide frequency range, prevents a deterioration of a transmission spectrum, and thereby enhances the accuracy of an oscillation frequency. The integrated circuit corrects a dispersion of the KV characteristic of the transmission oscillator by calibrating a current Icp of the charge pump inside the phase control loop. More in concrete, the integrated circuit measures a KV value Kv of the transmission oscillator, and calibrates the current Icp of the charge pump so that Kv·Icp falls into a predetermined value.Type: GrantFiled: June 8, 2004Date of Patent: March 6, 2007Assignee: Renesas Technology Corp.Inventors: Satoshi Arayashiki, Hirotaka Oosawa, Noriyuki Kurakami, Akira Okasaka, Yasuyuki Kimura, Toshiya Uozumi, Hirokazu Miyagawa, Satoshi Tanaka
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Publication number: 20070010225Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.Type: ApplicationFiled: September 12, 2006Publication date: January 11, 2007Inventors: Hirotaka Oosawa, Masumi Kasahara, Noriyuki Kurakami, Toshiya Uozumi
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Patent number: 7154341Abstract: A communication semiconductor integrated circuit device includes an RFVCO and a TXVCO and is formed over one semiconductor substrate, and has a first operation mode (idle mode) which does not perform transmission and reception, a second operation mode (warmup mode) which performs a preparation prior to the start of transmission or reception, and a third operation mode (transmission or reception mode) which performs transmission or reception. In the first operation mode, two oscillators are deactivated, and the operation of selecting a frequency band to be used in at least the TXVCO which generates a transmit signal, is performed in the second operation mode.Type: GrantFiled: November 23, 2004Date of Patent: December 26, 2006Assignee: Renesas Technology Corp.Inventors: Satoru Yamamoto, Hirotaka Oosawa, Toshiya Uozumi, Noriyuki Kurakami, Jiro Shinbo
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Patent number: 7146143Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.Type: GrantFiled: April 16, 2003Date of Patent: December 5, 2006Assignee: Renesas Technology Corp.Inventors: Hirotaka Oosawa, Masumi Kasahara, Noriyuki Kurakami, Toshiya Uozumi
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Publication number: 20060267699Abstract: An RF IC in which a PLL circuit including a loop filter is incorporated into a semiconductor chip is achieved without increasing power consumption or chip size. The RF IC includes a VCO capable of switching oscillation frequency bands, a variable frequency divider, a phase comparator, and a loop filter, which are contained in the PLL loop. A discrimination circuit discriminates a lead or lag in a phase of an output signal from the variable frequency divider against a reference signal and an automatic band selecting circuit generates a signal for switching the frequency bands of the VCO based on output from the discrimination circuit. While switching the frequency bands of the VCO by means of bisection algorithm, the RF IC detects an optimum frequency band, and adds offset to it to determine a final usable frequency band.Type: ApplicationFiled: August 10, 2006Publication date: November 30, 2006Inventors: Toshiya Uozumi, Hirotaka Osawa, Jiro Shinbo, Satoru Yamamoto