Patents by Inventor Toshiya Uozumi

Toshiya Uozumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060258312
    Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
    Type: Application
    Filed: July 25, 2006
    Publication date: November 16, 2006
    Inventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Henshaw
  • Publication number: 20060258313
    Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
    Type: Application
    Filed: July 25, 2006
    Publication date: November 16, 2006
    Inventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Henshaw
  • Patent number: 7123102
    Abstract: An RF IC in which a PLL circuit including a loop filter is incorporated into a semiconductor chip is achieved without increasing power consumption or chip size. The RF IC includes a VCO capable of switching oscillation frequency bands, a variable frequency divider, a phase comparator, and a loop filter, which are contained in the PLL loop. A discrimination circuit discriminates a lead or lag in a phase of an output signal from the variable frequency divider against a reference signal and an automatic band selecting circuit generates a signal for switching the frequency bands of the VCO based on output from the discrimination circuit. While switching the frequency bands of the VCO by means of bisection algorithm, the RF IC detects an optimum frequency band, and adds offset to it to determine a final usable frequency band.
    Type: Grant
    Filed: September 22, 2004
    Date of Patent: October 17, 2006
    Assignee: Renesas Technology Corporation
    Inventors: Toshiya Uozumi, Hirotaka Osawa, Jiro Shinbo, Satoru Yamamoto
  • Publication number: 20060211390
    Abstract: The present invention provides a semiconductor integrated circuit for communication (RF IC) operable in a mode for receiving a received signal subjected to phase modulation and amplitude modulation and a mode for receiving a received signal subjected only to phase modulation. In the semiconductor integrated circuit for communication, a frequency band of a loop filter in a PLL circuit is switched and set so as to become large in a reception mode and become small in a transmission mode.
    Type: Application
    Filed: February 24, 2006
    Publication date: September 21, 2006
    Inventors: Toshiya Uozumi, Ikuya Ono, Jiro Shinbo
  • Patent number: 7103337
    Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: September 5, 2006
    Assignees: Hitachi, Ltd., TTP Com Limited
    Inventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Astle Henshaw
  • Publication number: 20060181362
    Abstract: There are provided a voltage-controlled oscillator and an RF-IC for W-CDMA, which are capable of ensuring a wide frequency range and improving oscillation stability. The voltage-controlled oscillator (RF-IC) includes: switching A and B inductors generating a magnetic interaction between resonant A and B inductors of a resonant circuit; and an A_NMOS, a B_NMOS, a C_NMOS, and D_NMOS as switch/load means having together a function of changing an inductance value by the magnetic interaction between the resonant A and B inductors and the switching A and B inductors and a function of serving as loads of the switching A and B inductors. The A_NMOS, the B_NMOS, the C_NMOS, and the D_NMOS are turned ON/OFF by a control signal so as to control the mutual induction, whereby the oscillation frequency is switched by changing the inductance value of the resonant circuit. Also, oscillation stability is improved by increasing the inductance value.
    Type: Application
    Filed: November 17, 2005
    Publication date: August 17, 2006
    Inventors: Isao Ikuta, Akio Yamamoto, Yusaku Katsube, Toshiya Uozumi, Yasuyuki Kimura
  • Publication number: 20060012442
    Abstract: In a PLL circuit including an oscillator, a phase comparator, a charge pump circuit, and a loop filter, without providing a plurality of capacitative elements, that is, without increasing the occupied area so much, the characteristics of the PLL circuit can be adjusted according to manufacture variations in a resistive element and a capacitative element, and a loop filter can be formed on a chip. A resistive element and a capacitative element of a loop filter are formed on a semiconductor chip. As the resistive element, a plurality of elements having different resistance values are provided and switched by a switch, thereby enabling the resistance value to be adjusted. Current in a charge pump circuit is also made adjustable, and the current of the charge pump circuit is adjusted according to switching among the resistance values of the resistive elements.
    Type: Application
    Filed: July 12, 2005
    Publication date: January 19, 2006
    Inventors: Jiro Shinbo, Satoshi Arayashiki, Hirotaka Oosawa, Toshiya Uozumi, Satoru Yamamoto
  • Publication number: 20060014513
    Abstract: In a communication semiconductor integrated circuit device using offset PLL architectures and including an oscillator circuit and a frequency divider circuit generating an intermediate frequency signal, the oscillator circuit includes an oscillator, a programmable frequency divider which frequency-divides the oscillation signal in accordance with frequency division information, a phase comparator detecting a phase difference between an output signal of the programmable frequency divider and a reference signal, and a frequency control unit for outputting a signal indicative of the phase difference and controlling the oscillation frequency of the oscillator, wherein a frequency division ratio generator circuit generates an integer part I and a fraction part F/G based on band information concerning the use frequency band and mode information along with channel information and for producing the frequency division ratio information to thereby give it to the programmable frequency divider.
    Type: Application
    Filed: July 15, 2005
    Publication date: January 19, 2006
    Inventors: Toshiya Uozumi, Yasuyuki Kimura, Hirotaka Osawa, Satoru Yamamoto, Robert Henshaw
  • Publication number: 20050116781
    Abstract: A communication semiconductor integrated circuit device includes an RFVCO and a TXVCO and is formed over one semiconductor substrate, and has a first operation mode (idle mode) which does not perform transmission and reception, a second operation mode (warmup mode) which performs a preparation prior to the start of transmission or reception, and a third operation mode (transmission or reception mode) which performs transmission or reception. In the first operation mode, two oscillators are deactivated, and the operation of selecting a frequency band to be used in at least the TXVCO which generates a transmit signal, is performed in the second operation mode.
    Type: Application
    Filed: November 23, 2004
    Publication date: June 2, 2005
    Inventors: Satoru Yamamoto, Hirotaka Oosawa, Toshiya Uozumi, Noriyuki Kurakami, Jiro Shinbo
  • Publication number: 20050068119
    Abstract: An RF IC in which a PLL circuit including a loop filter is incorporated into a semiconductor chip is achieved without increasing power consumption or chip size. The RF IC includes a VCO capable of switching oscillation frequency bands, a variable frequency divider, a phase comparator, and a loop filter, which are contained in the PLL loop. A discrimination circuit discriminates a lead or lag in a phase of an output signal from the variable frequency divider against a reference signal and an automatic band selecting circuit generates a signal for switching the frequency bands of the VCO based on output from the discrimination circuit. While switching the frequency bands of the VCO by means of bisection algorithm, the RF IC detects an optimum frequency band, and adds offset to it to determine a final usable frequency band.
    Type: Application
    Filed: September 22, 2004
    Publication date: March 31, 2005
    Inventors: Toshiya Uozumi, Hirotaka Osawa, Jiro Shinbo, Satoru Yamamoto
  • Publication number: 20050059372
    Abstract: The invention provides a communication semiconductor integrated circuit (RF IC) that, when a transmission oscillator is incorporated into a semiconductor chip, secures the oscillation operation over a wide frequency range, prevents a deterioration of a transmission spectrum, and thereby enhances the accuracy of an oscillation frequency. The integrated circuit corrects a dispersion of the KV characteristic of the transmission oscillator by calibrating a current Icp of the charge pump inside the phase control loop. More in concrete, the integrated circuit measures a KV value Kv of the transmission oscillator, and calibrates the current Icp of the charge pump so that Kv·Icp falls into a predetermined value.
    Type: Application
    Filed: June 8, 2004
    Publication date: March 17, 2005
    Inventors: Satoshi Arayashiki, Hirotaka Oosawa, Noriyuki Kurakami, Akira Okasaka, Yasuyuki Kimura, Toshiya Uozumi, Hirokazu Miyagawa, Satoshi Tanaka
  • Publication number: 20030224749
    Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
    Type: Application
    Filed: February 26, 2003
    Publication date: December 4, 2003
    Inventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Astle Henshaw
  • Publication number: 20030203720
    Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.
    Type: Application
    Filed: April 16, 2003
    Publication date: October 30, 2003
    Inventors: Hirotaka Oosawa, Masumi Kasahara, Noriyuki Kurakami, Toshiya Uozumi
  • Patent number: 6420500
    Abstract: A novel supported catalyst component useful for &agr;-olefin polymerization and a method of polymerizing an &agr;-olefin using the same. The catalyst component is characterized by being prepared by contacting a complex represented by general formula (I) wherein R1 and R2 are the same or different and each represents a C1-6 linear or branched alkyl, a C1-3 haloalkyl, or optionally substituted phenyl; and X represents a halogeno with magnesium compound.
    Type: Grant
    Filed: December 31, 1998
    Date of Patent: July 16, 2002
    Assignee: Tosoh Akzo Corporation
    Inventors: Kazuo Soga, Toshiya Uozumi, Eiichi Kaji
  • Publication number: 20020065189
    Abstract: A novel supported catalyst component useful for &agr;-olefin polymerization and a method of polymerizing an &agr;-olefin using the same. The catalyst component is characterized by being prepared by contacting a complex represented by general formula (I) wherein R1 and R2 are the same or different and each represents a C1-6 linear or branched alkyl, a C1-3 haloalkyl, or optionally substituted phenyl; and X represents a halogeno with magnesium compound.
    Type: Application
    Filed: December 31, 1998
    Publication date: May 30, 2002
    Inventors: KAZUO SOGA, TOSHIYA UOZUMI, EIICHI KAJI
  • Patent number: 5733990
    Abstract: A catalyst for producing a poly-.alpha.-olefin which comprises a metallocene compound containing an element of group IVA bonded to an organic polymer containing an element of group IVB; and a process for producing a poly-.alpha.-olefin which comprises polymerizing an .alpha.-olefin in the presence of the above-described catalyst and also a specified aluminoxane as a co-catalyst.
    Type: Grant
    Filed: February 19, 1997
    Date of Patent: March 31, 1998
    Assignee: Daicel Chemical Industries, Ltd.
    Inventors: Kazuo Soga, Toshiya Uozumi, Takashi Arai
  • Patent number: 5677255
    Abstract: A catalyst for producing a poly-.alpha.-olefin which comprises a metallocene compound containing an element of group IVA bonded to an organic polymer containing an element of the group IVB; and a process for producing a poly-.alpha.-olefin which comprises polymerizing an .alpha.-olefin in the presence of the above-described catalyst and also a specified aluminoxane as a co-catalyst.
    Type: Grant
    Filed: September 4, 1996
    Date of Patent: October 14, 1997
    Assignee: Daicel Chemical Industries, Ltd.
    Inventors: Kazuo Soga, Toshiya Uozumi, Takashi Arai