Patents by Inventor Tsuyoshi Takeda

Tsuyoshi Takeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10128128
    Abstract: A method of manufacturing a semiconductor device includes: (a) loading into a process chamber a substrate including: a wiring layer including a first interlayer insulating film, a plurality of copper-containing films formed on the first interlayer insulating film and used as a wiring, an inter-wire insulating film electrically insulating the plurality of copper containing film and a recess formed between the plurality of copper-containing film; and a first diffusion barrier film formed on a first portion of a surface of the plurality of copper-containing films to suppress a diffusion of a component of the plurality of copper-containing film; and (b) supplying a silicon-containing gas into the process chamber to form a silicon-containing film on: a surface of the recess; and a second portion of the surface of the plurality of copper-containing films other than the first portion where the first diffusion barrier film is formed.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: November 13, 2018
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Tsuyoshi Takeda, Hiroshi Ashihara, Naofumi Ohashi, Toshiyuki Kikuchi
  • Publication number: 20180315651
    Abstract: Described herein is a technique capable of providing a semiconductor device having good characteristics. According to the technique described herein, there is provided a method of manufacturing a semiconductor device, including: (a) loading a substrate into a process chamber; and (b) forming a stacked etch stopper film by performing: (b-1) forming a first etch stopper film containing a first element and a second element by supplying a first element-containing gas and a second element-containing gas onto the substrate; and (b-2) forming a second etch stopper film containing the first element, the second element and a third element by supplying the first element-containing gas, the second element-containing gas and a third element-containing gas onto the first etch stopper film.
    Type: Application
    Filed: April 27, 2018
    Publication date: November 1, 2018
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Tsuyoshi TAKEDA, Naofumi OHASHI, Toshiyuki KIKUCHI
  • Patent number: 10014171
    Abstract: Described herein is a technique capable of improving the productivity of manufacturing of a semiconductor device in a method of processing a film by repeating different processes. A method of manufacturing a semiconductor device may include: (a) loading a substrate into a process vessel; (b) forming a first layer by supplying a first gas into the process vessel by a gas supply unit while maintaining the substrate at a first temperature by a temperature control unit; and (c) forming a second layer different from the first layer by supplying a second gas different from the first gas into the process vessel by the gas supply unit while maintaining the substrate at a second temperature different from the second temperature by the temperature control unit.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: July 3, 2018
    Assignee: Hiatchi Kokusai Electric, Inc.
    Inventors: Yukinori Aburatani, Shin Hiyama, Tsuyoshi Takeda, Naofumi Ohashi
  • Publication number: 20180182601
    Abstract: Described herein is a technique capable of uniformly processing substrates. According to the technique described herein, there is provided a substrate processing apparatus including: a process chamber where a substrate is processed; a gas supply configured to supply a gas into the process chamber; a plasma generator configured to plasma-excite the gas supplied into the process chamber, the plasma generator including an electrode electrically connected to a high frequency power source; an impedance meter configured to measure an impedance of the plasma generator; a determiner configured to determine an amount of active species generated by the plasma generator based on the impedance measured by the impedance meter; and a controller configured to control the high frequency power source based on the amount of active species determined by the determiner.
    Type: Application
    Filed: December 26, 2017
    Publication date: June 28, 2018
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventor: Tsuyoshi TAKEDA
  • Patent number: 9922821
    Abstract: Provided is a technique of forming a film containing a first element and a second element on a substrate by performing a cycle a predetermined number of times. The cycle includes: (a) supplying a hydro-based precursor containing the first element and a halogen-based precursor containing the second element into a process chamber accommodating a substrate to confine the hydro-based precursor and the halogen-based precursor in the process chamber; (b) maintaining a state where the hydro-based precursor and the halogen-based precursor are confined in the process chamber; and (c) exhausting the process chamber.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: March 20, 2018
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventor: Tsuyoshi Takeda
  • Patent number: 9920472
    Abstract: Flame retardant synthetic leather having high flame retardancy and excellent physical properties (light resistance, heat resistance and feeling). The flame retardant synthetic leather contains an organic phosphorus compound (component A) represented by the following formula (1). (In the formula, X1 and X2 are the same or different and each an aromatic substituted alkyl group represented by the following formula (2).) AL(Ar)n??(2) (In the formula, AL is a branched or linear aliphatic hydrocarbon group having 1 to 5 carbon atoms, and Ar is a phenyl group, naphthyl group or anthryl group, all of which may have a substituent. ā€œnā€ is an integer of 1 to 3, and Ar may be bonded to any carbon atom contained in AL.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: March 20, 2018
    Assignee: TEIJIN LIMITED
    Inventors: Katsuhiro Yamanaka, Tsuyoshi Takeda, Kuniaki Kondo, Masaki Haruyoshi
  • Publication number: 20180009967
    Abstract: A flame retardant resin composition containing 1 to 100 parts by weight of (B) an organophosphorus compound (component B) represented by the following formula (1) per 100 parts by weight of (A) a resin component (component A) containing at least 60 wt % of an acrylic resin has high flame retardancy, high transparency and satisfactory physical properties: wherein X1 and X2 are the same or different, and represent alkyl groups substituted with aromatic groups represented by the following formula (2): ?AL??Ar?n??(2) wherein AL represents a branched or linear aliphatic hydrocarbon group having 1 to 5 carbon atoms, Ar represents a phenyl group, a naphthyl group, or an anthryl group each optionally substituted, n represents an integer of 1 to 3, and Ar can be bonded to any carbon atom in AL.
    Type: Application
    Filed: January 19, 2016
    Publication date: January 11, 2018
    Applicant: TEIJIN LIMITED
    Inventors: Katsuhiro YAMANAKA, Tsuyoshi TAKEDA, Kenta IMAZATO
  • Publication number: 20170372894
    Abstract: Described herein is a technique capable of improving the productivity of manufacturing of a semiconductor device in a method of processing a film by repeating different processes. A method of manufacturing a semiconductor device may include: (a) loading a substrate into a process vessel; (b) forming a first layer by supplying a first gas into the process vessel by a gas supply unit while maintaining the substrate at a first temperature by a temperature control unit; and (c) forming a second layer different from the first layer by supplying a second gas different from the first gas into the process vessel by the gas supply unit while maintaining the substrate at a second temperature different from the second temperature by the temperature control unit.
    Type: Application
    Filed: June 22, 2017
    Publication date: December 28, 2017
    Inventors: Yukinori ABURATANI, Shin HIYAMA, Tsuyoshi TAKEDA, Naofumi OHASHI
  • Publication number: 20170345617
    Abstract: A substrate processing apparatus capable of suppressing the effects of plasma on a structure formed on a substrate includes: a process chamber where a substrate is processed; a substrate support unit; a gas supply unit to supply a gas to the substrate via a buffer chamber; an electrode including a gas flow channel in communication with the buffer chamber; an insulating plate including a first hole adjacent to the gas flow channel; a dispersion unit including a second hole adjacent to the first hole and in communication with the gas flow channel; a power supply unit; and a control unit to: control the gas supply unit to supply the gas into a plasma generation region in the second hole downstream of the insulating plate; and control the power supply unit to supply electrical power to the electrode to generate a plasma of the gas in the plasma generation region.
    Type: Application
    Filed: May 26, 2017
    Publication date: November 30, 2017
    Inventor: Tsuyoshi TAKEDA
  • Patent number: 9831083
    Abstract: A film containing a prescribed element and carbon is formed on a substrate, by performing a cycle a prescribed number of times, the cycle including: supplying an organic-based source containing a prescribed element and a pseudo catalyst including at least one selected from the group including a halogen compound and a boron compound, into a process chamber in which the substrate is housed, and confining the organic-based source and the pseudo catalyst in the process chamber; maintaining a state in which the organic-based source and the pseudo catalyst are confined in the process chamber; and exhausting an inside of the process chamber.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: November 28, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Daigo Yamaguchi, Tsukasa Kamakura, Hiroshi Ashihara, Tsuyoshi Takeda, Taketoshi Sato
  • Patent number: 9822278
    Abstract: A one-component type polyurethane resin composition for preventing detachment of concrete pieces and tiles containing an isocyanate group-containing urethane prepolymer (A) and a thixotropy-imparting agent (B), and a method for forming a reinforcing layer on a surface of a concrete structure or tiled wall containing a resin coated film composed thereof, in order to provide a one-component type polyurethane resin composition for preventing detachment of concrete pieces and tiles, which has improved workability by being able to be applied with a trowel or brush, forms a transparent resin coated film after reactive curing that has improved weather resistance without applying a top coat, facilitates diagnosis of deterioration of concrete by being carried out visually during maintenance of concrete structures, is able to maintain the existing appearance of the tiled exteriors of buildings and other structures and eliminates dispersion to surrounding areas during application.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: November 21, 2017
    Assignees: DYFLEX CORPORATION, AUTO CHEMICAL INDUSTRY CO., LTD.
    Inventors: Noriyoshi Yano, Tsuyoshi Takeda, Koji Sato, Megumi Yaoita
  • Publication number: 20170283950
    Abstract: In a process chamber in which a substrate is processed, a gas supply unit is in the process chamber and configured to supply a process gas that processes the substrate. A plasma generation unit is in the process chamber and configured to activate the process gas, and a buffer part is configured to form a buffer chamber accommodating at least a part of the plasma generation unit and include a gas supply hole through which the activated process gas is supplied to the substrate. The buffer part includes a groove portion in which a part of the gas supply hole is cut out.
    Type: Application
    Filed: February 28, 2017
    Publication date: October 5, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventor: Tsuyoshi TAKEDA
  • Publication number: 20170287731
    Abstract: A method of manufacturing a semiconductor device includes: (a) loading into a process chamber a substrate including: a wiring layer including a first interlayer insulating film, a plurality of copper-containing films formed on the first interlayer insulating film and used as a wiring, an inter-wire insulating film electrically insulating the plurality of copper containing film and a recess formed between the plurality of copper-containing film; and a first diffusion barrier film formed on a first portion of a surface of the plurality of copper-containing films to suppress a diffusion of a component of the plurality of copper-containing film; and (b) supplying a silicon-containing gas into the process chamber to form a silicon-containing film on: a surface of the recess; and a second portion of the surface of the plurality of copper-containing films other than the first portion where the first diffusion barrier film is formed.
    Type: Application
    Filed: March 16, 2017
    Publication date: October 5, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Tsuyoshi TAKEDA, Hiroshi ASHIHARA, Naofumi OHASHI, Toshiyuki KIKUCHI
  • Publication number: 20170268105
    Abstract: A substrate processing apparatus includes: a reaction tube with a process chamber defined therein, the process chamber being configured to process a substrate; a heating device configured to heat the process chamber; a gas supply part configured to supply a process gas used in processing the substrate; and a plasma generating part including an electrode composed of a first electrode portion connected to a high frequency power supply and a second electrode portion grounded to the earth, which are installed to surround the entire circumference of an outer wall of the reaction tube. An inter-electrode distance between the first electrode portion and the second electrode portion is determined by at least a frequency of the high frequency power supply and a voltage applied across the electrode. The first and second electrode portions are installed based on the determined inter-electrode distance.
    Type: Application
    Filed: March 14, 2017
    Publication date: September 21, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventor: Tsuyoshi TAKEDA
  • Patent number: 9745656
    Abstract: A method of manufacturing a semiconductor device, includes: alternately performing (i) a first step of alternately supplying a first raw material containing a first metal element and a halogen element and a second raw material containing a second metal element and carbon to a substrate by a first predetermined number of times, and (ii) a second step of supplying a nitridation raw material to the substrate, by a second predetermined number of times, wherein alternating the first and second steps forms a metal carbonitride film containing the first metal element having a predetermined thickness on the substrate.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: August 29, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Arito Ogawa, Tsuyoshi Takeda
  • Patent number: 9698050
    Abstract: A method of manufacturing a semiconductor device includes loading, into a process chamber, a substrate including a first wiring layer having a first interlayer insulating film, a plurality of copper-containing films formed on the first interlayer insulating film and used as a wiring, an inter-wiring insulating film insulating between the plurality of copper-containing films, and a void formed between the plurality of copper-containing films, and a first diffusion barrier film formed on a portion of an upper surface of the copper-containing films to suppress diffusion of a component of the copper-containing films, and forming a second diffusion barrier film configured to suppress diffusion of a component of the copper-containing films on a surface of another portion, on which the first diffusion barrier film is not formed, in the copper-containing films.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: July 4, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Hiroshi Ashihara, Naofumi Ohashi, Tsuyoshi Takeda, Toshiyuki Kikuchi
  • Patent number: 9669567
    Abstract: The present invention relates to a manufacturing method of a molded article, including: a molded article forming step of forming a molded article by curing a resin composition on a main surface, on the side of a bendable first supporting medium, of a laminated supporting medium obtained by laminating the first supporting medium and a second supporting medium that is harder than the first supporting medium; a second-supporting medium peeling step of peeling the second supporting medium from the first supporting medium after the molded article forming step; and a first-supporting medium peeling step of peeling the first supporting medium from the molded article while bending the first supporting medium after the second-supporting medium peeling step. The shape of the first supporting medium can be maintained at a curing temperature at which the resin composition is cured in the molded article forming step.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: June 6, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tsuyoshi Takeda, Hiromitsu Takashita, Keiko Kashihara, Shingo Yoshioka
  • Patent number: 9607908
    Abstract: Provided is a technique capable of uniformizing the characteristics of a film after a plurality of substrates are processed. A method of manufacturing a semiconductor device may include: (a) loading a substrate into a process chamber; (b) processing the substrate by performing: (b-1) supplying and exhausting a process gas into and from the process chamber without activating the process gas; (b-2) supplying and exhausting the process gas into and from the process chamber while activating the process gas; (b-3) measuring an amount of impurity desorbed from the substrate while performing (b-2); and (b-4) measuring a gas exhausted from the process chamber after performing (b-3); (c) calculating a process data based on: a first measurement data obtained by repeating (b-3); and a second measurement data obtained by repeating (b-4); and (d) determining whether to terminate (b) based on the process data.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: March 28, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC, INC.
    Inventor: Tsuyoshi Takeda
  • Patent number: D818504
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: May 22, 2018
    Assignee: SAGINOMIYA SEISAKUSHO, INC.
    Inventors: Tsuyoshi Takeda, Taiki Nakagawa, Shohei Ozeki
  • Patent number: D819701
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: June 5, 2018
    Assignee: SAGINOMIYA SEISAKUSHO, INC.
    Inventors: Tsuyoshi Takeda, Taiki Nakagawa