Patents by Inventor Uma Srinivasan
Uma Srinivasan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8136901Abstract: In the case of printing at high addressability, where the cell size is smaller than the spot size, an image can be decimated in a manner that will limit the large accumulation of printed material. The proper decimation of the image will depend on the spot size, the physics of drop coalescence and the addressability during printing. A simple method of using concentric decimation is disclosed herein to enable this process.Type: GrantFiled: October 28, 2010Date of Patent: March 20, 2012Assignee: Palo Alto Research Center IncorporatedInventors: Uma Srinivasan, Stephen David White
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Patent number: 8120782Abstract: A tunable optical cavity can be tuned by relative movement between two reflection surfaces, such as by deforming elastomer spacers connected between mirrors or other light-reflective components that include the reflection surfaces. The optical cavity structure includes an analyte region in its light-transmissive region, and presence of analyte in the analyte region affects output light when the optical cavity is tuned to a set of positions. Electrodes that cause deformation of the spacers can also be used to capacitively sense the distance between them. Control circuitry that provides tuning signals can cause continuous movement across a range of positions, allowing continuous photosensing of analyte-affected output light by a detector.Type: GrantFiled: October 22, 2009Date of Patent: February 21, 2012Assignee: Palo Alto Research Center IncorporatedInventors: Peter Kiesel, Oliver Schmidt, Michael Bassler, Uma Srinivasan
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Publication number: 20110318905Abstract: Laser pyrolysis reactor designs and corresponding reactant inlet nozzles are described to provide desirable particle quenching that is particularly suitable for the synthesis of elemental silicon particles. In particular, the nozzles can have a design to encourage nucleation and quenching with inert gas based on a significant flow of inert gas surrounding the reactant precursor flow and with a large inert entrainment flow effectively surrounding the reactant precursor and quench gas flows. Improved silicon nanoparticle inks are described that has silicon nanoparticles without any surface modification with organic compounds. The silicon ink properties can be engineered for particular printing applications, such as inkjet printing, gravure printing or screen printing. Appropriate processing methods are described to provide flexibility for ink designs without surface modifying the silicon nanoparticles.Type: ApplicationFiled: March 23, 2011Publication date: December 29, 2011Inventors: Shivkumar Chiruvolu, Igor Altman, Bernard M. Frey, Weidong Li, Guojun Liu, Robert B. Lynch, Gina Elizabeth Pengra-Leung, Uma Srinivasan
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Patent number: 8079656Abstract: In the case of printing at high addressability, where the cell size is smaller than the spot size, an image can be decimated in a manner that will limit the large accumulation of printed material. The proper decimation of the image will depend on the spot size, the physics of drop coalescence and the addressability during printing. A simple method of using concentric decimation is disclosed herein to enable this process.Type: GrantFiled: December 22, 2006Date of Patent: December 20, 2011Assignee: Palo Alto Research Center IncorporatedInventors: Uma Srinivasan, Stephen David White
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Publication number: 20110153992Abstract: Example methods and apparatus to manage object locks are disclosed. A disclosed example method includes receiving an object lock request from a processor, the lock request associated with object lock code to lock an object, and generating object lock-bypass code based on a type of the processor, the object lock-bypass code to execute in a managed runtime in response to receiving the object lock request. The example method also includes identifying a type of instruction set architecture (ISA) associated with the processor, invoking a checkpoint instruction for the processor based on the identified ISA, suspending the object lock code from executing and executing target code when the object is uncontended, and allowing the object lock code to execute when the object is contended.Type: ApplicationFiled: December 23, 2009Publication date: June 23, 2011Inventors: Suresh Srinivas, Stephen H. Dohrmann, Mingqiu Sun, Uma Srinivasan, Ravi Rajwar, Konrad K. Lai
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Patent number: 7955783Abstract: A method for masking regions of photoresist in the manufacture of a soldermask for printed circuit boards is disclosed. Following application of photoresist over patterned traces on a substrate, a sheet-like thin film is applied over the photosensitive material. The thin film may adhere to the photosensitive material by way of the adhesive state of the photosensitive material or by way of an adhesive applied to the photosensitive material or the thin film or carried by the thin film. Digital mask printing may proceed on the surface of the thin film. The photosensitive material may then be exposed through the printed photomask, the thin film (with photomask) removed, and the photosensitive material developed.Type: GrantFiled: November 9, 2007Date of Patent: June 7, 2011Assignee: Palo Alto Research Center IncorporatedInventors: Eric Shrader, Uma Srinivasan, Clark Crawford, Scott Limb
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Publication number: 20110120537Abstract: High quality silicon inks are used to form polycrystalline layers within thin film solar cells having a p-n junction. The particles deposited with the inks can be sintered to form the silicon film, which can be intrinsic films or doped films. The silicon inks can have a z-average secondary particle size of no more than about 250 nm as determined by dynamic light scattering on an ink sample diluted to 0.4 weight percent if initially having a greater concentration. In some embodiments, an intrinsic layer can be a composite of an amorphous silicon portion and a crystalline silicon portion.Type: ApplicationFiled: September 21, 2010Publication date: May 26, 2011Inventors: Goujun Liu, Clifford M. Morris, Igor Altman, Uma Srinivasan, Shivkumar Chiruvolu
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Patent number: 7926900Abstract: A method of printing spots with high spot placement accuracy using print heads with random/unevenly spaced ejector locations and coarse alignment of the multiple print heads. This is performed by accurately determining the spot positions from all the print heads using a vision system and printing at high addressability. The spot placement accuracy will be determined by the addressability as long as the ejected drop position is reproducible and other system errors are negligible.Type: GrantFiled: December 22, 2006Date of Patent: April 19, 2011Assignee: Palo Alto Research Center IncorporatedInventors: Uma Srinivasan, John Stuart Fitch, Steven E. Ready
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Publication number: 20110087717Abstract: In the case of printing at high addressability, where the cell size is smaller than the spot size, an image can be decimated in a manner that will limit the large accumulation of printed material. The proper decimation of the image will depend on the spot size, the physics of drop coalescence and the addressability during printing. A simple method of using concentric decimation is disclosed herein to enable this process.Type: ApplicationFiled: October 28, 2010Publication date: April 14, 2011Applicant: Palo Alto Research Center IncorporatedInventors: Uma Srinivasan, Stephen David White
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Publication number: 20110087718Abstract: In the case of printing at high addressability, where the cell size is smaller than the spot size, an image can be decimated in a manner that will limit the large accumulation of printed material. The proper decimation of the image will depend on the spot size, the physics of drop coalescence and the addressability during printing. A simple method of using concentric decimation is disclosed herein to enable this process.Type: ApplicationFiled: October 28, 2010Publication date: April 14, 2011Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Uma Srinivasan, Stephen David White
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Publication number: 20100294352Abstract: Layered metal structures are patterned to form a surface with some locations having an alloy along the top surface at some locations and the original top metal layer at other locations along the surface. The alloy and original top metal layer can be selected to have differential etching properties such that the pattern of the alloy or original metal can be selectively etched to form a patterned metal interconnect. In general, the patterning is performed by localized heating that drives formation of the alloy at the heated locations. The metal patterning can be useful for solar cell applications as well as for electronics applications, such as display applications.Type: ApplicationFiled: May 20, 2009Publication date: November 25, 2010Inventors: Uma Srinivasan, Neeraj Pakala, William A. Sanders, Henry Hieslmair
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BACK CONTACT SOLAR CELLS WITH EFFECTIVE AND EFFICIENT DESIGNS AND CORRESPONDING PATTERNING PROCESSES
Publication number: 20100294349Abstract: Laser based processes are used alone or in combination to effectively process doped domains for semiconductors and/or current harvesting structures. For example, dopants can be driven into a silicon/germanium semiconductor layer from a bare silicon/germanium surface using a laser beam. Deep contacts have been found to be effective for producing efficient solar cells. Dielectric layers can be effectively patterned to provide for selected contact between the current collectors and the doped domains along the semiconductor surface. Rapid processing approaches are suitable for efficient production processes.Type: ApplicationFiled: May 20, 2009Publication date: November 25, 2010Inventors: Uma Srinivasan, Xin Zhou, Henry Hieslmair, Neeraj Pakala -
Patent number: 7817281Abstract: An inhomogeneous optical cavity is tuned by changing its shape, such as by changing reflection surface positions to change tilt angle, thickness, or both. Deformable components such as elastomer spacers can be connected so that, when deformed, they change relative positions of structures with light-reflective components such as mirrors, changing cavity shape. Electrodes can cause deformation, such as electrostatically, electromagnetically, or piezoelectrically, and can also be used to measure thicknesses of the cavity. The cavity can be tuned, for example, across a continuous spectrum, to a specific wavelength band, to a shape that increases or decreases the number of modes it has, to a series of transmission ranges each suitable for a respective light source, with a modulation that allows lock-in with photosensing for greater sensitivity, and so forth.Type: GrantFiled: February 5, 2007Date of Patent: October 19, 2010Assignee: Palo Alto Research Center IncorporatedInventors: Peter Kiesel, Oliver Schmidt, Michael Bassler, Uma Srinivasan
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Publication number: 20100040981Abstract: A tunable optical cavity can be tuned by relative movement between two reflection surfaces, such as by deforming elastomer spacers connected between mirrors or other light-reflective components that include the reflection surfaces. The optical cavity structure includes an analyte region in its light-transmissive region, and presence of analyte in the analyte region affects output light when the optical cavity is tuned to a set of positions. Electrodes that cause deformation of the spacers can also be used to capacitively sense the distance between them. Control circuitry that provides tuning signals can cause continuous movement across a range of positions, allowing continuous photosensing of analyte-affected output light by a detector.Type: ApplicationFiled: October 22, 2009Publication date: February 18, 2010Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Peter Kiesel, Oliver Schmidt, Michael Bassler, Uma Srinivasan
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Patent number: 7633629Abstract: A tunable optical cavity can be tuned by relative movement between two reflection surfaces, such as by deforming elastomer spacers connected between mirrors or other light-reflective components that include the reflection surfaces. The optical cavity structure includes an analyte region in its light-transmissive region, and presence of analyte in the analyte region affects output light when the optical cavity is tuned to a set of positions. Electrodes that cause deformation of the spacers can also be used to capacitively sense the distance between them. Control circuitry that provides tuning signals can cause continuous movement across a range of positions, allowing continuous photosensing of analyte-affected output light by a detector.Type: GrantFiled: February 5, 2007Date of Patent: December 15, 2009Assignee: Palo Alto Research Center IncorporatedInventors: Peter Kiesel, Oliver Schmidt, Michael Bassler, Uma Srinivasan
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Publication number: 20090155732Abstract: A patterned layer over a wafer is produced by depositing a print-patterned mask structure. Energized particles of a target material are deposited over the wafer and the print-patterned mask such that particles of said target material incident on the mask structure enter the mask structure body and minimally accumulate, if at all, on the surface of the mask structure, and otherwise the particles of target material accumulate as a generally uniform layer over the wafer. The print-patterned mask structure, including particles of target material therein, is removed leaving the generally uniform layer of target material as a patterned layer over the wafer.Type: ApplicationFiled: December 13, 2007Publication date: June 18, 2009Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Scott Limb, Uma Srinivasan
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Publication number: 20090130298Abstract: High aspect ratio structures can be obtained by print-patterning masking features in feature stacks such that each feature has a lateral edge which is aligned in a plane roughly perpendicular to the plane of the substrate on which the features are formed. Due to the differential lateral spreading between features formed on a substrate and formed atop other features, the print head is indexed less than the radius of a droplet to a position where a droplet ejected by the print head forms an upper feature atop a lower feature such that the lateral edges of the upper and lower features are aligned in the plane roughly perpendicular to the plane of the substrate. Feature stacks of two or more features may provide a vertical (or re-entrant) sidewall mask for formation of high aspect ratio structures, by e.g., electroplating, etc.Type: ApplicationFiled: November 20, 2007Publication date: May 21, 2009Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Eric Shrader, Uma Srinivasan, Clark Crawford, Scott Limb
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Publication number: 20090123873Abstract: A method for masking regions of photoresist in the manufacture of a soldermask for printed circuit boards is disclosed. Following application of photoresist over patterned traces on a substrate, a sheet-like thin film is applied over the photosensitive material. The thin film may adhere to the photosensitive material by way of the adhesive state of the photosensitive material or by way of an adhesive applied to the photosensitive material or the thin film or carried by the thin film. Digital mask printing may proceed on the surface of the thin film. The photosensitive material may then be exposed through the printed photomask, the thin film (with photomask) removed, and the photosensitive material developed.Type: ApplicationFiled: November 9, 2007Publication date: May 14, 2009Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Eric Shrader, Uma Srinivasan, Clark Crawford, Scott Limb
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Patent number: 7524015Abstract: A method of jet-printing smooth micro-scale features is presented. The desired feature prior to being printed is masked by various decimation filters and the decimation is performed at various pitches. The subsequently printed image is then scanned and analyzed to determine the roughness of the lines. The optimum decimation pitch is determined by the feature that exhibits the least amount of droplet spreading and has the lowest edge roughness. The optimum decimation pitch may also be calculated from the material properties and the dynamics of fluids.Type: GrantFiled: December 20, 2006Date of Patent: April 28, 2009Assignee: Palo Alto Research Center IncorporatedInventors: Uma Srinivasan, Stephen David White, Eric J. Shrader, Steven E. Ready, Scott Jong Ho Limb
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Publication number: 20080244544Abstract: Hardware checkpoints may be used to mark software-based speculation regions. An instruction may be provided at the beginning of a speculation region and at the end of the speculation region. If an exception occurs during the speculation region, a hardware rollback may be occurred. The hardware rollback rolls back to the instruction at the beginning of the speculation region. The hardware may take a checkpoint by taking a register snapshot and treating future memory updates as tentative. When the instruction marking the end of the speculation is reached, all the tentative memory updates are committed and the previously taken register snapshot is discarded.Type: ApplicationFiled: March 29, 2007Publication date: October 2, 2008Inventors: Naveen Neelakantam, Craig Zilles, Uma Srinivasan, Suresh Srinivas, Ravi Rajwar, Konrad Lai