Abstract: An accelerator device includes a first processing unit to access a structure of a graph dataset, and a second processing unit coupled with the first processing unit to perform computations based on data values in the graph dataset.

Abstract: Embodiments are provided herein for efficient component communication and resource optimization in a disaggregated computing system. A first set of computing elements are used as in line accelerators and a second set of the computing elements are used as block accelerators within the disaggregated computing system. A switching operation is dynamically performed between the first set of computing elements and the second set of computing elements to perform a workload by rewiring one of a plurality of links associated with respective ones of the first set of computing elements and the second set of computing elements.

Abstract: A system, method, and computer program product for verifying signatures. The system includes at least one processing component, at least one memory component, and a reference storage comprising a set of reference signatures. The system also includes a model generator configured to generate a signature model based on the set of reference signatures. Further, the system includes a verification component configured to receive a signature, and determine whether the signature is valid.

Abstract: A computer-implemented method includes identifying two or more memory locations and referencing, by a memory access request, the two or more memory locations. The memory access request is a single action pursuant to a memory protocol. The computer-implemented method further includes sending the memory access request from one or more processors to a node and fetching, by the node, data content from each of the two or more memory locations. The computer-implemented method further includes packaging, by the node, the data content from each of the two or more memory locations into a memory package, and returning the memory package from the node to the one or more processors. A corresponding computer program product and computer system are also disclosed.

Abstract: Portions of configuration state registers in-memory. An instruction is obtained, and a determination is made that the instruction accesses a configuration state register. A portion of the configuration state register is in-memory and another portion of the configuration state register is in-processor. Processing associated with the configuration state register is performed. The performing processing is based on a type of access and whether the portion or the other portion is being accessed.

Abstract: An accelerator device includes a first processing unit to access a structure of a graph dataset, and a second processing unit coupled with the first processing unit to perform computations based on data values in the graph dataset.

Abstract: A method includes receiving from a compute element a command for performing a requested operation on data stored in a memory device, and in response to receiving the command, performing the requested operation by generating a plurality of memory access requests based on the command and issuing the plurality of memory access requests to the memory device.

Abstract: Various embodiments for optimizing memory bandwidth in a disaggregated computing system, by a processor device, are provided. Respective memory devices are assigned to respective processor devices in the disaggregated computing system, the disaggregated computing system having at least a pool of the memory devices and a pool of the processor devices. An analytic function is performed on data resident in the pool of the memory devices using memory bandwidth not currently committed to a primary compute task.

Abstract: An approach to tree fall risk management. This approach may identify a tree in a given location. Historical data associated with the geographic location may be received in the approach. A current condition or status of the tree may be identified by the approach. The approach may analyze the foreseeable weather forecast or weather conditions in conjunction with the status of the identified tree. The approach may generate a risk score based on the information received and analyzed. The risk score may indicate the tree is likely to fall and cause damage. The approach may result in tree fall mitigation action can be generated based on the risk score.

Abstract: Aspects of branch prediction are suppressed for branch instructions executing in a transaction, of a transactional memory environment, that is a re-execution of a previously aborted transaction.

Abstract: Embodiments for optimizing dynamic resource allocations for storage-dependent workloads in a disaggregated computing environment. A new workload is assigned to a subset of a plurality of processors, the subset of processors assigned a subset of a plurality of memory devices associated with a plurality of storage devices. A determination is made that the new workload is categorized as a storage-dependent workload having a storage need which can be met primarily by a subset of the storage devices after having identified whether data requests associated with the new workload can be satisfied by the subset of memory devices. Pursuant to determining the new workload is the storage-dependent workload, a storage related action is proactively performed to increase efficiency of the new workload prior to commencement of a performance of the new workload.

Abstract: A value to be used in register-indirect branching is predicted and concurrently stored in a selected location accessible to one or more instructions. The value may be a target address used by an indirect branch and the selected location may be a hardware register, providing concurrent prediction of branch addresses and the update of register contents.

Abstract: A determination is made that a unit of memory that provides storage for one or more in-memory configuration state registers is to be pinned in a system that includes a guest operating system and one or more hosts at one or more host levels. Based on determining that the unit of memory is to be pinned, at least one host of the one or more hosts is notified that the unit of memory is to be pinned.

Abstract: Respective memory devices are assigned to respective processor devices in a disaggregated computing system, the disaggregated computing system having at least a pool of the memory devices and a pool of the processor devices. An iterative learning algorithm is used to define data boundaries of a dataset for performing an analytic function on the dataset simultaneous to a primary compute task, unrelated to the analytic function, being performed on the dataset in the pool of memory devices using memory bandwidth not currently committed to the primary compute task, thereby efficiently employing the unused memory bandwidth to prevent underutilization of the pool of memory devices.

Abstract: Server resources in a data center are disaggregated into shared server resource pools, including an accelerator (e.g., FPGA) pool. Servers are constructed dynamically, on-demand and based on workload requirements, by allocating from these resource pools. According to this disclosure, accelerator utilization in the data center is managed proactively by assigning accelerators to workloads in a fine granularity and agile way, and de-provisioning them when no longer needed. In this manner, the approach is especially advantageous to automatically provision accelerators for data analytic workloads. The approach thus provides for a “micro-service” enabling data analytic workloads to automatically and transparently use FPGA resources without providing (e.g., to the data center customer) the underlying provisioning details. Preferably, the approach dynamically determines the number and the type of FPGAs to use, and then during runtime auto-scales the FPGAs based on workload.

Abstract: A computing problem management method, system, and non-transitory computer readable medium, include detecting an impending problem of the computing system, spawning a plurality of replicas when detecting the impending problem, introducing a plurality of new impending problems on the plurality of replicas for the launching to launch versions of an action to resolve, and learning a version that resolves each of the plurality of new impending problems.

Abstract: An instruction stream includes a transactional code region. The transactional code region includes a latent modification instruction (LMI), a next sequential instruction (NSI) following the LMI, and a set of target instructions following the NSI in program order. Each target instruction has an associated function, and the LMI at least partially specifies a substitute function for the associated function. A processor executes the LMI, the NSI, and at least one of the target instructions, employing the substitute function at least partially specified by the LMI. The LMI, the NSI, and the target instructions may be executed by the processor in sequential program order or out of order.

Abstract: Embodiments for replicating data in a disaggregated computing system. A memory pool is allocated, where the memory pool includes allocated memory elements at a first site and allocated memory elements at a second site. The allocated memory elements are mapped at the first site to the allocated memory elements at the second site. A replication operation is initiated to mirror data stored within the allocated memory elements at the first site to the allocated memory elements at the second site. The allocated memory elements at the first site are directly connected through an independent networking connection to the allocated memory elements at the second site such that the replication operation is processed exclusively through compute resources at the first site.

Abstract: A method of organizing computer resources includes receiving a specification defining a plurality of quiescence groups of independent component instances for each of at least two services, and performing a first load balancing of the quiescence groups across a plurality of physical servers to define a plurality of supergroups while assigning each of the physical servers across the supergroups.

Abstract: Embodiments for optimizing dynamic resource allocations in a disaggregated computing environment. A new workload is assigned to a subset of a plurality of processors, the subset of processors assigned a subset of a plurality of cache devices. A determination is made that the new workload is categorized as a cache-friendly workload having a memory need which can be met primarily by the subset of cache devices by identifying that underlying data necessitated by the new workload resides primarily within the subset of cache devices. Pursuant to determining the new workload is the cache-friendly workload, a cache related action is performed to increase performance of the new workload executed by the subset of processors and commensurately executes additional workloads performed by other ones of the plurality of processors within the disaggregated computing environment.