Patents by Inventor Valentina Salapura

Valentina Salapura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10740106
    Abstract: A transactional memory system determines whether a hardware transaction can be salvaged. A processor of the transactional memory system begins execution of a transaction in a transactional memory environment. Based on detection that an amount of available resource for transactional execution is below a predetermined threshold level, the processor determines whether the transaction can be salvaged. Based on determining that the transaction can not be salvaged, the processor aborts the transaction. Based on determining the transaction can be salvaged, the processor performs a salvage operation, wherein the salvage operation comprises one or more of: determining that the transaction can be brought to a stable state without exceeding the amount of available resource for transactional execution, and bringing the transaction to a stable state; and determining that a resource can be made available, and making the resource available.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: August 11, 2020
    Assignee: International Business Machines Corporation
    Inventors: Fadi Y. Busaba, Harold W. Cain, III, Michael Karl Gschwind, Maged M. Michael, Valentina Salapura
  • Patent number: 10740097
    Abstract: Embodiments of the invention provide a method, system and computer program product for embedding a global barrier and global interrupt network in a parallel computer system organized as a torus network. The computer system includes a multitude of nodes. In one embodiment, the method comprises taking inputs from a set of receivers of the nodes, dividing the inputs from the receivers into a plurality of classes, combining the inputs of each of the classes to obtain a result, and sending said result to a set of senders of the nodes. Embodiments of the invention provide a method, system and computer program product for embedding a collective network in a parallel computer system organized as a torus network. In one embodiment, the method comprises adding to a torus network a central collective logic to route messages among at least a group of nodes in a tree structure.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: August 11, 2020
    Assignee: International Business Machines Corporation
    Inventors: Dong Chen, Paul W. Coteus, Noel A. Eisley, Alan Gara, Philip Heidelberger, Robert M. Senger, Valentina Salapura, Burkhard Steinmacher-Burow, Yutaka Sugawara, Todd E. Takken
  • Patent number: 10733091
    Abstract: Transactional memory accesses are tracked using read and write sets based on actual program flow. A read and write set is associated with a range of instructions of a transaction. When execution follows a predicted branch, loads and stores are marked as being of selected read and write sets. Then, when a misprediction is processed, and execution is rewound, speculatively added read and write set indications are removed from the read and write sets.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: August 4, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum
  • Patent number: 10732930
    Abstract: Setting or updating of floating point controls is managed. Floating point controls include controls used for floating point operations, such as rounding mode and/or other controls. Further, floating point controls include status associated with floating point operations, such as floating point exceptions and/or others. The management of the floating point controls includes efficiently updating the controls, while reducing costs associated therewith.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: August 4, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10725900
    Abstract: Transactional memory accesses are tracked using read and write sets based on actual program flow. A read and write set is associated with a range of instructions of a transaction. When execution follows a predicted branch, loads and stores are marked as being of selected read and write sets. Then, when a misprediction is processed, and execution is rewound, speculatively added read and write set indications are removed from the read and write sets.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: July 28, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum
  • Patent number: 10725918
    Abstract: Table of contents (TOC) pointer cache entry having a pointer for a range of addresses. An address of a called routine and a pointer value of a pointer to a reference data structure to be entered into a reference data structure pointer cache are obtained. The reference data structure pointer cache includes a plurality of entries, and an entry of the plurality of entries includes a stored pointer value for an address range. A determination is made, based on the pointer value, whether an existing entry exists in the reference data structure pointer cache for the pointer value. Based on determining the existing entry exists, one of an address_from field of the existing entry or an address_to field of the existing entry is updated using the address of the called routine. The stored pointer value of the existing entry is usable to access the reference data structure for the address range defined by the address_from field and the address_to field.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: July 28, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10725739
    Abstract: Setting or updating of floating point controls is managed. Floating point controls include controls used for floating point operations, such as rounding mode and/or other controls. Further, floating point controls include status associated with floating point operations, such as floating point exceptions and/or others. The management of the floating point controls includes efficiently updating the controls, while reducing costs associated therewith.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: July 28, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Publication number: 20200233688
    Abstract: A method of organizing computer resources includes receiving a specification defining a plurality of quiescence groups of independent component instances for each of at least two services, and performing a first load balancing of the quiescence groups across a plurality of physical servers to define a plurality of supergroups while assigning each of the physical servers across the supergroups.
    Type: Application
    Filed: January 23, 2019
    Publication date: July 23, 2020
    Inventors: RICHARD E. HARPER, HARIGOVIND V. RAMASAMY, VALENTINA SALAPURA, SANDHYA KAPOOR, LONG WANG
  • Patent number: 10719418
    Abstract: Embodiments for disaster recovery in a disaggregated computing system. A memory is allocated at a secondary, disaster recovery site for data received from a primary site. A degree of resiliency is defined for respective workloads associated with the data at the primary site to specify how critical each respective workload is to execute in case of disaster, and the data is replicated to the allocated memory at the disaster recovery site according to the degree of resiliency.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: July 21, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Valentina Salapura, John A. Bivens, Min Li, Ruchi Mahindru, Eugen Schenfeld
  • Patent number: 10719328
    Abstract: A predicted value to be used in register-indirect branching is predicted. The predicted value is to be stored in one or more locations based on the prediction. An offset for a predicted derived value is obtained. The predicted derived value is to be used as a pointer to a reference data structure providing access to variables used in processing. The predicted derived value is generated using the predicted value and the offset. The predicted derived value is used to access the reference data structure during processing.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: July 21, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10719322
    Abstract: A technique includes determining whether one or more instructions in an instruction group require cracking. Whether the instructions that require cracking are associated with a decode-time instruction optimization (DTIO) sequence is also determined. In response to a first instruction, included in the one or more instructions, requiring cracking and the first instruction not being part of a DTIO sequence, the first instruction is cracked into internal operations (IOPs). In response to a second instruction, included in the one or more instructions, requiring cracking and the second instruction being part of a DTIO sequence, an IOP sequence (that includes at least one IOP that is associated with at least a cracked version of the second instruction and at least a third instruction that is included in the one or more instructions and at least one other IOP that is associated with the cracked version of the second instruction) is generated.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: July 21, 2020
    Assignee: International Business Machines Corporation
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10713051
    Abstract: Table of Contents (TOC)-setting instructions are replaced in code with TOC predicting instructions. A determination is made as to whether code includes an instruction sequence to compute a value of a pointer to a reference data structure, such as a TOC. Based on determining the code includes the instruction sequence, the instruction sequence in the code is replaced with a set instruction. The set instruction predicts the value of the pointer to the reference data structure.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: July 14, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10713050
    Abstract: Table of Contents (TOC)-setting instructions are replaced in code with TOC predicting instructions. A determination is made as to whether code includes an instruction sequence to compute a value of a pointer to a reference data structure, such as a TOC. Based on determining the code includes the instruction sequence, the instruction sequence in the code is replaced with a set instruction. The set instruction predicts the value of the pointer to the reference data structure.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: July 14, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10705973
    Abstract: Initializing a data structure for use in predicting table of contents (TOC) pointer values. A request to load a module is obtained. Based on the loaded module, a pointer value for a reference data structure is determined. The pointer value is stored in a reference data structure tracking structure, and used to access a variable value for a variable of the module.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: July 7, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10698686
    Abstract: Configurable architectural placement control. A control is provided that specifies a location in memory at which one or more in-memory configuration state registers are stored. The control is used to access an in-memory configuration state register of the one or more in-memory configuration state registers. The control may be a configuration state register in which a base address specifying the location in memory is included.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: June 30, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10701141
    Abstract: Server resources in a data center are disaggregated into shared server resource pools. Servers are constructed dynamically, on-demand and based on a tenant's workload requirements, by allocating from these resource pools. The system also includes a license manager that operates to manage a pool of licenses that are available to be associated with resources drawn from the server resource pools. Upon provisioning of a server entity composed of resources drawn from the server resource pools, the license manager determines a license configuration suitable for the server entity. In response to receipt of information indicating a change in a composition of the server entity (e.g., as a workload is processed), the license manager determines whether an adjustment to the license configuration is required. If so, an adjusted license configuration for the server entity is determined and tracked to the tenant. The data center thus allocates appropriate licenses to server entities as required.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: June 30, 2020
    Assignee: International Business Machines Corporation
    Inventors: Valentina Salapura, John Alan Bivens, Min Li, Ruchi Mahindru, Harigovind V. Ramasamy, Yaoping Ruan, Eugen Schenfeld
  • Patent number: 10691600
    Abstract: Table of contents (TOC) pointer cache entry having a pointer for a range of addresses. An address of a called routine and a pointer value of a pointer to a reference data structure to be entered into a reference data structure pointer cache are obtained. The reference data structure pointer cache includes a plurality of entries, and an entry of the plurality of entries includes a stored pointer value for an address range. A determination is made, based on the pointer value, whether an existing entry exists in the reference data structure pointer cache for the pointer value. Based on determining the existing entry exists, one of an address_from field of the existing entry or an address_to field of the existing entry is updated using the address of the called routine. The stored pointer value of the existing entry is usable to access the reference data structure for the address range defined by the address_from field and the address_to field.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: June 23, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10694373
    Abstract: A system, method and program product for providing online privacy of image data. A centralized image privacy service is disclosed that includes: a user interface for allowing users to configure privacy profiles and provide profile images; an image scanning system that scans participating online sites for image data that matches the profile images; and a detection response system that determines a responsive action in response to a detected match based on an associated privacy profile, wherein the responsive action includes sending a masking request to the participating online site where the detected match occurred.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: June 23, 2020
    Assignee: International Business Machines Corporation
    Inventors: Amos Cahan, Ruchi Mahindru, Valentina Salapura, Syed Yousaf Shah
  • Patent number: 10684852
    Abstract: Setting or updating of floating point controls is managed. Floating point controls include controls used for floating point operations, such as rounding mode and/or other controls. Further, floating point controls include status associated with floating point operations, such as floating point exceptions and/or others. The management of the floating point controls includes efficiently updating the controls, while reducing costs associated therewith.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: June 16, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10684853
    Abstract: Setting or updating of floating point controls is managed. Floating point controls include controls used for floating point operations, such as rounding mode and/or other controls. Further, floating point controls include status associated with floating point operations, such as floating point exceptions and/or others. The management of the floating point controls includes efficiently updating the controls, while reducing costs associated therewith.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: June 16, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura