Patents by Inventor Venugopal Gopinathan
Venugopal Gopinathan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8760329Abstract: A method is provided. An analog signal is received. The analog input signal is compared to first and second reference signals to generate a first comparison result, and the first comparison result and a first time stamp corresponding to the first comparison result are registered. A first portion of a digital signal is generated from the first comparison result. If the comparison result remains substantially the same for a predetermined interval, an ADC is enabled to generate a second comparison result at a sampling instant. A second time stamp that corresponds to the sampling instant is generated. The second comparison result and a second time stamp corresponding to the first comparison result are registered, and a second portion of the digital signal is generated from the second comparison result.Type: GrantFiled: August 30, 2012Date of Patent: June 24, 2014Assignee: Texas Instruments IncorporatedInventors: Ganesan Thiagarajan, Udayan Dasgupta, Venugopal Gopinathan
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Patent number: 8754797Abstract: An apparatus is provided. A comparison circuit is configured to receive an analog signal. A reference circuit is coupled to the comparison circuit and is configured to provide a plurality of reference signals to the comparison circuit. A conversion circuit is coupled to the comparison circuit and is configured to detect a change in the output of the comparison circuit. A time-to-digital converter (TDC) is coupled to the comparison circuit. A timer is coupled to the comparison circuit. A rate control circuit is coupled to the conversion circuit. An output circuit is coupled to the rate control circuit and the TDC, where the output circuit is configured to output at least one of a synchronous digital representation of the analog signal and an asynchronous digital representation of the analog signal.Type: GrantFiled: August 30, 2012Date of Patent: June 17, 2014Assignee: Texas Instruments IncorporatedInventors: Venugopal Gopinathan, Udayan Dasgupta, Ganesan Thiagarajan
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Patent number: 8736481Abstract: A method for communicating signals in an ultra high bandwidth system that compensates for carrier frequency offset is provided. A baseband transmit signal having a plurality of data bits is generated. The baseband transmit signal is upconverted to a radio frequency (RF) transmit signal using a first local oscillator signal having a first carrier frequency. An offset cancellation for the offset between the first carrier frequency and a second carrier frequency for a second local oscillator signal that is used to downconvert an RF receive signal is calculated. The offset cancellation is applied to a plurality of phase rotators, and the RF transmit signal is transmitted over a phased array.Type: GrantFiled: October 28, 2011Date of Patent: May 27, 2014Assignee: Texas Instruments IncorporatedInventors: Nirmal C. Warke, Srinath Hosur, Venugopal Gopinathan
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Publication number: 20140062734Abstract: A method is provided. An analog signal is received. The analog input signal is compared to first and second reference signals to generate a first comparison result, and the first comparison result and a first time stamp corresponding to the first comparison result are registered. A first portion of a digital signal is generated from the first comparison result. If the comparison result remains substantially the same for a predetermined interval, an ADC is enabled to generate a second comparison result at a sampling instant. A second time stamp that corresponds to the sampling instant is generated. The second comparison result and a second time stamp corresponding to the first comparison result are registered, and a second portion of the digital signal is generated from the second comparison result.Type: ApplicationFiled: August 30, 2012Publication date: March 6, 2014Applicant: Texas Instruments IncorporatedInventors: Ganesan Thiagarajan, Udayan Dasgupta, Venugopal Gopinathan
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Publication number: 20140062751Abstract: An apparatus is provided. A comparison circuit is configured to receive an analog signal. A reference circuit is coupled to the comparison circuit and is configured to provide a plurality of reference signals to the comparison circuit. A conversion circuit is coupled to the comparison circuit and is configured to detect a change in the output of the comparison circuit. A time-to-digital converter (TDC) is coupled to the comparison circuit. A timer is coupled to the comparison circuit. A rate control circuit is coupled to the conversion circuit. An output circuit is coupled to the rate control circuit and the TDC, where the output circuit is configured to output at least one of a synchronous digital representation of the analog signal and an asynchronous digital representation of the analog signal.Type: ApplicationFiled: August 30, 2012Publication date: March 6, 2014Applicant: Texas Instruments IncorporatedInventors: Venugopal Gopinathan, Udayan Dasgupta, Ganesan Thiagarajan
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Publication number: 20140062735Abstract: A method is provided. An analog signal is received. The analog input signal is compared to first and second reference signals to generate a first comparison result, and the first comparison result and a first time stamp corresponding to the first comparison result are registered. A first portion of a digital signal is generated from the first comparison result. At least one of the first and second reference signals is adjusted. A second comparison result is generated if the analog signal reaches an adjusted one of the first and second reference signals within a predetermined interval, and a second portion of the digital signal is generated from the second comparison result.Type: ApplicationFiled: August 30, 2012Publication date: March 6, 2014Applicant: Texas Instruments IncorporatedInventors: Udayan Dasgupta, Ganesan Thiagarajan, Venugopal Gopinathan
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Publication number: 20130106641Abstract: A method for communicating signals in an ultra high bandwidth system that compensates for carrier frequency offset is provided. A baseband transmit signal having a plurality of data bits is generated. The baseband transmit signal is upconverted to a radio frequency (RF) transmit signal using a first local oscillator signal having a first carrier frequency. An offset cancellation for the offset between the first carrier frequency and a second carrier frequency for a second local oscillator signal that is used to downconvert an RF receive signal is calculated. The offset cancellation is applied to a plurality of phase rotators, and the RF transmit signal is transmitted over a phased array.Type: ApplicationFiled: October 28, 2011Publication date: May 2, 2013Applicant: Texas Instruments IncorporatedInventors: Nirmal C. Warke, Srinath Hosur, Venugopal Gopinathan
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Patent number: 8374689Abstract: Methods and systems for determining information about a vascular bodily lumen are described. An exemplary method includes generating an electrical signal, delivering the electrical signal to a plurality of excitation elements in the vicinity of the vascular bodily lumen, measuring a responsive electrical signal from a plurality of sensing elements in response to the delivered electrical signal, and determining a lumen dimension. Specific embodiments include generating a multiple frequency electrical signal. Another embodiment includes measuring a plurality of responsive signals at a plurality of frequencies. Still other embodiments include using spatial diversity of the excitation elements. Yet other embodiments use method for calibration and de-embedding of such measurements to determine the lumen dimensions. Diagnostic devices incorporating the method are also disclosed, including guide wires, catheters and implants.Type: GrantFiled: November 28, 2011Date of Patent: February 12, 2013Assignee: Angiometrix CorporationInventors: Venugopal Gopinathan, Raghavan Subramaniyan, Goutam Dutta, Nitin Patil, Abhijit Patki
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Patent number: 8363683Abstract: Digital signal processing based methods and systems for receiving data signals include parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter (“ADC”) and/or a digital signal processor (“DSP”) are implemented with parallel paths that operate at lower rates than the received data signal. In an embodiment, a parallel DSP-based receiver in accordance with the invention includes a separate timing recovery loop for each ADC path. In an embodiment, a parallel DSP-based receiver includes a separate automatic gain control (AGC) loop for each ADC path. In an embodiment, a parallel DSP-based receiver includes a separate offset compensation loop for each ADC path. In an embodiment, the present invention is implemented as a multi-channel receiver that receives a plurality of data signals.Type: GrantFiled: August 16, 2010Date of Patent: January 29, 2013Assignee: Broadcom CorporationInventors: Oscar Agazzi, Venugopal Gopinathan
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Publication number: 20120101355Abstract: Methods and systems for determining information about a vascular bodily lumen are described. An exemplary method includes generating an electrical signal, delivering the electrical signal to a plurality of excitation elements in the vicinity of the vascular bodily lumen, measuring a responsive electrical signal from a plurality of sensing elements in response to the delivered electrical signal, and determining a lumen dimension. Specific embodiments include generating a multiple frequency electrical signal. Another embodiment includes measuring a plurality of responsive signals at a plurality of frequencies. Still other embodiments include using spatial diversity of the excitation elements. Yet other embodiments use method for calibration and de-embedding of such measurements to determine the lumen dimensions. Diagnostic devices incorporating the method are also disclosed, including guide wires, catheters and implants.Type: ApplicationFiled: November 28, 2011Publication date: April 26, 2012Applicant: ANGIOMETRIX CORPORATIONInventors: Venugopal GOPINATHAN, Raghavan SUBRAMANIYAN, Goutam DUTTA, Nitin PATIL, Abhijit PATKI
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Patent number: 8138839Abstract: A CMOS gain stage includes biasing circuitry configured to insure saturation of a subsequent stage without a source follower circuit. The CMOS gain stage is optionally powered by a supply voltage that is greater than a permitted supply voltage for a processes technology that is used to fabricate the CMOS gain stage. In order to protect CMOS devices within the CMOS gain stage, optional drain-to-bulk junction punch-through protection circuitry is disclosed. A variety of optional features can be implemented alone and/or in various combinations of one another. Optional features include process-voltage-temperature (“PVT”) variation protection circuitry, which renders a gain relatively independent of process, voltage, and/or temperature variations. Optional features further include bandwidth enhancement circuitry.Type: GrantFiled: April 10, 2007Date of Patent: March 20, 2012Assignee: Broadcom CorporationInventors: Sandeep Kumar Gupta, Venugopal Gopinathan
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Publication number: 20110306867Abstract: Methods and systems for determining information about a vascular bodily lumen are described. An exemplary method includes generating an electrical signal, delivering the electrical signal to a plurality of excitation elements in the vicinity of the vascular bodily lumen, measuring a responsive electrical signal from a plurality of sensing elements in response to the delivered electrical signal, and determining a lumen dimension. Specific embodiments include generating a multiple frequency electrical signal. Another embodiment includes measuring a plurality of responsive signals at a plurality of frequencies. Still other embodiments include using spatial diversity of the excitation elements. Yet other embodiments use method for calibration and de-embedding of such measurements to determine the lumen dimensions. Diagnostic devices incorporating the method are also disclosed, including guide wires, catheters and implants.Type: ApplicationFiled: June 13, 2011Publication date: December 15, 2011Inventors: Venugopal Gopinathan, Raghavan Subramaniyan, Goutam Dutta, Nitin Patil, Abhijit Patki
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Publication number: 20100310024Abstract: Digital signal processing based methods and systems for receiving data signals include parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter (“ADC”) and/or a digital signal processor (“DSP”) are implemented with parallel paths that operate at lower rates than the received data signal. In an embodiment, a parallel DSP-based receiver in accordance with the invention includes a separate timing recovery loop for each ADC path. In an embodiment, a parallel DSP-based receiver includes a separate automatic gain control (AGC) loop for each ADC path. In an embodiment, a parallel DSP-based receiver includes a separate offset compensation loop for each ADC path. In an embodiment, the present invention is implemented as a multi-channel receiver that receives a plurality of data signals.Type: ApplicationFiled: August 16, 2010Publication date: December 9, 2010Applicant: Broadcom CorporationInventors: Oscar Agazzi, Venugopal Gopinathan
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Patent number: 7835387Abstract: Digital signal processing based methods and systems for receiving electrical and/or optical data signals include electrical receivers, optical receivers, parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a single path receiver. Alternatively, the present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter (“ADC”) and/or a digital signal processor (“DSP”) are implemented with parallel paths that operate at lower rates than the received data signal.Type: GrantFiled: July 1, 2009Date of Patent: November 16, 2010Assignee: Broadcom CorporationInventors: Oscar Agazzi, Venugopal Gopinathan
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Patent number: 7778286Abstract: Digital signal processing based methods and systems for receiving data signals include parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter (“ADC”) and/or a digital signal processor (“DSP”) are implemented with parallel paths that operate at lower rates than the received data signal. In an embodiment, a parallel DSP-based receiver in accordance with the invention includes a separate timing recovery loop for each ADC path. In an embodiment, a parallel DSP-based receiver includes a separate automatic gain control (AGC) loop for each ADC path. In an embodiment, a parallel DSP-based receiver includes a separate offset compensation loop for each ADC path. In an embodiment, the present invention is implemented as a multi-channel receiver that receives a plurality of data signals.Type: GrantFiled: July 16, 2007Date of Patent: August 17, 2010Assignee: Broadcom CorporationInventors: Oscar Agazzi, Venugopal Gopinathan
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Publication number: 20090310665Abstract: Digital signal processing based methods and systems for receiving electrical and/or optical data signals include electrical receivers, optical receivers, parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a single path receiver. Alternatively, the present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter (“ADC”) and/or a digital signal processor (“DSP”) are implemented with parallel paths that operate at lower rates than the received data signal.Type: ApplicationFiled: July 1, 2009Publication date: December 17, 2009Applicant: Broadcom CorporationInventors: Oscar Agazzi, Venugopal Gopinathan
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Patent number: 7564866Abstract: Digital signal processing based methods and systems for receiving optical data signals include parallel receivers, multi-channel receivers, timing recovery schemes, equalization schemes, and multi-path parallel receivers in which an analog-to-digital converter (“ADC”) and/or a digital signal processor (“DSP”) are implemented with parallel paths that operate at lower rates than the received data signal.Type: GrantFiled: July 23, 2001Date of Patent: July 21, 2009Assignee: Broadcom CorporationInventors: Oscar Agazzi, Venugopal Gopinathan
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Patent number: 7474151Abstract: A differential preamplifier includes an active load with adjustable common-mode output level. The active load includes a transistor pair, a resistor pair, and a current source. The transistor load is employed to provide high gain, low offset, and a large bandwidth for the differential preamplifier. The resistor pair and current source are used to increase the common-mode output level of the differential preamplifier and to bias the transistor load. The current source can be varied to provide an adjustable common-mode output level suitable for driving next stage devices. The active load design allows the differential preamplifier to operate using only low power voltage supplies and with small-sized transistors.Type: GrantFiled: September 28, 2007Date of Patent: January 6, 2009Assignee: Broadcom CorporationInventors: Venugopal Gopinathan, Sherif Hassan Galal
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Patent number: 7330140Abstract: Interleaved analog to digital converter with compensation for parameter mismatch among individual converters. A reference ADC samples an input signal at substantially the same time instances as an individual converter used in the interleaved ADC. The reference values provided by the reference ADC are compared with the digital codes generated by the converter to generate an error value from which estimates of the gain, DC offset and timing errors are computed using statistical techniques. Timing error thus estimated is used to change the phase of the sampling clock provided to the converter, and the gain and DC offset errors estimated are applied to modify the values of reference voltages applied to the converter, thus compensating for parameter mismatches.Type: GrantFiled: June 16, 2006Date of Patent: February 12, 2008Assignee: Texas Instruments IncorporatedInventors: Jaiganesh Balakrishnan, Venugopal Gopinathan, Sthanunathan Ramakrishnan
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Publication number: 20080030273Abstract: A differential preamplifier includes an active load with adjustable common-mode output level. The active load includes a transistor pair, a resistor pair, and a current source. The transistor load is employed to provide high gain, low offset, and a large bandwidth for the differential preamplifier. The resistor pair and current source are used to increase the common-mode output level of the differential preamplifier and to bias the transistor load. The current source can be varied to provide an adjustable common-mode output level suitable for driving next stage devices. The active load design allows the differential preamplifier to operate using only low power voltage supplies and with small-sized transistors.Type: ApplicationFiled: September 28, 2007Publication date: February 7, 2008Applicant: Broadcom CorporationInventors: Venugopal Gopinathan, Sherif Galal