Patents by Inventor Wai Lo

Wai Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130237030
    Abstract: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. In alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.
    Type: Application
    Filed: April 19, 2013
    Publication date: September 12, 2013
    Applicant: Spansion LLC
    Inventors: Steven AVANZINO, Tzu-Ning FANG, Swaroop KAZA, Dongxiang LIAO, Wai LO, Christie MARRIAN, Sameer HADDAD
  • Patent number: 8497450
    Abstract: A laser-based workpiece processing system includes sensors connected to a sensor controller that converts sensor signals into focused spot motion commands for actuating a beam steering device, such as a two-axis steering mirror. The sensors may include a beam position sensor for correcting errors detected in the optical path, such as thermally-induced beam wandering in response to laser or acousto-optic modulator pointing stability, or optical mount dynamics.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: July 30, 2013
    Assignee: Electro Scientific Industries, Inc.
    Inventors: Kelly Bruland, Mark Unrath, Stephen Swaringen, Ho Wai Lo, Clint Vandergiessen, Keith Grant
  • Patent number: 8496498
    Abstract: A lighting connector which includes (a) an upper housing having plural connector pins, and one or more interlocking grooves; and (b) a lower housing, the lower housing having a plurality of connector pin guide holes, and one or more interlocking tongue portions. The lower housing is connectable with the upper housing to form the lighting connector by coupling at least one of the one or more interlocking grooves with at least one of the one or more interlocking tongue portions, and by coupling at least one of the plural connector pins with at least one of the connector pin guide holes.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: July 30, 2013
    Assignee: Huizhou Light Engine Ltd.
    Inventors: Paul Chung Wai Lo, Teddy Yeung Man Lo, Eddie Ping Kuen Li, Sue-Anne Tean Leung
  • Patent number: 8480425
    Abstract: A lighting connector which includes first and second upper housings, each upper housing having plural connector pins, and one or more interlocking grooves; first and second lower housings, each the lower housing having a plurality of connector pin guide holes, and one or more interlocking tongue portions; and a flexible connector electrically connecting an inner side of the first lower housing with an inner side of the second lower housing, the first lower housing being connectable with the first upper housing, and the second lower housing being connectable with the second upper housing, to form the lighting connector by coupling at least one of the one or more interlocking grooves with at least one of the one or more interlocking tongue portions, and by coupling at least one of the plural connector pins with at least one of the connector pin guide holes.
    Type: Grant
    Filed: May 26, 2012
    Date of Patent: July 9, 2013
    Assignee: Huizhou Light Engine Ltd.
    Inventors: Paul Chung Wai Lo, Teddy Yeung Man Lo, Eddie Ping Kuen Li, Sue-Anne Tean Leung
  • Patent number: 8445913
    Abstract: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. In alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: May 21, 2013
    Assignee: Spansion LLC
    Inventors: Steven Avanzino, Tzu-Ning Fang, Swaroop Kaza, Dongxiang Liao, Wai Lo, Christie Marrian, Sameer Haddad
  • Patent number: 8414325
    Abstract: A lighting connector which includes (a) an upper housing having plural connector pins, and one or more interlocking grooves; and (b) a lower housing, the lower housing having a plurality of connector pin guide holes, and one or more interlocking tongue portions. The lower housing is connectable with the upper housing to form the lighting connector by coupling at least one of the one or more interlocking grooves with at least one of the one or more interlocking tongue portions, and by coupling at least one of the plural connector pins with at least one of the connector pin guide holes.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: April 9, 2013
    Assignee: Huizhou Light Engine Ltd.
    Inventors: Paul Chung Wai Lo, Teddy Yeung Man Lo, Eddie Ping Kuen Li, Sue-Anne Tean Leung
  • Patent number: 8408936
    Abstract: A lighting connector which includes (a) an upper housing having plural connector pins, and one or more interlocking grooves; and (b) a lower housing, the lower housing having a plurality of connector pin guide holes, and one or more interlocking tongue portions. The lower housing is connectable with the upper housing to form the lighting connector by coupling at least one of the one or more interlocking grooves with at least one of the one or more interlocking tongue portions, and by coupling at least one of the plural connector pins with at least one of the connector pin guide holes.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: April 2, 2013
    Assignee: Huithan Light Engine Ltd.
    Inventors: Paul Chung Wai Lo, Teddy Yeung Man Lo, Eddie Ping Kuen Li, Sue-Anne Tean Leung
  • Patent number: 8408937
    Abstract: A lighting connector which includes an upper housing having plural connector pins, and one or more interlocking grooves; a lower housing, the lower housing having a plurality of connector pin guide holes, and one or more interlocking tongue portions; a power supply plug; and a flexible connector electrically connecting an inner side of the lower housing with an inner side of the power supply plug, the lower housing being connectable with the upper housing to form the lighting connector by coupling at least one of the one or more interlocking grooves with at least one of the one or more interlocking tongue portions, and by coupling at least one of the plural connector pins with at least one of the connector pin guide holes.
    Type: Grant
    Filed: May 26, 2012
    Date of Patent: April 2, 2013
    Assignee: Huizhou Light Engine Ltd.
    Inventors: Paul Chung Wai Lo, Teddy Yeung Man Lo, Eddie Ping Kuen Li, Sue-Anne Tean Leung
  • Patent number: 8383982
    Abstract: Methods and systems selectively irradiate structures on or within a semiconductor substrate using multiple laser beams. The structures may be laser-severable conductive links, and the purpose of the irradiation may be to sever selected links.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: February 26, 2013
    Assignee: Electro Scientific Industries, Inc.
    Inventors: Kelly J. Bruland, Stephen N. Swaringen, Brian W. Baird, Ho Wai Lo, David Martin Hemenway, Brady Nilsen, Clint Vandergiessen
  • Patent number: 8384165
    Abstract: A method to maintain a well-defined gate stack profile, deposit or grow a uniform gate dielectric, and maintain gate length CD control by means of an inert insulating liner deposited after dummy gate etch and before the spacer process. The liner material is selective to wet chemicals used to remove the dummy gate oxide thereby preventing undercut in the spacer region. The method is aimed at making the metal gate electrode technology a feasible technology with maximum compatibility with the existing fabrication environment for multiple generations of CMOS transistors, including those belonging to the 65 nm, 45 nm and 25 nm technology nodes, that are being used in analog, digital or mixed signal integrated circuit for various applications such as communication, entertainment, education and security products.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: February 26, 2013
    Assignee: LSI Corporation
    Inventors: Richard J. Carter, Wai Lo, Sey-Shing Sun, Hong Lin, Verne Hornback
  • Patent number: 8384146
    Abstract: Methods for fabricating a semiconductor memory cell that has a spacer layer are disclosed. A method includes forming a plurality of source/drain regions in a substrate where the plurality of source/drain regions are formed between trenches, forming a first oxide layer above the plurality of source/drain regions and in the trenches, forming a charge storage layer above the oxide layer and separating the charge storage layer in the trenches where a space is formed between separated portions of the charge storage layer. The method further includes forming a spacer layer to fill the space between the separated portions of the charge storage layer and to rise a predetermined distance above the space. A second oxide layer is formed above the charge storage layer and the spacer layer and a polysilicon layer is formed above the second oxide layer.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: February 26, 2013
    Assignee: Spansion LLC
    Inventors: Shenqing Fang, Angela Hui, Gang Xue, Alexander Nickel, Kashmir Sahota, Scott Bell, Chun Chen, Wai Lo
  • Publication number: 20130001641
    Abstract: A method and a semiconductor device for incorporating defect mitigation structures are provided. The semiconductor device comprises a substrate, a defect mitigation structure comprising a combination of layers of doped or undoped group IV alloys and metal or non-metal nitrides disposed over the substrate, and a device active layer disposed over the defect mitigation structure. The defect mitigation structure is fabricated by depositing one or more defect mitigation layers comprising a substrate nucleation layer disposed over the substrate, a substrate intermediate layer disposed over the substrate nucleation layer, a substrate top layer disposed over the substrate intermediate layer, a device nucleation layer disposed over the substrate top layer, a device intermediate layer disposed over the device nucleation layer, and a device top layer disposed over the device intermediate layer.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Inventors: Zubin P. Patel, Tracy Helen Fung, Jinsong Tang, Wai Lo, Arun Ramamoorthy
  • Publication number: 20120238115
    Abstract: A lighting connector which includes (a) an upper housing having plural connector pins, and one or more interlocking grooves; and (b) a lower housing, the lower housing having a plurality of connector pin guide holes, and one or more interlocking tongue portions. The lower housing is connectable with the upper housing to form the lighting connector by coupling at least one of the one or more interlocking grooves with at least one of the one or more interlocking tongue portions, and by coupling at least one of the plural connector pins with at least one of the connector pin guide holes.
    Type: Application
    Filed: May 25, 2012
    Publication date: September 20, 2012
    Inventors: Paul Chung Wai Lo, Teddy Yeung Man Lo, Eddie Ping Kuen Li, Sue-Anne Tean Leung
  • Publication number: 20120238116
    Abstract: A lighting connector which includes first and second upper housings, each upper housing having plural connector pins, and one or more interlocking grooves; first and second lower housings, each the lower housing having a plurality of connector pin guide holes, and one or more interlocking tongue portions; and a flexible connector electrically connecting an inner side of the first lower housing with an inner side of the second lower housing, the first lower housing being connectable with the first upper housing, and the second lower housing being connectable with the second upper housing, to form the lighting connector by coupling at least one of the one or more interlocking grooves with at least one of the one or more interlocking tongue portions, and by coupling at least one of the plural connector pins with at least one of the connector pin guide holes.
    Type: Application
    Filed: May 26, 2012
    Publication date: September 20, 2012
    Inventors: Paul Chung Wai Lo, Teddy Yeung Man Lo, Eddie Ping Kuen Li, Sue-Anne Tean Leung
  • Publication number: 20120238129
    Abstract: A lighting connector which includes (a) an upper housing having plural connector pins, and one or more interlocking grooves; and (b) a lower housing, the lower housing having a plurality of connector pin guide holes, and one or more interlocking tongue portions. The lower housing is connectable with the upper housing to form the lighting connector by coupling at least one of the one or more interlocking grooves with at least one of the one or more interlocking tongue portions, and by coupling at least one of the plural connector pins with at least one of the connector pin guide holes.
    Type: Application
    Filed: May 25, 2012
    Publication date: September 20, 2012
    Inventors: Paul Chung Wai Lo, Teddy Yeung Man Lo, Eddie Ping Kuen Li, Sue-Anne Tean Leung
  • Publication number: 20120238117
    Abstract: A lighting connector which includes an upper housing having plural connector pins, and one or more interlocking grooves; a lower housing, the lower housing having a plurality of connector pin guide holes, and one or more interlocking tongue portions; a power supply plug; and a flexible connector electrically connecting an inner side of the lower housing with an inner side of the power supply plug, the lower housing being connectable with the upper housing to form the lighting connector by coupling at least one of the one or more interlocking grooves with at least one of the one or more interlocking tongue portions, and by coupling at least one of the plural connector pins with at least one of the connector pin guide holes.
    Type: Application
    Filed: May 26, 2012
    Publication date: September 20, 2012
    Inventors: Paul Chung Wai Lo, Teddy Yeung Man Lo, Eddie Ping Kuen Li, Sue-Anne Tean Leung
  • Publication number: 20120238128
    Abstract: A lighting connector which includes (a) an upper housing having plural connector pins, and one or more interlocking grooves; and (b) a lower housing, the lower housing having a plurality of connector pin guide holes, and one or more interlocking tongue portions. The lower housing is connectable with the upper housing to form the lighting connector by coupling at least one of the one or more interlocking grooves with at least one of the one or more interlocking tongue portions, and by coupling at least one of the plural connector pins with at least one of the connector pin guide holes.
    Type: Application
    Filed: May 25, 2012
    Publication date: September 20, 2012
    Inventors: Paul Chung Wai Lo, Teddy Yeung Man Lo, Eddie Ping Kuen Li, Sue-Anne Tean Leung
  • Patent number: 8238007
    Abstract: A laser-based workpiece processing system includes sensors connected to a sensor controller that converts sensor signals into focused spot motion commands for actuating a beam steering device, such as a two-axis steering mirror. The sensors may include a beam position sensor for correcting errors detected in the optical path, such as thermally-induced beam wandering in response to laser or acousto-optic modulator pointing stability, or optical mount dynamics.
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: August 7, 2012
    Assignee: Electro Scientific Industries, Inc.
    Inventors: Kelly Bruland, Mark Unrath, Stephen Swaringen, Ho Wai Lo, Clint Vandergiessen, Keith Grant
  • Publication number: 20120181601
    Abstract: Methods for fabricating a semiconductor memory cell that has a spacer layer are disclosed. A method includes forming a plurality of source/drain regions in a substrate where the plurality of source/drain regions are formed between trenches, forming a first oxide layer above the plurality of source/drain regions and in the trenches, forming a charge storage layer above the oxide layer and separating the charge storage layer in the trenches where a space is formed between separated portions of the charge storage layer. The method further includes forming a spacer layer to fill the space between the separated portions of the charge storage layer and to rise a predetermined distance above the space. A second oxide layer is formed above the charge storage layer and the spacer layer and a polysilicon layer is formed above the second oxide layer.
    Type: Application
    Filed: March 23, 2012
    Publication date: July 19, 2012
    Inventors: Shenqing FANG, Angela HUI, Gang XUE, Alexander NICKEL, Kashmir SAHOTA, Scott BELL, Chun CHEN, Wai LO
  • Patent number: D673111
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: December 25, 2012
    Assignee: Stycom Limited
    Inventors: Ying Wai Lo, Hoi Chun Ng