Abstract: A method for operating a system level interconnect in an integrated circuit (IC) is provided in an example embodiment. The method comprises: writing, by a microcontroller in the IC, a first configuration value into a configuration register, where the first configuration value programs the system level interconnect to couple a first peripheral to a second peripheral; monitoring the IC to determine an operational state of the IC; and in response to determining a change in the operational state of the IC, writing by the microcontroller a second configuration value into the configuration register to dynamically change interconnections in the system level interconnect between the first peripheral and the second peripheral.

Abstract: A method and system of automatically generating source code for configuring a programmable microcontroller. The method involves displaying virtual blocks in a computerized design system where the virtual blocks correspond to programmable circuit blocks in a microcontroller chip. The user selects a user module that defines a particular function to be performed on the microcontroller. The user assigns the virtual blocks to the user module. The design system then automatically generates source code for configuring the programmable blocks to perform the desired function. The source code can then be assembled, linked and loaded into the microcontroller's memory system. When executed on the microcontroller, the executable code will then set registers within the blocks to implement the function. Source code is automatically generated for: (1) realizing the user module in a hardware resource; and also (2) to configure the user module to behave in a prescribed manner.

Abstract: A method for operating a system level interconnect in an integrated circuit (IC) is provided in an example embodiment. The method comprises: writing, by a microcontroller in the IC, a first configuration value into a configuration register, where the first configuration value programs the system level interconnect to couple a first peripheral to a second peripheral; monitoring the IC to determine an operational state of the IC; and in response to determining a change in the operational state of the IC, writing by the microcontroller a second configuration value into the configuration register to dynamically change interconnections in the system level interconnect between the first peripheral and the second peripheral.

Abstract: In an example embodiment, a digital block comprises a datapath circuit, one or more programmable logic devices (PLDs), and one or more control registers. The datapath circuit comprises structural arithmetic elements. The one or more PLDs comprise uncommitted programmable logic. The one or more control circuits comprise a control register configured to store user-defined control bits, where the one or more control circuits are configured to control both the structural arithmetic elements and the uncommitted programmable logic based on the user-defined control bits.

Abstract: In an example embodiment, a digital block comprises a datapath circuit, one or more programmable logic devices (PLDs), and one or more control registers. The datapath circuit comprises structural arithmetic elements. The one or more PLDs comprise uncommitted programmable logic. The one or more control circuits comprise a control register configured to store user-defined control bits, where the one or more control circuits are configured to control both the structural arithmetic elements and the uncommitted programmable logic based on the user-defined control bits.

Abstract: A method and system of automatically generating source code for configuring a programmable microcontroller. The method involves displaying virtual blocks in a computerized design system where the virtual blocks correspond to programmable circuit blocks in a microcontroller chip. The user selects a user module that defines a particular function to be performed on the microcontroller. The user assigns the virtual blocks to the user module. The design system then automatically generates source code for configuring the programmable blocks to perform the desired function. The source code can then be assembled, linked and loaded into the microcontroller's memory system. When executed on the microcontroller, the executable axle will then set registers within the blocks to implement the function. Source code is automatically generated for: (1) realizing the user module in a hardware resource; and also (2) to configure the user module to behave in a prescribed manner.

Abstract: In an example embodiment, a digital block comprises a datapath circuit, one or more programmable logic devices (PLDs), and one or more control registers. The datapath circuit comprises structural arithmetic elements. The one or more PLDs comprise uncommitted programmable logic. The one or more control circuits comprise a control register configured to store user-defined control bits, where the one or more control circuits are configured to control both the structural arithmetic elements and the uncommitted programmable logic based on the user-defined control bits.

Abstract: In an example embodiment, a digital block comprises a datapath circuit, one or more programmable logic devices (PLDs), and one or more control registers. The datapath circuit comprises structural arithmetic elements. The one or more PLDs comprise uncommitted programmable logic. The one or more control circuits comprise a control register configured to store user-defined control bits, where the one or more control circuits are configured to control both the structural arithmetic elements and the uncommitted programmable logic based on the user-defined control bits.

Abstract: An integrated circuit device may include a reconfigurable analog signal switching fabric comprising a plurality of global buses that are selectively connected to external pins by pin connection circuits in response to changeable analog routing data, and a plurality of local buses that are selectively connected to analog blocks and/or global buses by routing connection circuits in response to the analog routing data; and at least one processor circuit that executes predetermined operations in response to instruction data.

Abstract: A plurality of functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller. A configuration data store in the integrated circuit stores configuration values loaded by the micro-controller. A plurality of connectors are configured to connect the integrated circuit to external signals. A programmable interconnect also located in the integrated circuit programmably connects together the plurality of functional elements and the plurality of connectors according to the configuration values loaded into the configuration data store.

Abstract: A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O.

Abstract: A circuit with a plurality of analog circuit blocks, each configured to provide at least one analog function and a programmable interconnect coupled of the analog circuit blocks and configurable to interconnect combinations of the analog circuit blocks to one another. The circuit is formed in an integrated circuit (chip) and the programmable interconnect comprises a plurality of switches coupled between the analog circuit blocks and ports that provide signal connections for the chip.

Abstract: A liquid crystal display (LCD) driving system includes a reference voltage generator to generate a plurality of reference voltages. The LCD driving system also includes a plurality of drive buffers to generate drive voltages according to at least one of the reference voltages, and to drive at least a portion of a liquid crystal display to present data according to the drive voltages.

Abstract: A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O.

Abstract: A programmable system includes an input/output (I/O) pin that is configurable into multiple operational states. The programmable system further includes a memory device to store configuration data that, when provided to the I/O pin, causes the I/O pin to reconfigure into one of the operational states. When power is supplied to the system, the memory device is configured to provide the configuration data to the I/O pin prior to a system microcontroller becoming operational responsive to the power.

Abstract: A method and apparatus to provide random access to a programmable logic register. A processing device in a programmable logic system retrieves data from a memory of the programmable logic system. The data is loaded into a configuration register configured to store configuration data for a programmable logic function over a system bus. The processing device programs a programmable logic block to implement the programmable logic function based on the configuration data, where the processing device is configured to access a first configuration register in the configuration register set, the first configuration register corresponding to a first programmable logic block in the programmable logic system, without affecting a second configuration register corresponding to a second programmable logic block.

Abstract: A Programmable System on a Chip Hub (PHUB) is configured to enable master processing elements within the PHUB to simultaneously access peripherals on different busses. The master processing elements include a Central Processing Unit (CPU) interface configured to decode addresses received from a CPU and configure the PHUB to connect signaling from the CPU to one of the multiple busses associated with the address. A second one of the master processing elements is a Direct Memory Access Controller (DMAC) source engine configured to conduct Direct Memory Access (DMA) reads. A third one of the master processing elements is a DMAC destination engine configured to conduct DMA writes independently of the CPU interface.

Abstract: A display interface buffer includes a general purpose memory to store data capable of being displayed on a panel, a plurality of display drivers to receive data from the general purpose memory, each of the display drivers to drive a different portion of the panel with the data, and processor or a direct memory access controller to access data in the general purpose memory and to provide the data to the display drivers for presentation on the panel.

Abstract: Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is used to couple the programmable analog and digital blocks as needed. The advanced microcontroller design also includes programmable input/output blocks for coupling selected signals to external pins. The memory components also include user programs that the embedded microprocessor executes. These programs may include instructions for programming the digital and analog blocks “on-the-fly,” e.g., dynamically. In one implementation, there are a plurality of programmable digital blocks and a plurality of programmable analog blocks.

Abstract: A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O.