Patents by Inventor Warren Snyder
Warren Snyder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7076420Abstract: A communication interface for an in-circuit emulation system. The interface uses four pins between a virtual microcontroller (an FPGA emulating a microcontroller) and a real microcontroller under test. The bus is fast enough to allow the two devices to operate in synchronization. I/O reads, interrupt vector information and watchdog information is provided over the bus in a time fast enough to allow execution in lock step. Two data lines are provided, one is bi-directional and one is driven only by the microcontroller. A system clock is provided and the microcontroller supplies its clock signal to the FPGA since the microcontroller can operate at varying clock speeds. The bus is time-dependent so more information can be placed on this reduced-pin count bus. Therefore, instructions and data are distinguished based on the time the information is sent within the sequence. The bus can be used to carry trace information, program the flash memory on the microcontroller, perform test control functions, etc.Type: GrantFiled: October 10, 2001Date of Patent: July 11, 2006Assignee: Cypress Semiconductor Corp.Inventors: Warren Snyder, Craig Nemecek, Bert Sullam
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Publication number: 20060037007Abstract: A user application is generated in response to user input, wherein the user application is described in a user application description. Processing device code is generated for a targeted processing device based at least in part on the user application description without user intervention, wherein the processing device code includes a system layer, wherein functionality of the system layer is independent of the targeted processing device.Type: ApplicationFiled: August 10, 2005Publication date: February 16, 2006Inventors: Warren Snyder, Dinesh Maheshwari, Kenneth Ogami, Mark Hastings
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Patent number: 6981090Abstract: A circuit arrangement permits a microcontroller wirebond pad to be configured to be an analog or digital input or output. The circuit arrangement uses any of a plurality of switching configurations to selectively determine the use of the wirebond pad under control of the microcontroller's processor. The microcontroller can be configured using configurable analog and configurable digital blocks to perform any of a plurality of functions with certain of the pinouts determined under program control.Type: GrantFiled: June 26, 2001Date of Patent: December 27, 2005Assignee: Cypress Semiconductor CorporationInventors: Harold Kutz, Monte Mar, Warren Snyder
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Patent number: 6971004Abstract: The present invention system and method enables dynamic reconfiguration of an electronic device in a convenient and efficient manner. In one embodiment, the electronic device includes a microprocessor, a plurality of internal peripherals, an interconnecting component, an external coupling port, and a memory for storing instructions. The plurality of internal peripherals, the interconnecting component and the external coupling port are programmably configurable to perform a variety of functions. The memory stores a plurality of configuration images that define the configuration and functionality of the plurality of internal peripherals, the interconnecting component and the external coupling port. The instructions stored by the memory facilitate dynamic reconfiguration of the electronic device. Based upon the existence of a predetermined condition, the electronic device is automatically reconfigured by activating different configuration images.Type: GrantFiled: November 19, 2001Date of Patent: November 29, 2005Assignee: Cypress Semiconductor Corp.Inventors: Matthew A. Pleis, Kenneth Y. Ogami, Warren Snyder
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Patent number: 6957242Abstract: A noninterfering multiply-MAC (multiply accumulate) circuit is described. The circuit is operational to perform a MAC (multiply accumulate) operation and to perform a multiply operation without interfering with the accumulate value of the MAC operation. The circuit includes a first register, a second register, a multiplier circuit, and an accumulate circuit. The first register is addressable using either a primary first address or an alias first address. Moreover, the second register is addressable using either a primary second address or an alias second address. The multiplier circuit performs a multiply operation to generate a product value based on the data in the first and second registers after a write operation to either the first register or the second register. The accumulate circuit performs an accumulate operation to generate an accumulate value if either the alias first address or the alias second address is used in the write operation.Type: GrantFiled: August 6, 2001Date of Patent: October 18, 2005Assignee: Cypress Semiconductor Corp.Inventor: Warren Snyder
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Patent number: 6952778Abstract: A microcontroller provides protection to memory blocks in an embedded memory. A set of rules such as security levels mapped to memory blocks are stored in a nonvolatile supervisory memory. An algorithm for application of the rules is stored in a supervisory ROM. When a read or write operation is to be carried out, the rules are applied according to the algorithm in order to authorize or reject the read or write operation. Security levels can be modified, but only according to defined rules. In one embodiment, the security levels can only be increased.Type: GrantFiled: May 14, 2001Date of Patent: October 4, 2005Assignee: Cypress Semiconductor CorporationInventor: Warren Snyder
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Publication number: 20050198541Abstract: A method and a system for supplying power to a microcontroller with a single cell. One embodiment of the present invention discloses incorporation of a power supply pump circuit with the microcontroller and their dynamic interaction. The microcontroller sends its power requirements to the power supply pump circuit and in response, the power supply pump circuit controls the operating voltage with optimal efficiency. The dynamic update of power supply pump circuit results in an efficient use of the power supply pump circuit and thus results in a reduction of the number of dry cell batteries to only a single cell. Incorporation of the microcontroller and power supply pump circuit onto a single chip reduces the pin number requirements as well as the space required on the printed circuit board.Type: ApplicationFiled: May 9, 2005Publication date: September 8, 2005Inventors: Harold Kutz, Warren Snyder
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Patent number: 6910126Abstract: A method of programming a programmable analog device that introduces on a single chip a set of tailored analog blocks and elements that can be configured and reconfigured in different ways to implement a variety of different analog functions. The analog blocks can be electrically coupled to each other in different combinations to perform different analog functions. Each analog block includes analog elements that have changeable characteristics that can be specified according to the function to be performed. Configuration registers define the type of function to be performed, the way in which the analog blocks are to be coupled, the inputs and outputs of the analog blocks, and the characteristics of the analog elements. The configuration registers can be dynamically programmed. Thus, the device can be used to realize a large number of different analog functions and applications.Type: GrantFiled: August 14, 2001Date of Patent: June 21, 2005Assignee: Cypress Microsystems, Inc.Inventors: Monte Mar, Warren Snyder
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Patent number: 6892310Abstract: A method and a system for supplying power to a microcontroller with a single cell. One embodiment of the present invention discloses incorporation of a power supply pump circuit with the microcontroller and their dynamic interaction. The microcontroller sends its power requirements to the power supply pump circuit and in response, the power supply pump circuit controls the operating voltage with optimal efficiency. The dynamic update of power supply pump circuit results in an efficient use of the power supply pump circuit and thus results in a reduction of the number of dry cell batteries to only a single cell. Incorporation of the microcontroller and power supply pump circuit onto a single chip reduces the pin number requirements as well as the space required on the printed circuit board.Type: GrantFiled: August 3, 2001Date of Patent: May 10, 2005Assignee: Cypress Semiconductor CorporationInventors: Harold Kutz, Warren Snyder
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Patent number: 6892322Abstract: A method for applying instructions to a microprocessor during test mode is disclosed. In one embodiment of the present invention, first a test mode is entered, establishing the microprocessor as a slave and a test controller as a master. Then, the test controller fills an instruction queue with instructions to be executed. The instructions originate from a test interface. A memory, such as a program flash, coupled to the microprocessor is bypassed; thus, the microprocessor is forced to execute instructions from the instruction queue. In another embodiment, the test controller transfers to the instruction queue an instruction to be executed in the microprocessor. Then, the instruction causes instructions from a supervisory memory to be executed by the microprocessor. The supervisory memory comprises pre-determined test instructions.Type: GrantFiled: October 5, 2001Date of Patent: May 10, 2005Assignee: Cypress Semiconductor CorporationInventor: Warren Snyder
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Patent number: 6868500Abstract: In accordance with one embodiment of the present invention, a circuit provides power stability functions for a microcontroller, during startup and normal operations performing power on reset functions and an array of power stability functions. The power on reset functions hold the microcontroller in a safe reset condition, reinforce the POR hold, and force its switch mode pump to drive up voltage provided to its common supply source. The power stability functions constitute a power on reset function, a power supply health, e.g., power state condition monitoring function, a control function for dynamically controlling the common supply source, and auxiliary functions, which may be protective of a flash memory. The power on reset function operates at a fixed and/or programmably changeable voltage levels. In one embodiment, the POR circuit is interconnected with a processor through a bus, enabling programmatic processor control of microcontroller power through interaction with the POR circuitry.Type: GrantFiled: June 22, 2001Date of Patent: March 15, 2005Assignee: Cypress Semiconductor CorporationInventors: Harold Kutz, Warren Snyder
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Patent number: 6854067Abstract: A method and system dynamically controlling microcontroller power. In one embodiment, the method and system configures a microcontroller power state, senses its condition, and determines its suitability status, communicates that status between a POR circuit and a processor, controls certain microcontroller functions accordingly, and dynamically programs power related functions. This is enabled, in one embodiment, by dynamic interaction between the POR circuit and the processor. Microcontroller power status is ascertained, and a corresponding optimal power state determined. Optimal values for programmable independent multiples of a supply voltage is programmatically calculated and set, dynamically adjusting microcontroller power states. In one embodiment, the optimal values are communicated to a scaler in the POR circuit by the processor, and registered within a multiplexer/register matrix within the scaler.Type: GrantFiled: June 22, 2001Date of Patent: February 8, 2005Assignee: Cypress Semiconductor CorporationInventors: Harold Kutz, Warren Snyder
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Patent number: 6829190Abstract: A method for programming a memory device is disclosed. In one method embodiment, the present invention receives a measurement from a temperature sensor located near a non-volatile programmable memory device. Next, a transformation is accessed. Then, the measurement from the temperature sensor is processed in conjunction with the transformation to establish a programming time for a memory device as a function of a programming voltage and the temperature of the memory device. The programming voltage is then applied to the memory device for the length of time specified by the programming time during the programming pulse of the memory device to accurately program the device using an optimum amount of current.Type: GrantFiled: August 29, 2003Date of Patent: December 7, 2004Assignee: Cypress Semiconductor CorporationInventors: Warren Snyder, Mark Rouse
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Patent number: 6825689Abstract: A configurable input/output interface for a microcontroller. The present invention is an input/output (I/O) pin with a configurable interface to a microprocessor, and to a global mapping which selectively couples functional units on the microcontroller with the I/O pin. The I/O pin can be selectively coupled to the global mapping or to the microprocessor on each clock cycle. The mapping configuration selectively couples a different functional unit or units of the microcontroller to access the I/O pin on each clock cycle. The interface between the I/O pin and the rest of the system can be dynamically configured by software created or modified by a user, or by hardware. The present invention facilitates repositioning pin locations on a microcontroller because it is a software modification rather than a hardware modification. The present invention further enables the microcontroller functions to be configured by the user rather than by the microcontroller vendor.Type: GrantFiled: September 14, 2001Date of Patent: November 30, 2004Assignee: Cypress Semiconductor CorporationInventor: Warren Snyder
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Patent number: 6823282Abstract: A method for entering test mode of an integrated circuit device is disclosed. In one embodiment of the present invention, after a lockout period, a test controller generates a signal indicating the integrated circuit is willing to enter the test mode. After the signal, the test controller monitors a test interface during a predetermined period of time for a digital password. Then, in response to a valid password being received within the predetermined period, the test controller enters the test mode. In another embodiment, in addition to the above steps, in response to the valid password being received, the test controller generates an acknowledge signal. In one embodiment, the predetermined period of time takes place during a holdoff period after the lockout period. In another embodiment, the test interface is serial.Type: GrantFiled: October 5, 2001Date of Patent: November 23, 2004Assignee: Cypress Semiconductor CorporationInventor: Warren Snyder
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Patent number: 6798299Abstract: A crystal-less oscillator circuit with trimmable current control. In one embodiment, the present invention provides an oscillator circuit comprising a digital to analog converter circuit for generating a current, a band gap reference circuit for generating a voltage, and a relaxation oscillator circuit for creating a frequency based on the current and the voltage. In one embodiment, the digital to analog converter circuit comprises a trimmable current control. In one embodiment, the relaxation oscillator circuit is coupled to a frequency doubler circuit wherein the frequency is passed through the frequency doubler circuit for generating a second frequency. In another embodiment, the present invention provides a phase locked loop circuit comprising a phase detector circuit and the aforementioned oscillator circuit. In another embodiment, the present invention provides a microcontroller comprising a phase locked loop circuit comprising a phase detector circuit and the aforementioned oscillator circuit.Type: GrantFiled: September 19, 2001Date of Patent: September 28, 2004Assignee: Cypress Semiconductor CorporationInventors: Monte Mar, Warren Snyder
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Patent number: 6765407Abstract: A new digital configurable macro architecture is described. The digital configurable macro architecture is well suited for microcontroller or controller designs. In particular, the foundation of the digital configurable macro architecture is a programmable digital circuit block. In an embodiment, programmable digital circuit blocks are 8-bit circuit modules that can be programmed to perform any one of a variety of predetermined digital functions by changing the contents of a few registers therein, unlike a FPGA which is a generic device that can be programmed to perform any arbitrary digital function. Specifically, the circuit components of the programmable digital circuit block are designed for reuse in several of the predetermined digital functions such that to minimize the size of the programmable digital circuit block.Type: GrantFiled: October 15, 2002Date of Patent: July 20, 2004Assignee: Cypress Semiconductor CorporationInventor: Warren Snyder
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Patent number: 6753739Abstract: A circuit including an oscillator circuit, a current generator circuit and a voltage generator circuit. The oscillator circuit may be configured to generate an output signal having a frequency in response to (i) a first control signal and (ii) a second control signal. The current generator may be configured to generate said first control signal in response to a first adjustment signal. The voltage generator circuit may be configured to generate the second control signal in response to a second adjustment signal.Type: GrantFiled: December 20, 2002Date of Patent: June 22, 2004Assignee: Cypress Semiconductor Corp.Inventors: Monte F. Mar, Warren A. Snyder
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Patent number: 6724220Abstract: A microcontroller with a mixed analog/digital architecture including multiple digital programmable blocks and multiple analog programmable blocks in a communication array having a programmable interconnect structure. The single chip design is implemented by integration of programmable digital and analog circuit blocks that are able to communicate with each other. Robust analog and digital blocks that are flash memory programmable can be utilized to realize complex design applications that otherwise would require multiple chips and/or separate applications. The programmable chip architecture includes a novel array having programmable digital blocks that can communicate with programmable analog blocks using a programmable interconnect structure. The programmable analog array contains a complement of Continuous Time (CT) blocks and a complement of Switched Capacitor (SC) blocks that can communicate together.Type: GrantFiled: August 7, 2001Date of Patent: April 20, 2004Assignee: Cyress Semiconductor CorporationInventors: Warren Snyder, Monte Mar
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Patent number: 6661724Abstract: A method for programming a memory device is disclosed. In one method embodiment, the present invention receives a measurement from a temperature sensor located near a non-volatile programmable memory device. Next, a transformation is accessed. Then, the measurement from the temperature sensor is processed in conjunction with the transformation to establish a programming time for a memory device as a function of a programming voltage and the temperature of the memory device. The programming voltage is then applied to the memory device for the length of time specified by the programming time during the programming pulse of the memory device to accurately program the device using an optimum amount of current.Type: GrantFiled: June 13, 2002Date of Patent: December 9, 2003Assignee: Cypress Semiconductor CorporationInventors: Warren Snyder, Mark Rouse