Patents by Inventor Wataru Nakamura

Wataru Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10998629
    Abstract: A liquid crystal panel of a scanning antenna includes a TFT substrate provided with a first dielectric substrate, a TFT supported by the first dielectric substrate, a gate bus line, a source bus line, and a patch electrode; a slot substrate provided with a second dielectric substrate, and a slot electrode that is formed on a first main surface of the second dielectric substrate and includes a slot arranged so as to correspond to the patch electrode; and a liquid crystal layer provided between the TFT substrate and the slot substrate. One of the TFT substrate and the slot substrate includes a projecting layer formed of resin and disposed on the liquid crystal layer side of the patch electrode or the slot electrode in a region surrounded by a sealing portion. The projecting layer is arranged so as not to overlap the patch electrode or the slot.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: May 4, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tadashi Ohtake, Takatoshi Orui, Wataru Nakamura, Kiyoshi Minoura, Masanobu Mizusaki
  • Publication number: 20210111218
    Abstract: Provided are an X-ray imaging panel capable of suppressing a leak current of a photoelectric conversion layer while reducing the number of steps for manufacturing the imaging panel, and a method for manufacturing the same. An imaging panel 1 generates an image based on scintillation light obtained from X-rays passing through a subject. The imaging panel 1 is provided with a thin film transistor 13, passivation films 103 and 104 covering the thin film transistor 13, a photoelectric conversion layer 15 converting scintillation light into a charge, an upper electrode 16, and a lower electrode 14 connected to the thin film transistor 13, on a substrate 101. End portions of the lower electrode 14 are disposed on an inner side than the end portions of the photoelectric conversion layer 15. The lower electrode 14 and the thin film transistor 13 are connected to each other via a contact hole CH1 formed in the passivation films 103 and 104, in a region in which the photoelectric conversion layer 15 is provided.
    Type: Application
    Filed: March 28, 2018
    Publication date: April 15, 2021
    Inventors: Yu NAKAMURA, Kazuhide TOMIYASU, Makoto NAKAZAWA, Hiroyuki MORIWAKI, Wataru NAKAMURA, Fumiki NAKANO
  • Publication number: 20210098875
    Abstract: A liquid crystal panel of a scanning antenna includes a TFT substrate provided with a first dielectric substrate, a TFT supported by the first dielectric substrate, a gate bus line, a source bus line, and a patch electrode; a slot substrate provided with a second dielectric substrate, and a slot electrode that is formed on a first main surface of the second dielectric substrate and includes a slot arranged so as to correspond to the patch electrode; and a liquid crystal layer provided between the TFT substrate and the slot substrate. One of the TFT substrate and the slot substrate includes a projecting layer formed of resin and disposed on the liquid crystal layer side of the patch electrode or the slot electrode in a region surrounded by a sealing portion. The projecting layer is arranged so as not to overlap the patch electrode or the slot.
    Type: Application
    Filed: July 28, 2017
    Publication date: April 1, 2021
    Inventors: TADASHI OHTAKE, TAKATOSHI ORUI, WATARU NAKAMURA, KIYOSHI MINOURA, MASANOBU MIZUSAKI
  • Patent number: 10911983
    Abstract: A packet load generation device includes a memory configured to store a first packet group including a first plurality of packets, a transmission buffer configured to store a second packet group including a second plurality of packets, and a processor configured to sequentially transmit the first plurality of packets to the transmission buffer, sequentially transmit the second plurality of packets to a terminal, calculate a first time period for transmitting all the second plurality of packets included in the second packet group to the terminal, perform a comparison between the first time period with a second time period for adding a third plurality of packets to the first packet group, and perform addition of the third plurality of packets to the first packet group when it is detected that the first time period is longer than the second time period.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: February 2, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Eitatsu Yoshida, Wataru Nakamura
  • Patent number: 10861898
    Abstract: An imaging device according to an embodiment of the present invention includes a photoelectric conversion part that converts incident light into electric charge, and a detection part that detects the electric charge generated in the photoelectric conversion part. The photoelectric conversion part includes a plurality of photodiodes arranged in a matrix, and the detection part includes a plurality of thin film transistors provided corresponding to the plurality of photodiodes and arranged in a matrix. Each of the photodiodes includes a lower electrode, a semiconductor layer, and an upper electrode, and an insulating layer is provided between at least a portion of the lower electrode in the thickness direction and the semiconductor layer in the peripheral portion of the semiconductor layer. An end of the insulating layer has a tapered shape having an acute angle between the lower surface and the side surface of the insulating layer.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: December 8, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Rikiya Takita, Wataru Nakamura, Fumiki Nakano, Kazuhide Tomiyasu, Makoto Nakazawa, Hiroyuki Moriwaki
  • Publication number: 20200381822
    Abstract: A scanning antenna includes a TFT substrate including a plurality of TFTs supported by a first dielectric substrate and a plurality of patch electrodes, a slot substrate including a slot electrode supported by a second dielectric substrate, a liquid crystal layer provided between the TFT substrate and the slot substrate, and a reflective conductive plate disposed opposing the second dielectric substrate across a dielectric layer. The slot electrode includes a plurality of slots disposed corresponding to the plurality of patch electrodes, each patch electrode is connected to a drain of the corresponding TFT, the slot electrode includes Cu layers, and lower metal layers and/or an upper metal layer, and the lower metal layer and/or the upper metal layer decrease about a half or more of a tensile stress of the Cu layer.
    Type: Application
    Filed: January 11, 2018
    Publication date: December 3, 2020
    Inventors: Takatoshi ORUI, Tadashi OHTAKE, Wataru NAKAMURA, Kiyoshi MINOURA, Kenichi KITOH
  • Patent number: 10840266
    Abstract: The scanning antenna (1000) is a scanning antenna in which antenna units (U) are arranged, the scanning antenna including: a TFT substrate (101) including: a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including: a second dielectric substrate (51), and a slot electrode (55); a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65). The slot electrode includes slots (57) arranged in correspondence with the plurality of patch electrodes, and a thickness of the second dielectric substrate (51) is smaller than the thickness of the first dielectric substrate (1) at least in a region where the antenna units (U) are arranged.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: November 17, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Takatoshi Orui, Makoto Nakazawa, Wataru Nakamura, Kiyoshi Minoura, Tadashi Ohtake, Fumiki Nakano
  • Publication number: 20200279873
    Abstract: The scanning antenna (1000) is a scanning antenna in which antenna units (U) are arranged, the scanning antenna including: a TFT substrate (101) including: a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including: a second dielectric substrate (51), and a slot electrode (55); a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65). The slot electrode includes slots (57) arranged in correspondence with the plurality of patch electrodes, and a thickness of the second dielectric substrate (51) is smaller than the thickness of the first dielectric substrate (1) at least in a region where the antenna units (U) are arranged.
    Type: Application
    Filed: February 13, 2017
    Publication date: September 3, 2020
    Inventors: TAKATOSHI ORUI, MAKOTO NAKAZAWA, WATARU NAKAMURA, KIYOSHI MINOURA, TADASHI OHTAKE, FUMIKI NAKANO
  • Patent number: 10637156
    Abstract: A scanning antenna includes a TFT substrate including a first dielectric substrate, TFTs supported by the first dielectric substrate, gate bus lines, source bus lines, and patch electrodes; a slot substrate including a second dielectric substrate, and a slot electrode formed on a first main surface of the second dielectric substrate; a liquid crystal layer provided between the TFT substrate and the slot substrate; and a reflective conduction plate facing a second main surface of the second dielectric substrate—on a side opposite the first main surface with a dielectric layer therebetween. The slot electrode includes slots disposed corresponding to the patch electrodes, and each of the patch electrodes is connected to the drain of a corresponding TFT.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: April 28, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tadashi Ohtake, Kiyoshi Minoura, Makoto Nakazawa, Takatoshi Orui, Wataru Nakamura
  • Patent number: 10589444
    Abstract: A mixer has a circular housing defining a mixing area for mixing and kneading of a gypsum slurry. A rotary disc is positioned in the housing and rotated in a predetermined rotational direction. A rotary driving shaft cointegrally connected with the rotary disc and a plurality of scrapers are positioned in the mixing area. A slurry discharge port is provided on an annular wall of the housing for feeding the gypsum slurry of the mixing area onto a sheet of paper for gypsum board liner. An opening of the slurry discharge port is divided into a plurality of narrow openings, so that fluid resistance on the gypsum slurry flowing out of the mixing area is increased. An annular basal part rotates integrally with the rotary disc and an inner end portion of the scraper is fixed to the annular basal part.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: March 17, 2020
    Assignee: YOSHINO GYPSUM CO., LTD.
    Inventors: Ushio Sudo, Wataru Nakamura, Seigo Ishibashi, Hirokuni Tani
  • Publication number: 20200035745
    Abstract: An imaging device according to an embodiment of the present invention includes a photoelectric conversion part that converts incident light into electric charge, and a detection part that detects the electric charge generated in the photoelectric conversion part. The photoelectric conversion part includes a plurality of photodiodes arranged in a matrix, and the detection part includes a plurality of thin film transistors provided corresponding to the plurality of photodiodes and arranged in a matrix. Each of the photodiodes includes a lower electrode, a semiconductor layer, and an upper electrode, and an insulating layer is provided between at least a portion of the lower electrode in the thickness direction and the semiconductor layer in the peripheral portion of the semiconductor layer. An end of the insulating layer has a tapered shape having an acute angle between the lower surface and the side surface of the insulating layer.
    Type: Application
    Filed: March 15, 2018
    Publication date: January 30, 2020
    Inventors: Rikiya TAKITA, Wataru NAKAMURA, Fumiki NAKANO, Kazuhide TOMIYASU, Makoto NAKAZAWA, Hiroyuki MORIWAKI
  • Patent number: 10535843
    Abstract: A method includes steps of (a) forming a substrate layer 10 above a support substrate 8 which is transparent, and then a thin-film element above the substrate layer 10; and (b) emitting laser beams La and Lb to a face of the support substrate 8 opposite to another face of the support substrate to which the substrate layer 10 and the thin-film element are formed, and delaminating the substrate layer 10 and the thin-film element from the support substrate 8. In step (b), the laser beams La and Lb are emitted from different directions.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: January 14, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tetsunori Tanaka, Wataru Nakamura, Shoji Okazaki, Masaki Fujiwara
  • Publication number: 20200003702
    Abstract: A nondestructive inspection apparatus includes an X-ray source, an imaging panel that detects an X-ray, and a shielding plate that shields the X-ray, and the imaging panel and the shielding plate have flexibility that allows to be curved.
    Type: Application
    Filed: June 27, 2019
    Publication date: January 2, 2020
    Inventors: HIROAKI MIYOSHI, KAZUHIDE TOMIYASU, WATARU NAKAMURA, TAKESHI FUJIWARA
  • Patent number: 10504888
    Abstract: Provided is a technique of image pickup without being affected by leakage current on an active matrix substrate that includes photoelectric conversion elements. An active matrix substrate 1 includes photoelectric conversion elements that are respectively provided with respect to a plurality of pixels defined by gate lines and data lines 10, and a bias line 13 supplying a bias voltage to each photoelectric conversion element. Further, the active matrix substrate 1 further includes a plurality of data protection circuit units 16a that are connected with the data lines 10, respectively, and a first common line 17a that is connected with the data protection circuits 16a and has a potential equal to or lower than those of the data lines 10, outside the image pickup area composed of a plurality of pixels.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: December 10, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Hiroyuki Moriwaki, Akinori Kubota, Fumiki Nakano, Wataru Nakamura
  • Patent number: 10498019
    Abstract: A scanning antenna (1000) in which a plurality of antenna units (U) are arranged, the scanning antenna including: a TFT substrate (101) including a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including a second dielectric substrate (51) and a slot electrode (55) formed on a first main surface of the second dielectric substrate; a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65) disposed opposing via a dielectric layer (54) a second main surface opposite to the first main surface of the second dielectric substrate, (51) wherein the slot electrode includes slots disposed corresponding to the respective patch electrodes, and a heater part (68) is further provided on the outside of the TFT substrate (101) or on the outside of the slot substrate (201).
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: December 3, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tadashi Ohtake, Kiyoshi Minoura, Makoto Nakazawa, Takatoshi Orui, Wataru Nakamura, Fumiki Nakano
  • Patent number: 10467079
    Abstract: An information processing device including a memory, and a processor coupled to the memory and the processor configured to execute a process, the process including generating data indicating a relationship between a processing load and a communication load of a first computer which executes a specified process in a second information processing system which is the same as or similar to a first information processing system in which a failure occurs, and calculating a processing load of a second computer which executes the specified process in the first information processing system based on the generated data and a communication load of the second computer, the estimated processing load being a processing load before the failure occurs in the first information processing system.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: November 5, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Wataru Nakamura, Yuta Ohura
  • Patent number: 10355242
    Abstract: In an organic EL display device (electroluminescent device) including an organic EL element (electroluminescent element), a first sealing film covers the organic El element, a second sealing film is formed on the first sealing film, and a third sealing film covers the first sealing film and the second sealing film.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: July 16, 2019
    Inventors: Tetsuya Okamoto, Takeshi Hirase, Tohru Senoo, Tohru Sonoda, Wataru Nakamura
  • Publication number: 20190190162
    Abstract: Disclosed is a liquid crystal panel of a scanning antenna including a transmission and/or reception region in which a plurality of antenna units are arrayed, and a non-transmission and/or reception region, the liquid crystal panel including: a TFT substrate provided with a first dielectric substrate, a TFT supported by the first dielectric substrate, a gate bus line, a source bus line, and a patch electrode; a slot substrate provided with a second dielectric substrate, and a slot electrode formed on a first main surface of the second dielectric substrate and including a slot arranged so as to correspond to the patch electrode; a liquid crystal layer provided between the TFT substrate and the slot substrate and including a plurality of liquid crystal regions; and a plurality of sealing portions that respectively surround the plurality of liquid crystal regions and bond the TFT substrate and the slot substrate together.
    Type: Application
    Filed: August 3, 2017
    Publication date: June 20, 2019
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: TADASHI OHTAKE, TAKATOSHI ORUI, WATARU NAKAMURA, KIYOSHI MINOURA, MASANOBU MIZUSAKI
  • Publication number: 20190182708
    Abstract: A packet load generation device includes a memory configured to store a first packet group including a first plurality of packets, a transmission buffer configured to store a second packet group including a second plurality of packets, and a processor configured to sequentially transmit the first plurality of packets to the transmission buffer, sequentially transmit the second plurality of packets to a terminal, calculate a first time period for transmitting all the second plurality of packets included in the second packet group to the terminal, perform a comparison between the first time period with a second time period for adding a third plurality of packets to the first packet group, and perform addition of the third plurality of packets to the first packet group when it is detected that the first time period is longer than the second time period.
    Type: Application
    Filed: December 6, 2018
    Publication date: June 13, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Eitatsu Yoshida, Wataru Nakamura
  • Publication number: 20190148838
    Abstract: A scanning antenna includes a TFT substrate including a first dielectric substrate, TFTs supported by the first dielectric substrate, gate bus lines, source bus lines, and patch electrodes; a slot substrate including a second dielectric substrate, and a slot electrode formed on a first main surface of the second dielectric substrate; a liquid crystal layer provided between the TFT substrate and the slot substrate; and a reflective conduction plate facing a second main surface of the second dielectric substrate—on a side opposite the first main surface with a dielectric layer therebetween. The slot electrode includes slots disposed corresponding to the patch electrodes, and each of the patch electrodes is connected to the drain of a corresponding TFT.
    Type: Application
    Filed: May 19, 2017
    Publication date: May 16, 2019
    Applicants: SHARP KABUSHIKI KAISHA, SHARP KABUSHIKI KAISHA
    Inventors: TADASHI OHTAKE, KIYOSHI MINOURA, MAKOTO NAKAZAWA, TAKATOSHI ORUI, WATARU NAKAMURA