Abstract: A method of generating a graphical user interface for horse race betting includes displaying a first list of horses scheduled to run a first race from among a plurality of horses, displaying, in association with each horse of the first list of horses, a win selection element by which a user of the graphical user interface may mark the horse as selected to win the first race, displaying an automatic ticket generation button by which a user may request an automatic selection of horses, and, in response to a user interaction with the automatic ticket generation button, marking one or more horses of the first list of horses as selected to win the first race based on predicted win percentages of the horses of the first list. The method may include displaying, in association with each horse of the first list of horses, the predicted win percentage of the horse.

Abstract: A baseband system includes: an estimation and compensation circuit estimating frequency-independent non-ideal effects based on an original IQ signal pair, and compensating the original IQ signal pair based on a result of the estimation to obtain a compensated IQ signal pair; a channel estimation and equalization circuit performing channel estimation and equalization based on the compensated IQ signal pair to obtain an equalized IQ signal pair; and a tracking and compensation circuit obtaining a result of tracking of residual quantities of the aforesaid non-ideal effects based on the equalized IQ signal pair, and compensating the equalized IQ signal pair based on the result of the tracking to obtain an output IQ signal pair.

Abstract: A communication system includes a baseband circuit, a transmitting end circuit, and a receiving end circuit is disclosed. The transmitting end circuit includes a digital analog conversion circuit and a transmitting end filtering circuit. The receiving end circuit includes a receiving end amplifying circuit, a receiving end filtering circuit, and an analog digital conversion circuit. A first data signal is transmitted to the analog digital conversion circuit through the digital analog conversion circuit and the transmitting end filtering circuit, so that the baseband circuit obtains a first compensation parameter. A second data signal is transmitted to the receiving end filtering circuit, the receiving end amplifying circuit and the analog digital conversion circuit through the digital analog conversion circuit and the transmitting end filtering circuit, so that the baseband circuit obtains a second compensation parameter.

Abstract: A method of generating a graphical user interface for horse race betting includes displaying a first list of horses scheduled to run a first race from among a plurality of horses, displaying, in association with each horse of the first list of horses, a win selection element by which a user of the graphical user interface may mark the horse as selected to win the first race, displaying an automatic ticket generation button by which a user may request an automatic selection of horses, and, in response to a user interaction with the automatic ticket generation button, marking one or more horses of the first list of horses as selected to win the first race based on predicted win percentages of the horses of the first list. The method may include displaying, in association with each horse of the first list of horses, the predicted win percentage of the horse.

Abstract: A communication system includes a baseband circuit, a transmitting end circuit, and a receiving end circuit is disclosed. The transmitting end circuit includes a digital analog conversion circuit and a transmitting end filtering circuit. The receiving end circuit includes a receiving end amplifying circuit, a receiving end filtering circuit, and an analog digital conversion circuit. A first data signal is transmitted to the analog digital conversion circuit through the digital analog conversion circuit and the transmitting end filtering circuit, so that the baseband circuit obtains a first compensation parameter. A second data signal is transmitted to the receiving end filtering circuit, the receiving end amplifying circuit and the analog digital conversion circuit through the digital analog conversion circuit and the transmitting end filtering circuit, so that the baseband circuit obtains a second compensation parameter.

Abstract: A baseband system includes: an estimation and compensation circuit estimating frequency-independent non-ideal effects based on an original IQ signal pair, and compensating the original IQ signal pair based on a result of the estimation to obtain a compensated IQ signal pair; a channel estimation and equalization circuit performing channel estimation and equalization based on the compensated IQ signal pair to obtain an equalized IQ signal pair; and a tracking and compensation circuit obtaining a result of tracking of residual quantities of the aforesaid non-ideal effects based on the equalized IQ signal pair, and compensating the equalized IQ signal pair based on the result of the tracking to obtain an output IQ signal pair.

Abstract: A light emitting chip and associated package structure are provided. The light emitting chip includes a substrate, a first type layer, an active layer, a second type layer, a first type electrode and a second type electrode. A second portion of the first type layer is located over the substrate. A first portion of the first type layer is located over the second portion of the first type layer. The active layer is located over the first portion of the first type layer. The second type layer is located over the active layer. The first type electrode is contacted with a top surface and a sidewall of the second portion of the first type layer and contacted with a portion of a sidewall of the substrate. The second type electrode is contacted with the second type layer.

Abstract: A method of fabricating a memory device includes forming an oxide layer on a semiconductor substrate, and forming an isolation structure in the semiconductor substrate and the oxide layer to define an active area. The method also includes forming a word line and a bit line in the semiconductor substrate, wherein the bit line is above the word line. The method further includes removing the oxide layer to form a recess between the isolation structure and the bit line, and forming a storage node contact in the recess. In addition, from a top view, the storage node contact of the memory device overlaps a corresponding portion of the active area.

Abstract: A method of manufacturing a DRAM includes isolation structures and word line sets are formed in the substrate. A conductive material is formed on the substrate. Conductive material is removed to form first openings in the conductive material. The first openings expose surfaces of the substrate in the first areas and divide the conductive material into conductive layers, thereby the conductive layers are located on surfaces of the substrate in the second areas. A first dielectric material is filled in the first openings so as to form first dielectric layers on the substrate in the first areas. Top surfaces of the conductive layers are lower than top surfaces of the first dielectric layers. Second dielectric layers are formed respectively in the conductive layers. Capacitors are formed respectively on the conductive posts.

Abstract: A method of fabricating a memory device includes firming an oxide layer on a semiconductor substrate, and forming an isolation structure in the semiconductor substrate and the oxide layer to define an active area. The method also includes forming a word line and a bit line in the semiconductor substrate, wherein the bit line is above the word line. The method further includes removing the oxide layer to form a recess between the isolation structure and the bit line, and forming a storage node contact in the recess. In addition, from a top view, the storage node contact of the memory device overlaps a corresponding portion of the active area.

Abstract: Provided is a bipolar electrode probe, which includes a conductive needle, an insulation layer, a conductive sleeve, and an insulation sleeve. The conductive needle has a longitudinal direction and a transverse direction perpendicular to the longitudinal direction. The insulation layer covers the conductive needle and has a first opening. The conductive sleeve covers the insulation layer and has a second opening. The insulation sleeve covers the conductive sleeve. When the bipolar electrode probe is turned on, a longitudinal electric field is formed from a front end of the conductive needle to the conductive sleeve along the longitudinal direction. A transverse electric field is formed from the conductive needle to the conductive sleeve via the first opening and the second opening along the transverse direction.

Abstract: A semiconductor device and a method for manufacturing the same are provided. The method includes forming a plurality of bit line structures on a semiconductor substrate, wherein there is a plurality of trenches between the bit line structures. The method also includes forming a first oxide layer conformally covering the bit line structures and the trenches, and forming a photoresist material layer in the trenches and on the first oxide layer, wherein the photoresist material layer has an etch selectivity that is higher than that of the first oxide layer. The method further includes removing the photoresist material layer to form a plurality of capacitor contact holes between the bit line structures, and forming a capacitor contact in the capacitor contact holes.

Abstract: A notch circuit and a power amplifier module capable of reducing self-interference in a transceiver are provided. The transceiver includes a transmitter and a receiver, and the transmitter causes self-interference to the receiver. The transmitter includes a power amplifier module and the power amplifier module includes a notch circuit and a power amplifier. The notch circuit includes an inductor and a capacitor. The power amplifier amplifies an input transmission signal to generate an output transmission signal. The inductor receives a supply voltage. An amplitude of the supply voltage varies with the first input transmission signal. The capacitor is electrically connected to the inductor. The first output transmission signal (Tx_out1) is attenuated when a modulated frequency of the supply voltage is corresponding to a stopband.

Abstract: A semiconductor chip includes a substrate and a transistor. The transistor is formed on the substrate and includes an insulation layer and a fin. The fin includes a base portion and a protrusion connected with the base portion, wherein the protrusion is projected with respect to an upper surface of the base portion and has a recess recessed with respect to the upper surface.

Abstract: In another aspect, a server chassis is configured to mount to a server rack. The server chassis includes a first housing that includes a first sidewall, where the first housing is configured to mount to the server rack and house a first electronic component, and a second housing that includes a second sidewall, the second housing configured to mount to the server rack and house a second electronic component. The first housing includes a first bracket mounted to the first sidewall of the first housing, and the second housing includes a second bracket mounted to the second sidewall of the second housing. The second bracket of the second housing is engagable to the first bracket of the first housing to secure the first housing and the second housing to each other.

Abstract: A method of making optically pure preparations of chiral ?PNA (gamma peptide nucleic acid) monomers is provided. Nano structures comprising chiral ?PNA structures also are provided. Methods of amplifying and detecting specific nucleic acids, including in situ methods are provided as well as compositions and kits useful in those methods. Lastly, methods of converting nucleobase sequences from right-handed helical PNA, nucleic acid and nucleic acid analog structures to left-handed ?PNA, and vice-versa, are provided.

Abstract: A lens assembly for display includes a display, a lens assembly, and a prism assembly. The display emits a first light beam. The prism assembly includes a first, second prisms, and an optical multilayer film, wherein the first prism includes a first, second, and third surfaces; the second prism includes a fourth, fifth, sixth, seventh, and eighth surfaces; and the optical multilayer film is disposed between the third and fifth surfaces. A second light beam enters the first prism through the first surface and exits by the second surface. The first light beam exits the lens assembly and enters the second prism through the eighth surface, and exits the first prism by the second surface. The lens assembly and the prism assembly satisfy: 0.80%?E1/E0?0.95%; wherein E0 is an energy of the first light beam emitted from the display and E1 is an energy of the first light beam passes through the lens assembly.

Abstract: Described herein are genetic recognition reagents comprising terminal aromatic moieties that bind specifically to a template nucleic acid and concatenate. Also provided are methods of using the genetic recognition reagents, e.g., to treat or diagnose a repeat expansion disorder, such as DMI.

Abstract: A semiconductor device and a method for manufacturing the same are provided. The method includes forming a plurality of bit line structures on a semiconductor substrate, wherein there is a plurality of trenches between the bit line structures. The method also includes forming a first oxide layer conformally covering the bit line structures and the trenches, and forming a photoresist material layer in the trenches and on the first oxide layer, wherein the photoresist material layer has an etch selectivity that is higher than that of the first oxide layer. The method further includes removing the photoresist material layer to form a plurality of capacitor contact holes between the bit line structures, and forming a capacitor contact in the capacitor contact holes.