Abstract: A thin film transistor disposed on a substrate is provided. The thin film transistor includes a gate, a gate insulating layer, a silicon-rich channel layer, a source, and a drain. The gate is disposed on the substrate. The gate insulator is disposed over the gate. The silicon-rich channel layer is disposed above the gate, wherein the material of the silicon-rich channel layer is selected from a group consisting of silicon-rich silicon oxide (Si-rich SiOx), silicon-rich silicon nitride (Si-rich SiNx), silicon-rich silicon oxynitride (Si-rich SiOxNy), silicon-rich silicon carbide (Si-rich SiC) and silicon-rich silicon oxycarbide (Si-rich SiOC). The content (concentration) of silicon of the silicon-rich channel layer within a film depth between 10 nm to 170 nm ranges from about 1E23 atoms/cm3 to about 4E23 atoms/cm3. The source and the drain are connected with the silicon-rich channel layer.

Abstract: A touch panel includes an insulating base, a plurality of first sensing electrodes, a plurality of second sensing electrodes and a plurality of third sensing electrodes. The insulating base has a first surface and a second surface. The first sensing electrodes and the second sensing electrodes are disposed on the first surface of the insulating base, and electrically isolated from each other. The third sensing electrodes are disposed on the second surface of the insulating base, and each third sensing electrode at least partially overlaps a portion of the first sensing electrodes and a portion of the second sensing electrodes.

Abstract: A method is used to make an aluminum alloy with excellent tensile strength, low density and excellent radiation. The method includes the steps of providing a base material, adding 0.06 wt % to 0.30 wt % of zirconium and 0.06 wt % to 0.30 wt % of vanadium to the base material, and melting the basic material with the zirconium and vanadium to provide an aluminum alloy. The base material includes 92.55 wt % to 97.38 wt % of aluminum, 0.9 wt % to 1.8 wt % of silicon, less than 0.5 wt % of iron, 0.6 wt % to 1.2 wt % of copper, 0.4 wt % to 1.1 wt % of manganese, 0.6 wt % to 1.4 wt % of magnesium, less than 0.40 wt % of chromium, less than 0.25 wt % of zinc and less than 0.20 wt % of titanium.

Abstract: A pixel array including a pixel electrode and an active device is provided. The active device includes a gate, a channel layer, a source, a drain, a connection electrode, a first branch portion and a second branch portion. The gate is electrically connected with a scan line. The channel layer located at a side of the gate is electrically isolated from the gate. The source, the drain and the connection electrode are disposed on a part region of the channel layer. The first branch portion disposed on a part region of the channel layer is connected with an end of the connection electrode. The first branch portion surrounds the source located on the channel layer. The second branch portion disposed on a part region of the channel layer is connected with the other end of the connection electrode. The second branch portion surrounds the drain located on the channel layer.

Abstract: An active device array substrate includes a flexible substrate, a gate electrode, a dielectric layer, a channel layer, a source electrode, a drain electrode, and a pixel electrode. The flexible substrate has at least one transistor region and at least one transparent region adjacent to each other. The gate electrode is disposed on the transistor region of the flexible substrate. The dielectric layer covers the flexible substrate and the gate electrode. A portion of the dielectric layer disposed on the gate electrode has a first thickness. Another portion of the dielectric layer disposed on the transparent region of the flexible substrate has a second thickness. The second thickness is less than the first thickness. The channel layer is disposed above the gate electrode. The source electrode and the drain electrode are disposed on opposite sides of the channel layer and are electrically connected to the channel layer.

Abstract: A pixel array including scan lines, data lines and pixels is provided. The data lines and the scan lines are intersected so as to define sub-pixel regions arranged in array. Each pixel is disposed in a pixel region including (m×n) sub-pixel regions, wherein m is a positive integral and n is a positive integral larger than one. Each pixel includes a plurality of sub-pixels, wherein each sub-pixel includes an active device, a pixel electrode and a storage capacitor. At least a portion of the storage capacitors of the sub-pixels within the same pixel is concentrically disposed in one of the sub-pixel regions.

Abstract: A thin film transistor disposed on a substrate is provided. The thin film transistor includes a gate, a gate insulating layer, a silicon-rich channel layer, a source, and a drain. The gate is disposed on the substrate. The gate insulator is disposed over the gate. The silicon-rich channel layer is disposed above the gate, wherein the material of the silicon-rich channel layer is selected from a group consisting of silicon-rich silicon oxide (Si-rich SiOx), silicon-rich silicon nitride (Si-rich SiNx), silicon-rich silicon oxynitride (Si-rich SiOxNy), silicon-rich silicon carbide (Si-rich SiC) and silicon-rich silicon oxycarbide (Si-rich SiOC). The content (concentration) of silicon of the silicon-rich channel layer within a film depth between 10 nm to 170 nm ranges from about 1E23 atoms/cm3 to about 4E23 atoms/cm3. The source and the drain are connected with the silicon-rich channel layer.

Abstract: A dynamic random access memory applied to an embedded display port includes a memory core unit, a peripheral circuit unit, and an input/output unit. The memory core unit is used for operating in a first predetermined voltage. The peripheral circuit unit is electrically connected to the memory core unit for operating in a second predetermined voltage, where the second predetermined voltage is lower than 1.1V. The input/output unit is electrically connected to the memory core unit and the peripheral circuit unit for operating in a third predetermined voltage, where the third predetermined voltage is lower than 1.1V.

Abstract: A thin film transistor disposed on a substrate is provided. The thin film transistor includes a gate, a gate insulating layer, a silicon-rich channel layer, a source, and a drain. The gate is disposed on the substrate. The gate insulator is disposed over the gate. The silicon-rich channel layer is disposed above the gate, wherein the material of the silicon-rich channel layer is selected from a group consisting of silicon-rich silicon oxide (Si-rich SiOx), silicon-rich silicon nitride (Si-rich SiNx), silicon-rich silicon oxynitride (Si-rich SiOxNy), silicon-rich silicon carbide (Si-rich SiC) and silicon-rich silicon oxycarbide (Si-rich SiOC). The content (concentration) of silicon of the silicon-rich channel layer within a film depth between 10 nm to 170 nm ranges from about 1E23 atoms/cm3 to about 4E23 atoms/cm3. The source and the drain are connected with the silicon-rich channel layer.

Abstract: An electrophoretic display with threshold voltage drift compensation functionality includes a gate driving circuit, a data driving circuit, a controller and a pixel array. The gate driving circuit provides plural gate signals according to a scan control signal. The data driving circuit provides plural data signals according to a data control signal. The controller is employed to provide the scan control signal and the data control signal. The pixel array is utilized for displaying images according to the gate signals and the data signals. Each of the gate signals includes a writing enable pulse for enabling write operations of the data signals during a writing period. And during a compensation period, each of the gate signals includes a compensation pulse for performing threshold voltage drift compensation operations on the data switches of the pixel array, and the data signals are set to hold a common voltage.

Abstract: A method is used to make an aluminum alloy with excellent tensile strength, low density and excellent radiation. The method includes the steps of providing a base material, adding 0.06 wt % to 0.30 wt % of zirconium and 0.06 wt % to 0.30 wt % of vanadium to the base material, and melting the basic material with the zirconium and vanadium to provide an aluminum alloy. The base material includes 92.55 wt % to 97.38 wt % of aluminum, 0.9 wt % to 1.8 wt % of silicon, less than 0.5 wt % of iron, 0.6 wt % to 1.2 wt % of copper, 0.4 wt % to 1.1 wt % of manganese, 0.6 wt % to 1.4 wt % of magnesium, less than 0.40 wt % of chromium, less than 0.25 wt % of zinc and less than 0.20 wt % of titanium.

Abstract: A display panel having a pixel region and a sensing region includes a first substrate, a second substrate and a display medium layer. A plurality of pixel structures and at least one photo-voltaic cell device are disposed on the first substrate. The pixel structures are arranged in the pixel region in array, and each of the pixel structures includes a thin film transistor and a pixel electrode electrically connected to the thin film transistor. The photo-voltaic cell device disposed in the sensing region includes a doped semiconductor layer, a transparent electrode layer, a first type doped silicon-rich dielectric layer and a second type doped silicon-rich dielectric layer. The first type doped silicon-rich dielectric layer and the second type doped silicon-rich dielectric layer are disposed between the doped semiconductor layer and the transparent electrode layer. The display medium layer is disposed between the first substrate and the second substrate.

Abstract: A manufacturing method of a color filter touch sensing substrate is provided. Firstly, a first film is formed on a substrate. The first film includes a plurality of first and second touch sensors and a plurality of first bridge lines for electrically connecting the first touch sensors in the same column. Then, a second film is formed on the substrate. The second film includes a plurality of second bridge lines for electrically connecting the second touch sensors in the same row. Next, a light shielding pattern layer is formed between the first and the second films. The light shielding pattern layer is used to define a plurality of sub-pixel regions on the substrate. Afterward, a plurality of color filter pattern layers is formed in the sub-pixel regions. Furthermore, a color filter touch sensing substrate, a display panel and manufacturing methods thereof are also provided.

Abstract: A capacitive touch display panel includes a display panel, a touch sensing unit, and a plurality of floating gate type ESD protection devices. The touch sensing unit includes a plurality of first sensing pads and second sensing pads. Each floating gate type ESD protection device is disposed between two adjacent first sensing pads and between two adjacent second sensing pads. The two adjacent first sensing pads are electrically disconnected from each other, and the two adjacent second sensing pads are electrically disconnected from each other.

Abstract: A touch display panel including a first substrate, a second substrate, a light shielding pattern layer, a touch sensing layer and a display medium is provided. The light shielding pattern layer is disposed on the first substrate or the second substrate. Pixel units are defined by the light shielding pattern layer, each pixel unit has a pixel edge length, and each pixel unit is disposed corresponding to one of the pixel structures. The touch sensing layer is disposed on the second substrate and has a plurality of first touch series and a plurality of second touch series. Each first touch series and each touch series respectively have mesh touch pads serially connected to each other. Each mesh touch pad has a plurality of grid patterns, each grid pattern has a grid edge length, and the grid edge length is ?˜? of the pixel edge length.

Abstract: This invention in one aspect relates to a pixel structure. In one embodiment, the pixel structure includes a scan line formed on a substrate and a data line formed over the substrate defining a pixel area, a switch formed inside the pixel area on the substrate, a shielding electrode formed over the switch, a plane organic layer formed over the date line and the pixel area and having no overlapping with the shielding electrode, and a pixel electrode having a first portion and a second portion extending from the first portion, and formed over the shielding electrode and the plane organic layer in the pixel area, wherein the first portion is overlapped with the shielding electrode so as to define a storage capacitor therebetween, and the second portion overlays the plane organic layer and has no overlapping with the data line.

Abstract: A touch-sensing display panel including an active device array substrate, a touch-sensing substrate and a display medium is provided. The touch-sensing substrate includes a first substrate, first touch-sensing electrodes, second touch-sensing electrodes, a dielectric layer and a black matrix. The first touch-sensing electrodes are parallel with each other and disposed on the first substrate. Each of the first touch-sensing electrodes has a plurality of first openings, respectively. Each of the second touch-sensing electrodes has a plurality of second openings, respectively. The second touch-sensing electrodes are intersected with the first touch-sensing electrodes. The black matrix is disposed between the first touch-sensing electrodes and the first substrate and is disposed between the second touch-sensing electrodes and the first substrate, wherein the black matrix has a plurality of pixel openings arranged in array.

Abstract: The present invention relates to a method of enantioselective addition to imines, including: reacting R3CH?NY with R4ZnR5 in the presence of a compound represented by the following formula (I), in which Y, R1, R2, R3, R4 and R5 are defined the same as the specification. Accordingly, the present invention can prepare secondary amines in high yields and enantiomeric excess by the above-mentioned method.

Abstract: A color filter substrate including a substrate, a plurality of patterned color filter layers, and a plurality of sensing serials is provided. The substrate has a first surface and a second surface opposite to the first surface. The substrate includes a plurality of display regions arranged in array and a separated region located between the display regions. The patterned color filter layers are arranged in array on the first surface and corresponding to the display regions. The sensing serials are arranged on the second surface and insulated from each other. Each sensing serial includes a plurality of sensing pads; a plurality of bridging lines, each connected with two adjacent sensing pads; a plurality of patterned conductive layers stacked and electrically connected with the sensing pads. The position of the patterned conductive layers is corresponding to the separated region. A touch-sensing liquid crystal display and a touch-sensing substrate are also provided.

Abstract: In one aspect of this invention, a pixel structure includes a scan line formed on a substrate and a data line formed over the substrate defining a pixel area, a switch formed inside the pixel area on the substrate, a shielding electrode having a first portion and a second portion extending from the first portion, and formed over the scan line, the data line and the switch, where the first portion is overlapped with the switch and the second portion is overlapped with the data line, and a pixel electrode having a first portion and a second portion extending from the first portion, and formed over the shielding electrode in the pixel area, where the first portion is overlapped with the first portion of the shielding electrode so as to define a storage capacitor therebetween and the second portion has no overlapping with the second portion of the shielding electrode.