Abstract: A display panel, a gate drive circuit and a driving method thereof. The gate drive circuit includes drive units. A first cascaded input end OUT(n?1) of a first shift register (100) of each of the drive units is connected to a different start signal end STV; a plurality of drive units in the drive units include a reset control sub-circuit (9), where the reset control sub-circuit (9) is connected with a second cascaded input end OUT(n+1) of a last shift register (100) and one or more start signal ends STV, and is configured to control an electric potential of the second cascaded input end OUT(n?1) according to an electric potential of the one or more start signal ends STV.

Abstract: Disclosed is a crack detection apparatus for detecting a building structure, belonging to the technical field of building detection and including a main shaft collar, an auxiliary shaft collar, a rotating drum, a bracket assembly, a crawling mechanism and a transmission assembly, where the main shaft collar is rotationally connected with the auxiliary shaft collar, main slewing arms and auxiliary slewing arms that are in X-shaped crossing are arranged on the main shaft collar and the auxiliary shaft collar, the rotating drum swinging back and forth is rotationally assembled on the main shaft collar, a tail end of the rotating drum is provided with a cleaning arm, the crawling mechanism is assembled at tail ends of the main slewing arms and the auxiliary slewing arms and connected with the rotating drum through the transmission assembly.

Abstract: A micro light emitting device includes an epitaxial structure, a conductive layer, and a first insulating layer. The epitaxial structure has a first surface and a second surface opposite to the first surface, and includes a first semiconductor layer, an active layer and a second semiconductor layer that are arranged in such order in a direction from the first surface to the second surface. The conductive layer is formed on a surface of the first semiconductor layer away from the active layer. The first insulating layer is formed on the surface of the first semiconductor layer away from the active layer, and exposes at least a part of the conductive layer.

Abstract: A semiconductor device includes a first transistor and a second transistor. The first transistor is of a first type in a first layer and includes a gate extending in a first direction and a first active region extending in a second direction perpendicular to the first direction. The second transistor is of a second type arranged in a second layer over the first layer and includes the gate and a second active region extending in the second direction. The semiconductor device further includes a first conductive line in a third layer between the first and second layers. The first conductive line electrically connects a first source/drain region of the first active region to a second source/drain region of the second active region. The gate comprises an intermediate portion disposed between the first active region and the second active region, wherein the first conductive line crosses the gate at the intermediate portion.

Abstract: The present invention is related to a novel positive electrode active material for lithium-ion battery. The positive electrode active material is expressed by the following formula: Li1.2NixMn0.8-x-yZnyO2, wherein x and y satisfy 0<x?0.8 and 0<y?0.1. In addition, the present invention provides a method of manufacturing the positive electrode active material. The present invention further provides a lithium-ion battery which uses said positive electrode active material.

Abstract: A method of machine learning algorithm selection may include obtaining a dataset that includes multiple data entries. In some embodiments, each of the data entries may include multiple features and one of the multiple features may be designated as a target variable. The method may further include selecting a subset of the data entries. In some embodiments, selecting the subset of the data entries may include binning the data entries into multiple data bins based on values in the target variable and selecting a subset of the binned data entries from each of the multiple data bins as the subset of the data entries. The method may further include constructing multiple machine learning models using the subset of the data entries and selecting one of the multiple machine learning models based on an evaluation of the multiple machine learning models.

Abstract: An IC structure includes a transistor, a source/drain contact, a metal oxide layer, a non-metal oxide layer, a barrier structure, and a via. The transistor includes a gate structure and source/drain regions on opposite sides of the gate structure. The source/drain contact is over one of the source/drain regions. The metal oxide layer is over the source/drain contact. The non-metal oxide layer is over the metal oxide layer. The barrier structure is over the source/drain contact. The barrier structure forms a first interface with the metal oxide layer and a second interface with the non-metal oxide layer, and the second interface is laterally offset from the first interface. The via extends through the non-metal oxide layer to the barrier structure.

Abstract: Disclosed are a special tooling and method for electron beam welding of a cavity body and a beam tube of a superconducting niobium cavity. The special tooling includes a first clamping device for fixing a flange and a second clamping device for fixing a semi-cavity body, wherein the first clamping device and the second clamping device are fixedly connected. A pressing ring of the first clamping device is disposed around a beam tube of a superconducting niobium cavity and cooperates with a base plate to clamp and fix the flange. The second clamping device includes clamping arms evenly distributed along a circumference of the semi-cavity body, and each clamping arm includes a second pressing plate axially disposed along the beam tube and a pressing block that is disposed on an end portion of the second pressing plate and fixes an edge of the semi-cavity body.

Abstract: A plasma-facing component of a fusion reactor divertor, including an inner target transition support and a dome transition support which are integrated into an inner target-dome transition support. The inner target-dome transition support and an outer horizontal target transition support are each prepared from two materials. The channel connection inside the inner target-dome transition support and the outer horizontal target transition support is realized through an S-shaped flow channel and a collector box. In V-shaped regions of inner and outer targets, a plasma-facing unit is connected to the collector box in the transition support via a bending tube, and is communicated with a coolant flowing through horizontal and vertical targets through an intermediate flow channel in the transition block. A method of preparing the plasma-facing component is further provided.

Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.

Abstract: An integrated circuit includes conductive rails that are disposed in a first conductive layer and separated from each other in a layout view, signal rails disposed in a second conductive layer different from the first conductive layer, at least one first via coupling a first signal rail of the signal rails to at least one of the conductive rails, and at least one first conductive segment. The first signal rail transmits a supply signal through the at least one first via and the at least one of the conductive rails to at least one element of the integrated circuit. The at least one first via and the at least one first conductive segment are disposed above first conductive layer. The at least one first conductive segment is coupled to the at least one of the conductive rails and is separate from the first signal rail.

Abstract: The present invention relates to a macro plastic and micro plastic detection method based on RGB and hyperspectral image fusion, which includes the following steps: obtaining macro plastics and micro plastics; mixing with solid wastes to obtain a solid-phase substrate; pretreating the obtained solid-phase substrate to obtain a material; drying to remove part of moisture and coating on a quartz window sheet, drying until the moisture is completely removed, and flattening by using another quartz window sheet to obtain a material to be detected; obtaining an RGB image and a hyperspectral image of the material to be detected respectively by using a high-resolution color image scanner and a hyperspectral camera; fusing the obtained RGB image and hyperspectral image; and automatically classifying and identifying the macro plastics and the micro plastics by using a supervised classification model.

Abstract: The present disclosure provides a micro light-emitting element, method for manufacturing a micro light-emitting element, and a light-emitting device. The micro light-emitting element includes a DBR structure layer, including a DBR adhesive layer, a DBR reflective layer, and a DBR sacrificial layer, where the DBR adhesive layer, the DBR reflective layer, and the DBR sacrificial layer are sequentially stacked. Subsequent structural coverage of a DBR reflective layer is improved by means of the DBR adhesion layer. Density of film layers of the DBR sacrificial layer, the DBR reflective layer, and the DBR adhesive layer are sequentially increased, so that etching rates of the DBR sacrificial layer, the DBR reflective layer, and the DBR adhesive layer are sequentially decreased during etching, thereby forming an inverted trapezoidal through hole which comprises an inclined side wall by an etching process.

Abstract: The present disclosure relates to an injectable lurasidone suspension and a preparation method thereof, and in particular to an irregular form of a lurasidone solid and a pharmaceutical composition thereof. The present disclosure also relates to a preparation method for the solid and the pharmaceutical composition thereof, and an application thereof in the treatment of mental diseases. According to the present disclosure, the lurasidone solid prepared has controllable particle size and has Dv5O particle size of 6 ?m to 110 ?m. The good particle size stability can also he maintained in the pharmaceutical composition. The lurasidone suspension preparation obtained by the method is fast-acting, has a long sustained release period, and can effectively reduce the risk caused by poor patient compliance.

Abstract: The present invention provides, among other things, devices, kits, apparatus, and methods for rapid homogenous cell staining and imaging. Particularly, in some embodiments, the present invention can immunochemically stain a cell or a tissue in less than 60 seconds without washing. In some embodiments, the present invention stains and observes analyte (protein or nucleic acid) inside a cell in 60 seconds without washing.

Abstract: An ear canal clamp for small animals includes a base and a clamping mechanism. The clamping mechanism includes two clamping arms movably mounted on the base, a biasing member mounted on the base and constrained between the clamping arms, and two ear canal positioning members mounted respectively to the clamping arms and facing each other. The clamping arms are configured to move toward each other and compress the biasing member to increase the distance between the ear canal positioning members. A biasing force generated by the biasing member when compressed is used to push the clamping arms to move oppositely with respect to each other.

Abstract: A method of forming a semiconductor structure is provided, and includes trimming a first substrate to form a recess on a sidewall of the first substrate. A conductive structure is formed in the first substrate. The method includes bonding the first substrate to a carrier. The method includes thinning down the first substrate. The method also includes forming a dielectric material in the recess and over a top surface of the thinned first substrate. The method further includes performing a planarization process to remove the dielectric material and expose the conductive structure over the top surface. In addition, the method includes removing the carrier from the first substrate.

Abstract: An Ethernet power supply receives a DC voltage through a bus positive terminal and a bus negative terminal, and is coupled to a load device. The Ethernet power supply includes a first control module and a second control module. The first control module is used to provide a first control signal through the bus negative terminal to confirm whether the load device is a valid load. The second control module is used to connect or disconnect a coupling relationship between the bus positive terminal and the first control module according to the load device being connected or not.

Abstract: A semiconductor device includes a first diode, a second diode, a clamp circuit and a third diode. The first diode is coupled between an input/output (I/O) pad and a first voltage terminal. The second diode is coupled with the first diode, the I/O pad and a second voltage terminal. The clamp circuit is coupled between the first voltage terminal and the second voltage terminal. The second diode and the clamp circuit are configured to direct a first part of an electrostatic discharge (ESD) current flowing between the I/O pad and the first voltage terminal. The third diode, coupled to the first voltage terminal, and the second diode include a first semiconductor structure configured to direct a second part of the ESD current flowing between the I/O pad and the first voltage terminal.

Abstract: The present disclosure provides a video generation method, an apparatus, a system, a device and a storage medium. The method is applied to a video generation system, and the video generation system includes a first client and at least one second client. Specifically, the method includes: firstly, the first client creates a first virtual room and sets a target capturing effect for the first virtual room; then, the second client acquires a first video added with the target capturing effect after receiving a notification message that a current user has successfully joined the first virtual room, and uploads the first video to the first virtual room. Further, the first client acquires a target video from the first virtual room and generates a target result video based on the target video, and the target video includes the first video.