Patents by Inventor Wei-Ting Wang

Wei-Ting Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240132572
    Abstract: A fusion protein is disclosed. The fusion protein of the invention comprises an Fc fragment of an immunoglobulin G and a bioactive molecule, wherein the Fc is a single chain Fc. The amino acids in the hinge of the Fc is mutated, substituted, or deleted so that the hinge of Fc cannot form disulfide bonds. Methods for producing and using the fusion protein of the invention are also provided.
    Type: Application
    Filed: September 25, 2023
    Publication date: April 25, 2024
    Inventors: Chang-Yi Wang, Wen-Jiun Peng, Wei-Ting Kao
  • Publication number: 20240099037
    Abstract: Disclosed is a passivated perovskite structure containing a perovskite layer; and a hindered urea bond-based Lewis acid-base containing layer adjacent the perovskite layer. Also disclosed are solar cells containing the passivated perovskite structure.
    Type: Application
    Filed: January 27, 2022
    Publication date: March 21, 2024
    Inventors: Shien Ping Feng, Wei Ting Wang
  • Publication number: 20240088033
    Abstract: A method of forming a semiconductor device is provided. A transistor is formed at a first side of the substrate and a first dielectric layer is formed aside the transistor. A first metal via is formed through the first dielectric layer and aside the transistor. A first interconnect structure is formed over the first side of the substrate and electrically connected to the transistor and the first metal via. The substrate is thinned from a second side of the substrate. A capacitor is formed at the second side of the substrate and a second dielectric layer is formed aside the capacitor. A second metal via is formed through the second dielectric layer and the substrate and electrically connected to the first metal via.
    Type: Application
    Filed: March 20, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Kai Chan, Chung-Hao Tsai, Chuei-Tang WANG, Wei-Ting Chen
  • Publication number: 20240079315
    Abstract: Improved control of via anchor profiles in metals at a contact layer can be achieved by slowing down an anchor etching process and by introducing a passivation operation. By first passivating a metallic surface, etchants can be prevented from dispersing along grain boundaries, thereby distorting the shape of the via anchor. An iterative scheme that involves multiple cycles of alternating passivation and etching operations can control the formation of optimal via anchor profiles. When a desirable anchor shape is achieved, the anchor maintains structural integrity of the vias, thereby improving reliability of the interconnect structure.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Shin WANG, Yu-Hsiang Wang, Wei-Ting Chang, Fan-Yi Hsu
  • Patent number: 11923315
    Abstract: Semiconductor package includes a pair of dies, a redistribution structure, and a conductive plate. Dies of the pair of dies are disposed side by side. Each die includes a contact pad. Redistribution structure is disposed on the pair of dies, and electrically connects the pair of dies. Redistribution structure includes an innermost dielectric layer, an outermost dielectric layer, and a redistribution conductive layer. Innermost dielectric layer is closer to the pair of dies. Redistribution conductive layer extends between the innermost dielectric layer and the outermost dielectric layer. Outermost dielectric layer is furthest from the pair of dies. Conductive plate is electrically connected to the contact pads of the pair of dies. Conductive plate extends over the outermost dielectric layer of the redistribution structure and over the pair of dies. Vertical projection of the conductive plate falls on spans of the dies of the pair of dies.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang Wang, Wei-Ting Chen, Chien-Hsun Chen, Shih-Ya Huang
  • Patent number: 11913472
    Abstract: A centrifugal heat dissipation fan including a housing and an impeller disposed in the housing on an axis is provided. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions. A heat dissipation system of an electronic device is also provided.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: February 27, 2024
    Assignee: Acer Incorporated
    Inventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Chun-Chieh Wang, Shu-Hao Kuo
  • Patent number: 11916313
    Abstract: An appressed antenna includes an antenna housing and a metal shell. The antenna housing comprising a housing and a planar antenna, where the planar antenna is bent with one part folded onto the inner surface of the housing and other part pressed onto the outer surface of the housing. The antenna housing is sleeve fitted to the metal shell with a gap between for the planar antenna to radiate. In this all-metal environment, the position of the antenna is close to the gap opening will increase radiation efficiency. By having at least a branch at the tail end of the appressed antenna, the appressed antenna can have a good return loss and antenna gain.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: February 27, 2024
    Assignee: QuantumZ Inc.
    Inventors: Kun-Yen Tu, Meng-Hua Tsai, Wei-Ting Lee, Sin-Siang Wang
  • Publication number: 20240055479
    Abstract: A method for manufacturing a semiconductor structure is provided. The method includes forming a fin structure protruding from a substrate, wherein the fin structure includes first semiconductor material layers and second semiconductor material layers alternately stacked. The method includes forming a dummy gate structure across the fin structure. The method includes forming a gate spacer on the sidewall of the dummy gate structure. The method includes removing the dummy gate structure to expose the fin structure. The method includes partially removing the second semiconductor material layers to form concave portions on sidewalls of the second semiconductor material layers. The method includes forming dielectric spacers in the concave portions. The method includes removing the first semiconductor material layers to form gaps. The method includes forming a gate structure in the gaps to wrap around the second semiconductor material layers and the dielectric spacers.
    Type: Application
    Filed: August 12, 2022
    Publication date: February 15, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Ting PAN, Kuo-Cheng CHIANG, Shi-Ning JU, Yi-Ruei JHAN, Wei-Ting WANG, Chih-Hao WANG
  • Publication number: 20230420532
    Abstract: A method of manufacturing an integrated circuit device is provided. The method includes forming a semiconductor fin over a semiconductor substrate; forming an isolation structure surrounding the semiconductor fin; etching a trench in the semiconductor fin; forming a dielectric fin in the trench; after forming the dielectric fin, recessing a top surface of the isolation structure, such that the dielectric fin and the semiconductor fin protrude from the recessed top surface of the isolation structure; and forming a first metal gate structure and a second metal gate structure over the dielectric fin and the semiconductor fin, respectively.
    Type: Application
    Filed: June 27, 2022
    Publication date: December 28, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Ruei JHAN, Kuan-Ting PAN, Wei Ting WANG, Shi Ning JU, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Patent number: 11830589
    Abstract: The disclosure provides a disease classification method and a disease classification device. The disease classification method includes: inputting samples into a first stage model and obtaining a first stage determination result; inputting first samples determined positive by the first stage model into a second stage high specificity model to obtain second samples determined to be positive and third samples determined to be negative and rule in the second samples; inputting fourth samples determined negative by the first stage model into a second stage high sensitivity model to obtain fifth samples determined to be positive and sixth samples determined to be negative and rule out the sixth samples; obtaining a second stage determination result of the second and sixth samples; and inputting the third and fifth samples not ruled in or ruled out into a third stage model and obtaining a third stage determination result of the third and fifth samples.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: November 28, 2023
    Assignees: Acer Incorporated, Acer Medical Inc., Taipei Veterans General Hospital
    Inventors: Jun-Hong Chen, Tsung-Hsien Tsai, Chun-Hsien Li, Wei-Ting Wang, Yin-Hao Lee, Hao-Min Cheng
  • Publication number: 20230378881
    Abstract: The present application provides a control device, a power-supply device, and a method for controlling a power-supply device. The control device, applied to a power converter, includes a primary controller, a secondary controller and a voltage detector, wherein the power converter includes a transformer having a primary winding and a secondary winding. The primary controller is configured to generate a PWM signal having an off-time and an on-time, wherein the power converter is operative to deliver power from the primary winding to the secondary winding during the on-time. The secondary controller monitors an output voltage of the power converter and applies a preset voltage to the secondary winding according to a threshold voltage and the output voltage. The voltage detector, coupled to the primary winding, drives the primary controller to adjust a period of the PWM signal in response to the application of the preset voltage.
    Type: Application
    Filed: May 18, 2022
    Publication date: November 23, 2023
    Inventors: WEI-TING WANG, YUEH-PING YU
  • Publication number: 20230369327
    Abstract: In a method of manufacturing a semiconductor device, a fin structure including a stacked layer of first semiconductor layers and second semiconductor layers is formed, an isolation insulating layer is formed so that the stacked layer are exposed from the isolation insulating layer, a sacrificial cladding layer is formed over at least sidewalls of the exposed stacked layer, a sacrificial gate electrode is formed over the exposed stacked layer, an interlayer dielectric layer is formed, the sacrificial gate electrode is partially recessed to leave a pillar of the remaining sacrificial gate electrode, the sacrificial cladding layer and the first semiconductor layers are removed, a gate dielectric layer wrapping around the second semiconductor layer and a gate electrode over the gate dielectric layer are formed, the pillar is removed, and one or more dielectric layers are formed in a gate space from which the pillar is removed.
    Type: Application
    Filed: July 12, 2022
    Publication date: November 16, 2023
    Inventors: Kuan-Ting PAN, Kuo-Cheng CHIANG, Shi Ning JU, Yi-Ruei JHAN, Wei Ting WANG, Chih-Hao WANG
  • Publication number: 20230103750
    Abstract: A method of balancing workloads among processing elements (PEs) in a neural network processor can include receiving first weights and second weights of a neural network. The first and second weights are associated with a first and a second output channel (OC), respectively. A first PE computes a partial sum (PSUM) of an output activation of the first OC based on the non-zero weights in the first weights. A second PE computes a PSUM of an output activation of the second OC based on the non-zero weights in the second weights. A controller can allocate one or more non-zero weights of the first weights to the second PE for computing the PSUM of the output activation of the first OC to balance a workload.
    Type: Application
    Filed: October 6, 2021
    Publication date: April 6, 2023
    Applicant: MEDIATEK INC.
    Inventors: Wei-Ting WANG, Jeng-Yun HSU, Shao-Yu WANG, Han-Lin LI
  • Patent number: 11578417
    Abstract: A nano-twinned crystal film and a method thereof are disclosed. The method of fabricating a nano-twinned crystal film includes utilizing an electrolyte solution including copper salt, acid, and a water or alcohol-soluble organic additive, and performing electrodeposition, under conditions of a current density of 20˜100 mA/cm2, a voltage of 0.2˜1.0V, and a cathode-anode distance of 10˜300 mm, to form the nano-twinned crystal film on a surface at the cathode. The nano-twinned crystal film formed by the method includes a plurality of nano-twinned copper grains and a region of random crystal phases between some of adjacent nano-twinned copper grains, wherein at least some of the nano-twinned copper grains have a pillar cap configuration with a wide top and a narrow bottom.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: February 14, 2023
    Assignee: DOCTECH LIMITED
    Inventors: Wei-Ting Wang, Shien-Ping Feng, Yu-Ting Huang, Sheng-Jye Cherng, Chih-Chun Chung
  • Patent number: 11529083
    Abstract: A physiological status evaluation method and a physiological status evaluation apparatus are provided. The method includes the following: obtaining original electrocardiogram data of a user by an electrocardiogram detection apparatus; converting the original electrocardiogram data into digital integration data; obtaining a plurality of physiological characteristic parameters according to the digital integration data; filtering the physiological characteristic parameters for at least one notable characteristic parameter through at least one filter model, where decision importance of the at least one notable characteristic parameter in a decision process of the at least one filter model is greater than a threshold; building a prediction model according to the at least one notable characteristic parameter; and evaluating a physiological status of the user through the prediction model.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: December 20, 2022
    Assignees: Acer Incorporated, Taipei Veterans General Hospital, Acer Medical Inc.
    Inventors: Chun-Hsien Li, Tsung-Hsien Tsai, Jun-Hong Chen, Wei-Ting Wang, Yin-Hao Lee, Hao-Min Cheng
  • Publication number: 20220084635
    Abstract: The disclosure provides a disease classification method and a disease classification device. The disease classification method includes: inputting samples into a first stage model and obtaining a first stage determination result; inputting first samples determined positive by the first stage model into a second stage high specificity model to obtain second samples determined to be positive and third samples determined to be negative and rule in the second samples; inputting fourth samples determined negative by the first stage model into a second stage high sensitivity model to obtain fifth samples determined to be positive and sixth samples determined to be negative and rule out the sixth samples; obtaining a second stage determination result of the second and sixth samples; and inputting the third and fifth samples not ruled in or ruled out into a third stage model and obtaining a third stage determination result of the third and fifth samples.
    Type: Application
    Filed: October 29, 2020
    Publication date: March 17, 2022
    Applicants: Acer Incorporated, Acer Healthcare Inc., Taipei Veterans General Hospital
    Inventors: Jun-Hong Chen, Tsung-Hsien Tsai, Chun-Hsien Li, Wei-Ting Wang, Yin-Hao Lee, Hao-Min Cheng
  • Publication number: 20220079463
    Abstract: A physiological status evaluation method and a physiological status evaluation apparatus are provided. The method includes the following: obtaining original electrocardiogram data of a user by an electrocardiogram detection apparatus; converting the original electrocardiogram data into digital integration data; obtaining a plurality of physiological characteristic parameters according to the digital integration data; filtering the physiological characteristic parameters for at least one notable characteristic parameter through at least one filter model, where decision importance of the at least one notable characteristic parameter in a decision process of the at least one filter model is greater than a threshold; building a prediction model according to the at least one notable characteristic parameter; and evaluating a physiological status of the user through the prediction model.
    Type: Application
    Filed: October 29, 2020
    Publication date: March 17, 2022
    Applicants: Acer Incorporated, Taipei Veterans General Hospital, Acer Healthcare Inc.
    Inventors: Chun-Hsien Li, Tsung-Hsien Tsai, Jun-Hong Chen, Wei-Ting Wang, Yin-Hao Lee, Hao-Min Cheng
  • Publication number: 20210198799
    Abstract: A nano-twinned crystal film and a method thereof are disclosed. The method of fabricating a nano-twinned crystal film includes utilizing an electrolyte solution including copper salt, acid, and a water or alcohol-soluble organic additive, and performing electrodeposition, under conditions of a current density of 20˜100 mA/cm2, a voltage of 0.2˜1.0V, and a cathode-anode distance of 10˜300 mm, to form the nano-twinned crystal film on a surface at the cathode. The nano-twinned crystal film formed by the method includes a plurality of nano-twinned copper grains and a region of random crystal phases between some of adjacent nano-twinned copper grains, wherein at least some of the nano-twinned copper grains have a pillar cap configuration with a wide top and a narrow bottom.
    Type: Application
    Filed: December 28, 2020
    Publication date: July 1, 2021
    Applicant: Doctech limited
    Inventors: Wei-Ting WANG, Shien-Ping FENG, Yu-Ting HUANG, Sheng-Jye CHERNG, Chih-Chun CHUNG
  • Patent number: 10942067
    Abstract: The surface temperature of a portable device is estimated. The portable device includes a sensor for detecting the internal temperature of the portable device. The portable device also includes circuitry for estimating the surface temperature, using the internal temperature and an ambient temperature of the portable device as input to a circuit model. The circuit model describes thermal behaviors of the portable device. The circuitry is operative to identify a scenario in which the portable device operates, and determine the ambient temperature using the scenario and at least the internal temperature.
    Type: Grant
    Filed: July 3, 2020
    Date of Patent: March 9, 2021
    Assignee: MediaTek Inc.
    Inventors: Chi-Wen Pan, Pei-Yu Huang, Sheng-Liang Kuo, Jih-Ming Hsu, Tai-Yu Chen, Yun-Ching Li, Wei-Ting Wang
  • Publication number: 20200333193
    Abstract: The surface temperature of a portable device is estimated. The portable device includes a sensor for detecting the internal temperature of the portable device. The portable device also includes circuitry for estimating the surface temperature, using the internal temperature and an ambient temperature of the portable device as input to a circuit model. The circuit model describes thermal behaviors of the portable device. The circuitry is operative to identify a scenario in which the portable device operates, and determine the ambient temperature using the scenario and at least the internal temperature.
    Type: Application
    Filed: July 3, 2020
    Publication date: October 22, 2020
    Inventors: Chi-Wen Pan, Pei-Yu Huang, Sheng-Liang Kuo, Jih-Ming Hsu, Tai-Yu Chen, Yun-Ching Li, Wei-Ting Wang