Abstract: A switching control circuit for a switching power converter is provided. The switching control circuit is coupled to a switching device and an auxiliary winding of a transformer. The switching control circuit includes a valley detecting circuit, a valley lock circuit, and a PWM circuit. The valley detecting circuit is coupled to receive a reflected voltage signal from the auxiliary winding of the transformer for outputting a control signal in response to the reflected voltage signal. The valley lock circuit is coupled to receive the control signal for outputting a judging signal in response to the control signal during a first period and a second period following the first period. The PWM circuit outputs a switching signal in response to the judging signal.

Abstract: The invention provides an organic dye, a composite dye and dye-sensitized solar cell using the same. The organic dye has Formula (I): wherein L is a linker group and comprises a substituted or unsubstituted C4-C20 aryl group, a substituted or unsubstituted heteroaryl group, a substituted or unsubstituted carboncyclic group, a substituted or unsubstituted heterocyclic group or combinations thereof, and A is an electron acceptor group.

Abstract: A network device and a method for the network device to set operation of a port are provided. The network device is connected to a set of power sourcing equipment (PSE) through a port, and the PSE powers the network device through the port. The network device includes an analysis module and a port control module. The analysis module judges whether the port of the network device is connected to the PSE. The port control module provides a port function switch instruction according to a judgment result of the analysis module, so as to enable or disable the port.

Abstract: A friction stir welding method of manufacturing a metallic housing including electronic device housing is described as follow. A first workpiece and a second workpiece made of metal are provided. The first workpiece is attached to the second workpiece. A joining tool is provided, which includes a shaft shoulder and a stir pin extending from a friction surface of the shaft shoulder. A diameter of the shaft shoulder is in a range from about 8 mm to about 15 mm. The first workpiece and the second workpiece are stirred and rubbed by rotating the joining tool, thereby forming the electronic device housing. The electronic device housing is anodized.

Abstract: A friction stir welding repairing method for repairing a defective welding area, in which the defective welding area is defined in a predetermined welding area of a metallic housing, is described as follows. A repairing welding tool has a main portion and a stir end extending from an end of the main portion, and a diameter of the stir end is larger than a diameter of the defective welding area. The repairing welding tool is rotated and inserted to a region of the predetermined welding area adjacent to the defective welding area. The repairing welding tool is rotated and moved across the defective welding area. The repairing welding tool is pulled out of the predetermined welding area, and then the defective welding area is cooled.

Abstract: A metallic housing for an electronic device, the metallic housing includes a main body defining a receiving chamber for receiving electronic components and an opening communicating with the receiving chamber, and a covering plate positioned on the main body adjacent to a side of the main body. The covering plate is welded to the main body by friction stir welding and a welded region is formed on a side surface of the metallic housing such that the welded region is smooth with the main body and the covering plate. A method for making the metallic housing and an electronic device using the metallic housing is also disclosed.

Abstract: The invention provides an organic dye, a composite dye and dye-sensitized solar cell using the same. The organic dye has Formula (I): wherein L is a linker group and comprises a substituted or unsubstituted C4-C20 aryl group, a substituted or unsubstituted heteroaryl group, a substituted or unsubstituted carboncyclic group, a substituted or unsubstituted heterocyclic group or combinations thereof, and A is an electron acceptor group.

Abstract: An equalizer. The equalizer, either operated in a blind mode or a decision directed mode, comprises a feed-forward filter, a feedback filter, a decision device, a control circuit, and a multiplexer. The feed-forward filter receives an input signal. The feedback filter filters an equalized signal. The combiner combines the feed-forward filtered signal and the feedback filtered signal. The decision device maps the combined signal to one symbol of a symbol set. The control circuit receives the combined output and generates a slice control signal. The multiplexer selects the combined signal or the mapped signal as the equalized according to the slice control signal when operated in the blind mode.

Abstract: A switching control circuit for a switching power converter is provided. The switching control circuit is coupled to a switching device and an auxiliary winding of a transformer. The switching control circuit includes a valley detecting circuit, a valley lock circuit, and a PWM circuit. The valley detecting circuit is coupled to receive a reflected voltage signal from the auxiliary winding of the transformer for outputting a control signal in response to the reflected voltage signal. The valley lock circuit is coupled to receive the control signal for outputting a judging signal in response to the control signal during a first period and a second period following the first period. The PWM circuit outputs a switching signal in response to the judging signal.

Abstract: An equalization system used in a communication receiver has multiple equalization stages. A front equalizer supplies equalization output to a feed back filter in a rear equalizer to speed initialization of the rear equalizer. In addition, the rear equalizer supplies decision output to the front equalizer to estimate errors so as to provide more accurate tap coefficient adjustments. Both the front equalizer and the rear equalizer can be implemented with iterative equalizers to further enhance equalization performance.

Abstract: A block-based equalizer used in a receiver, comprising a feed forward filter, a feed backward filter and a combiner. The feed forward filter generates one first data block for each round and each first data block has multiple first sub-blocks. The feed backward filter generates one second data block. Certain input symbols of the feed backward filter are suppressed during filtering. The combiner combines one second data block and one first sub-block.

Abstract: An equalization system used in a communication receiver has multiple equalization stages. A front equalizer supplies equalization output to a feed back filter in a rear equalizer to speed initialization of the rear equalizer. In addition, the rear equalizer supplies decision output to the front equalizer to estimate errors so as to provide more accurate tap coefficient adjustments. Both the front equalizer and the rear equalizer can be implemented with iterative equalizers to further enhance equalization performance.

Abstract: A method and apparatus for rejecting an interference signal from an input frequency spectrum. The method includes the steps of receiving the input signal; frequency-shifting the received input signal by a first frequency-shifting amount; and filtering the frequency-shifted input signal to filter out the interference component from the input signal.

Abstract: The present invention discloses a texture filtering system, comprising a sequence generator, a retrieve unit and a dispatch unit. The sequence generator generates an execution sequence in each duty cycle. The execution sequence is the priority of respectively retrieving multiple pixels from multiple queues. The retrieve unit outputs multiple Boolean signals based on the limitation of the total number of all-purpose texture filters and the above priority in a duty cycle for determining from which queues the pixels are retrieved to perform a texture filtering process, and the dispatch unit assigns the multiple texture filter formats of the pixels to be processed and the anisotropic ratios thereof to multiple address generators.

Abstract: A synchronization signal detector includes: a first circuit configured to delay the data signal by a period of at least one data segment of the data signal to generate a delayed signal; a second circuit configured to produce a plurality of similarity signals according to the data signal and the delayed signal, each of the similarity signals representing the similarity between the data signal and the delayed signal, and a third circuit configured to determine the synchronization signal of the data signal according to the similarity signals. The present invention further provides a method corresponding to the signal detector.

Abstract: An interference detecting circuit for use in an ATSC system and for detecting interference of an ATSC signal includes: a buffering module for delaying to output a first PN63 synchronization format data when receiving the first PN63 synchronization format data; a correlation arithmetic circuit coupled to the buffering module for receiving the ATSC signal and performing a correlation operation on a second PN63 synchronization format data and the delayed first PN63 synchronization format data to output a detection signal when receiving the second PN63 synchronization format data; and a determining circuit for determining whether performing interference rejection on the ATSC signal or not according to the result of the above-mentioned correlation operation.

Abstract: An amplitude-modulation signal reception apparatus is provided. The amplitude-modulation signal receiver apparatus includes a timing recovery module, a symbol phase shift unit, and an equalizer. The carrier recovery module removes a frequency offset and a phase jitter from an amplitude-modulation signal to generate a carrier recovered signal. The timing recovery module estimates a proper re-sampling position to re-sample the carrier-recovered signal. The phase shifter further shifts the signal that is timing recovered and carrier recovered. The equalizer applies equalization to the shifted signal to remove inter-symbol interference from the shifted signal.

Abstract: An equalizer. The equalizer, either operated in a blind mode or a decision directed mode, comprises a feed-forward filter, a feedback filter, a decision device, a control circuit, and a multiplexer. The feed-forward filter receives an input signal. The feedback filter filters an equalized signal. The combiner combines the feed-forward filtered signal and the feedback filtered signal. The decision device maps the combined signal to one symbol of a symbol set. The control circuit receives the combined output and generates a slice control signal. The multiplexer selects the combined signal or the mapped signal as the equalized according to the slice control signal when operated in the blind mode.

Abstract: Decision feedback equalizers and related equalizing method are provided. One proposed decision feedback equalizer includes: a feed-forward filter for filtering an incoming signal to generate a filtered signal; a feedback filter for generating a feedback signal according to a decision signal; an operating device, coupled to the feed-forward filter and the feedback filter, for generating an output signal according to the filtered signal and the feedback signal; a decision device, coupled to the operating device and the feedback filter, for generating the decision signal according to the output signal; and an updating device coupled to the feedback filter for constraining coefficients of predetermined taps of the feedback filter while updating the tap coefficients of the feedback filter; wherein each predetermined tap of the feedback filter corresponds to a tap of the feed-forward filter.

Abstract: A carrier recovery system includes an in-phase mixer for mixing an incoming signal with an in-phase reference signal to produce an in-phase baseband signal; a quadrature-phase mixer for mixing the incoming signal with a quadrature-phase reference signal to produce a quadrature-phase baseband signal; a DC detector for measuring a DC offset of the quadrature-phase baseband signal; and a frequency synthesizer for generating the in-phase reference signal and the quadrature-phase reference signal according to the DC offset measured by the DC detector. The quadrature-phase reference signal is the in-phase reference signal phase-delayed by ninety degrees. The DC offset of the quadrature-phase baseband signal is caused by a pilot tone of the VSB signal for a selected carrier in an Advanced Television Systems Committee (ATSC) digital television (DTV) receiver. By minimizing the DC offset, the carrier recover system locks the quadrature-phase reference signal and the in-phase reference signal to the selected channel.