Abstract: One illustrative device disclosed herein includes a substrate fin formed in a substrate comprised of a first semiconductor material, wherein at least a sidewall of the substrate fin is positioned substantially in a <100> crystallographic direction of the crystalline structure of the substrate, a replacement fin structure positioned above the substrate fin, wherein the replacement fin structure is comprised of a semiconductor material that is different from the first semiconductor material, and a gate structure positioned around at least a portion of the replacement fin structure.

Abstract: One illustrative method disclosed herein involves forming a first fin for a first FinFET device in and above a semiconducting substrate, wherein the first fin is comprised of a first semiconductor material that is different from the material of the semiconducting substrate and, after forming the first fin, forming a second fin for a second FinFET device that is formed in and above the semiconducting substrate, wherein the second fin is comprised of a second semiconductor material that is different from the material of the semiconducting substrate and different from the first semiconductor material.

Abstract: One method of forming epi semiconductor cladding materials in the channel region of a semiconductor device is disclosed which includes forming a sacrificial gate structure around a portion of an initial fin, forming a sidewall spacer adjacent opposite sides of the sacrificial gate structure and removing the sacrificial gate structure so as to thereby define a replacement gate cavity, performing an etching process through the replacement gate cavity to remove portions of the initial fin so as to thereby define a reduced size fin and recesses under the sidewall spacers, forming at least one replacement epi semiconductor cladding material around the reduced size fin in the replacement gate cavity and in the recesses under the sidewall spacers, and forming a replacement gate structure within the replacement gate cavity around the at least one replacement epi semiconductor cladding material.

Abstract: A FinFET device includes a substrate, a gate structure positioned above the substrate, and sidewall spacers positioned adjacent to the gate structure. An epi semiconductor material is positioned in source and drain regions of the FinFET device and laterally outside of the sidewall spacers. A fin extends laterally under the gate structure and the sidewall spacers in a gate length direction of the FinFET device, wherein the end surfaces of the fin abut and engage the epi semiconductor material. A stressed material is positioned in a channel cavity located below the fin, above the substrate, and laterally between the epi semiconductor material, the stressed material having a top surface that abuts and engages a bottom surface of the fin, a bottom surface that abuts and engages the substrate, and end surfaces that abut and engage the epi semiconductor material.

Abstract: A method for forming a semiconductor device is provided including processing a wafer having a spacer layer and a structure layer, the spacer layer is over the structure layer. The method continues including forming a first sidewall spacer from the spacer layer, forming a structure strip from the structure layer below the first sidewall spacer, forming a masking structure over and intersecting the structure strip, and forming a vertical post from the structure strip below the masking structure.

Abstract: One method disclosed includes, among other things, covering the top surface and a portion of the sidewalls of an initial fin structure with etch stop material, forming a sacrificial gate structure around the initial fin structure, forming a sidewall spacer adjacent the sacrificial gate structure, removing the sacrificial gate structure, with the etch stop material in position, to thereby define a replacement gate cavity, performing at least one etching process through the replacement gate cavity to remove a portion of the semiconductor substrate material of the fin structure positioned under the replacement gate cavity that is not covered by the etch stop material so as to thereby define a final fin structure and a channel cavity positioned below the final fin structure and substantially filling the channel cavity with a stressed material.

Abstract: One method of forming epi semiconductor cladding materials in the channel region of a semiconductor device is disclosed which includes forming a sacrificial gate structure around a portion of an initial fin, forming a sidewall spacer adjacent opposite sides of the sacrificial gate structure and removing the sacrificial gate structure so as to thereby define a replacement gate cavity, performing an etching process through the replacement gate cavity to remove portions of the initial fin so as to thereby define a reduced size fin and recesses under the sidewall spacers, forming at least one replacement epi semiconductor cladding material around the reduced size fin in the replacement gate cavity and in the recesses under the sidewall spacers, and forming a replacement gate structure within the replacement gate cavity around the at least one replacement epi semiconductor cladding material.

Abstract: One method of forming epi semiconductor cladding materials in the channel region of a semiconductor device is disclosed which includes forming an initial epi semiconductor cladding material around the exposed portion of a fin for an entire axial length of the fin, forming a sacrificial gate structure around a portion of the fin and the initial cladding material, removing the sacrificial gate structure so as to thereby define a replacement gate cavity, performing an etching process through the replacement gate cavity to remove at least the exposed portion of the initial cladding material and thereby expose a surface of the fin within the replacement gate cavity, forming at least one replacement epi semiconductor cladding material around the exposed surface of the fin, and forming a replacement gate structure within the replacement gate cavity around the at least one replacement epi semiconductor cladding material.

Abstract: One method of forming epi semiconductor cladding materials in the channel region of a semiconductor device is disclosed which includes forming an initial epi semiconductor cladding material around the exposed portion of a fin for an entire axial length of the fin, forming a sacrificial gate structure around a portion of the fin and the initial cladding material, removing the sacrificial gate structure so as to thereby define a replacement gate cavity, performing an etching process through the replacement gate cavity to remove at least the exposed portion of the initial cladding material and thereby expose a surface of the fin within the replacement gate cavity, forming at least one replacement epi semiconductor cladding material around the exposed surface of the fin, and forming a replacement gate structure within the replacement gate cavity around the at least one replacement epi semiconductor cladding material.

Abstract: An illustrative method includes forming a FinFET device above structure comprising a semiconductor substrate, a first epi semiconductor material and a second epi semiconductor material that includes forming an initial fin structure that comprises portions of the semiconductor substrate, the first epi material and the second epi material, recessing a layer of insulating material such that a portion, but not all, of the second epi material portion of the initial fin structure is exposed so as to define a final fin structure, forming a gate structure above and around the final fin structure, removing the first epi material of the initial fin structure and thereby define an under-fin cavity under the final fin structure and substantially filling the under-fin cavity with a stressed material.

Abstract: Various methods are disclosed herein for forming alternative fin materials that are in a stable or metastable condition. In one case, a metastable replacement fin is grown to a height that is greater than an unconfined stable critical thickness of the replacement fin material and it has a defect density of 105 defects/cm2 or less throughout at least 90% of its entire height. In another case, a metastable replacement fin is grown to a height that is greater than an unconfined metastable critical thickness of the replacement fin material and it has a defect density of 105 defects/cm2 or less throughout at least 90% of its entire height.

Abstract: An illustrative method includes forming a FinFET device above structure comprising a semiconductor substrate, a first epi semiconductor material and a second epi semiconductor material that includes forming an initial fin structure that comprises portions of the semiconductor substrate, the first epi material and the second epi material, recessing a layer of insulating material such that a portion, but not all, of the second epi material portion of the initial fin structure is exposed so as to define a final fin structure, forming a gate structure above and around the final fin structure, removing the first epi material of the initial fin structure and thereby define an under-fin cavity under the final fin structure and substantially filling the under-fin cavity with a stressed material.

Abstract: Various methods are disclosed herein for forming alternative fin materials that are in a stable or metastable condition. In one case, a stable replacement fin is grown to a height that is greater than an unconfined stable critical thickness of the replacement fin material and it has a defect density of 104 defects/cm2 or less throughout its entire height. In another case, a metastable replacement fin is grown to a height that is greater than an unconfined metastable critical thickness of the replacement fin material and it has a defect density of 105 defects/cm2 or less throughout at least 90% of its entire height.

Abstract: One illustrative device disclosed herein includes a substrate fin formed in a substrate comprised of a first semiconductor material, wherein at least a sidewall of the substrate fin is positioned substantially in a <100> crystallographic direction of the crystalline structure of the substrate, a replacement fin structure positioned above the substrate fin, wherein the replacement fin structure is comprised of a semiconductor material that is different from the first semiconductor material, and a gate structure positioned around at least a portion of the replacement fin structure.

Abstract: One method disclosed includes, among other things, forming an initial fin structure comprised of portions of a substrate, a first epi semiconductor material and a second epi semiconductor material, forming a layer of insulating material so as to over-fill the trenches that define the fin, recessing a layer of insulating material such that a portion, but not all, of the second epi semiconductor portion of the final fin structure is exposed, forming a gate structure around the final fin structure, further recessing the layer of insulating material such that the first epi semiconductor material is exposed, removing the first epi semiconductor material to thereby define an under-fin cavity and substantially filling the under-fin cavity with a stressed material.

Abstract: One method disclosed includes, among other things, covering the top surface and a portion of the sidewalls of an initial fin structure with etch stop material, forming a sacrificial gate structure around the initial fin structure, forming a sidewall spacer adjacent the sacrificial gate structure, removing the sacrificial gate structure, with the etch stop material in position, to thereby define a replacement gate cavity, performing at least one etching process through the replacement gate cavity to remove a portion of the semiconductor substrate material of the fin structure positioned under the replacement gate cavity that is not covered by the etch stop material so as to thereby define a final fin structure and a channel cavity positioned below the final fin structure and substantially filling the channel cavity with a stressed material.

Abstract: One method disclosed includes, among other things, forming an initial fin structure comprised of portions of a substrate, a first epi semiconductor material and a second epi semiconductor material, forming a layer of insulating material so as to over-fill the trenches that define the fin, recessing a layer of insulating material such that a portion, but not all, of the second epi semiconductor portion of the final fin structure is exposed, forming a gate structure around the final fin structure, further recessing the layer of insulating material such that the first epi semiconductor material is exposed, removing the first epi semiconductor material to thereby define an under-fin cavity and substantially filling the under-fin cavity with a stressed material.

Abstract: Various methods are disclosed herein for forming alternative fin materials that are in a stable or metastable condition. In one case, a stable replacement fin is grown to a height that is greater than an unconfined stable critical thickness of the replacement fin material and it has a defect density of 104 defects/cm2 or less throughout its entire height. In another case, a metastable replacement fin is grown to a height that is greater than an unconfined metastable critical thickness of the replacement fin material and it has a defect density of 105 defects/cm2 or less throughout at least 90% of its entire height.

Abstract: One illustrative device disclosed herein includes a substrate fin formed in a substrate comprised of a first semiconductor material, wherein at least a sidewall of the substrate fin is positioned substantially in a <100> crystallographic direction of the crystalline structure of the substrate, a replacement fin structure positioned above the substrate fin, wherein the replacement fin structure is comprised of a semiconductor material that is different from the first semiconductor material, and a gate structure positioned around at least a portion of the replacement fin structure.

Abstract: One method involves providing a substrate comprised of first and second semiconductor materials, performing an etching process through a hard mask layer to define a plurality of trenches that define first and second portions of a fin for a FinFET device, wherein the first portion is the first material and the second portion is the second material, forming a layer of insulating material in the trenches, performing a planarization process on the insulating material, performing etching processes to remove the hard mask layer and reduce a thickness of the second portion, thereby defining a cavity, performing a deposition process to form a third portion of the fin on the second portion, wherein the third portion is a third semiconducting material that is different from the second material, and performing a process such that a post-etch upper surface of the insulating material is below an upper surface of the third portion.