Abstract: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a blanker aperture array (BAA) for an e-beam tool includes a first column of openings along a first direction. The BAA also includes a second column of openings along the first direction and staggered from the first column of openings. The first and second columns of openings together form an array having a pitch in the first direction. A scan direction of the BAA is along a second direction, orthogonal to the first direction. The pitch of the array corresponds to half of a minimal pitch layout of a target pattern of lines for orientation parallel with the second direction.

Abstract: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a blanker aperture array (BAA) for an e-beam tool is described. The BAA includes three distinct aperture arrays of different pitch.

Abstract: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a method of real-time alignment of a wafer situated on a stage of an e-beam tool involves collecting backscattered electrons from an underlying patterned feature of the wafer while an e-beam column of the e-beam tool writes during scanning of the stage. The collecting is performed by an electron detector placed at the e-beam column bottom. The method also involves performing linear corrections of an alignment of the stage relative to the e-beam column based on the collecting.

Abstract: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a layout for a metallization layer of an integrated circuit includes a first region having a plurality of unidirectional lines of a first width and a first pitch and parallel with a first direction. The layout also includes a second region having a plurality of unidirectional lines of a second width and a second pitch and parallel with the first direction, the second width and the second pitch different than the first width and the first pitch, respectively. The layout also includes a third region having a plurality of unidirectional lines of a third width and a third pitch and parallel with the first direction, the third width and the third pitch different than the first and second widths and different than the first and second pitches.

Abstract: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a blanker aperture array (BAA) for an e-beam tool includes a first column of openings along a first direction and having a pitch. The BAA also includes a second column of openings along the first direction and staggered from the first column of openings. The second column of openings has the pitch. A scan direction of the BAA is along a second direction, orthogonal to the first direction.

Abstract: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a method of data compression or data reduction for e-beam tool simplification involves providing an amount of data to write a column field and to adjust the column field for field edge placement error on a wafer, wherein the amount of data is limited to data for patterning approximately 10% or less of the column field. The method also involves performing e-beam writing on the wafer using the amount of data.

Abstract: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a blanker aperture array (BAA) for an e-beam tool is described. The BAA is a non-universal cutter.

Abstract: A method including patterning a thickness dimension of an interconnect material into a thickness dimension for a wiring line with one or more vias extending from the wiring line and introducing a dielectric material on the interconnect material. A method including depositing and patterning an interconnect material into a wiring line and one or more vias; and introducing a dielectric material on the interconnect material such that the one or more vias are exposed through the dielectric material. An apparatus including a first interconnect layer in a first plane and a second interconnect in a second plane on a substrate; and a dielectric layer separating the first and second interconnect layers, wherein the first interconnect layer comprises a monolith including a wiring line and at least one via, the at least one via extending from the wiring line to a wiring line of the second interconnect layer.

Abstract: A method including patterning a thickness dimension of an interconnect material into a thickness dimension for a wiring line with one or more vias extending from the wiring line and introducing a dielectric material on the interconnect material. A method including depositing and patterning an interconnect material into a wiring line and one or more vias; and introducing a dielectric material on the interconnect material such that the one or more vias are exposed through the dielectric material. An apparatus including a first interconnect layer in a first plane and a second interconnect in a second plane on a substrate; and a dielectric layer separating the first and second interconnect layers, wherein the first interconnect layer comprises a monolith including a wiring line and at least one via, the at least one via extending from the wiring line to a wiring line of the second interconnect layer.

Abstract: A method including patterning a thickness dimension of an interconnect material into a thickness dimension for a wiring line with one or more vias extending from the wiring line and introducing a dielectric material on the interconnect material. A method including depositing and patterning an interconnect material into a wiring line and one or more vias; and introducing a dielectric material on the interconnect material such that the one or more vias are exposed through the dielectric material. An apparatus including a first interconnect layer in a first plane and a second interconnect in a second plane on a substrate; and a dielectric layer separating the first and second interconnect layers, wherein the first interconnect layer comprises a monolith including a wiring line and at least one via, the at least one via extending from the wiring line to a wiring line of the second interconnect layer.

Abstract: A method including patterning a thickness dimension of an interconnect material into a thickness dimension for a wiring line with one or more vias extending from the wiring line and introducing a dielectric material on the interconnect material. A method including depositing and patterning an interconnect material into a wiring line and one or more vias; and introducing a dielectric material on the interconnect material such that the one or more vias are exposed through the dielectric material. An apparatus including a first interconnect layer in a first plane and a second interconnect in a second plane on a substrate; and a dielectric layer separating the first and second interconnect layers, wherein the first interconnect layer comprises a monolith including a wiring line and at least one via, the at least one via extending from the wiring line to a wiring line of the second interconnect layer.

Abstract: The present invention discloses a method of designing a set of two tiled masks, as well as, a mask including: a first tile, the first tile being transparent to a light, the first tile having a first characteristic linear dimension that is 15% or less of a wavelength of the light; a second tile, the second tile being transparent to the light, the second tile having a second characteristic linear dimension that is 15% or less of the wavelength of the light; and a third tile, the third tile being opaque to the light, the third tile having a third characteristic linear dimension that is 15% or less of the wavelength of the light.

Abstract: The present invention discloses a method of designing a set of two tiled masks, as well as, a mask including: a first tile, the first tile being transparent to a light, the first tile having a first characteristic linear dimension that is 15% or less of a wavelength of the light; a second tile, the second tile being transparent to the light, the second tile having a second characteristic linear dimension that is 15% or less of the wavelength of the light; and a third tile, the third tile being opaque to the light, the third tile having a third characteristic linear dimension that is 15% or less of the wavelength of the light.

Abstract: The present invention discloses a mask including: a first region near a corner of a feature, the first region including a first element, the first element being transparent to a light, the first element having a side that is smaller than a wavelength of said light; a second region near the corner of the feature, the second region including a second element, the second element being transparent to the light, the second element having a side that is smaller than the wavelength of the light; and a third region near the corner of the feature, the third region including a third element, the third element being opaque to the light, the third element having a side that is smaller than the wavelength of the light.

Abstract: Methods for etching devices used for lithography. In one aspect, a method includes etching, in a single etch, a first region and a second region on a substrate. The first region is to attenuate an intensity of the zero diffraction order of a radiation for patterning of a microelectronic device to a first extent. The second region is to attenuate the intensity of the zero diffraction order of the radiation to a second extent. The second extent being sufficiently different from the first extent to improve a quality of the patterned microelectronic device.

Abstract: The present invention discloses a mask including: a first region near a corner of a feature, the first region including a first element, the first element being transparent to a light, the first element having a side that is smaller than a wavelength of said light; a second region near the corner of the feature, the second region including a second element, the second element being transparent to the light, the second element having a side that is smaller than the wavelength of the light; and a third region near the corner of the feature, the third region including a third element, the third element being opaque to the light, the third element having a side that is smaller than the wavelength of the light.

Abstract: The present invention discloses a method of designing a set of two tiled masks, as well as, a mask including: a first tile, the first tile being transparent to a light, the first tile having a first characteristic linear dimension that is 15% or less of a wavelength of the light; a second tile, the second tile being transparent to the light, the second tile having a second characteristic linear dimension that is 15% or less of the wavelength of the light; and a third tile, the third tile being opaque to the light, the third tile having a third characteristic linear dimension that is 15% or less of the wavelength of the light.

Abstract: The present invention discloses a mask including: a first region near a corner of a feature, the first region including a first element, the first element being transparent to a light, the first element having a side that is smaller than a wavelength of said light; a second region near the corner of the feature, the second region including a second element, the second element being transparent to the light, the second element having a side that is smaller than the wavelength of the light; and a third region near the corner of the feature, the third region including a third element, the third element being opaque to the light, the third element having a side that is smaller than the wavelength of the light.

Abstract: The present invention discloses a method of designing a set of two tiled masks, as well as, a mask including: a first tile, the first tile being transparent to a light, the first tile having a first characteristic linear dimension that is 15% or less of a wavelength of the light; a second tile, the second tile being transparent to the light, the second tile having a second characteristic linear dimension that is 15% or less of the wavelength of the light; and a third tile, the third tile being opaque to the light, the third tile having a third characteristic linear dimension that is 15% or less of the wavelength of the light.

Abstract: The present invention discloses a method of designing a set of two tiled masks, as well as, a mask including: a first tile, the first tile being transparent to a light, the first tile having a first characteristic linear dimension that is 15% or less of a wavelength of the light; a second tile, the second tile being transparent to the light, the second tile having a second characteristic linear dimension that is 15% or less of the wavelength of the light; and a third tile, the third tile being opaque to the light, the third tile having a third characteristic linear dimension that is 15% or less of the wavelength of the light.