Patents by Inventor Yan A. Borodovsky

Yan A. Borodovsky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6021009
    Abstract: A technique for improving across field dimensional control in a microlithography tool. In a lithography imaging process in which a pattern on a mask is projected to form latent images in a photosensitive medium, the critical dimension distribution across the imaging field varies due to scattering and other factors. An optical compensator having gradient neutral density filter properties is used to reduce the intensity of light at those locations corresponding to regions of an imaging field having higher exposure dose. By reducing the intensity of light at the higher dose regions, the overall dose profile is made more uniform, which reduces linewidth variations when devices are fabricated on an semiconductor wafer.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: February 1, 2000
    Assignee: Intel Corporation
    Inventors: Yan Borodovsky, Patrick M. Troccolo
  • Patent number: 5946079
    Abstract: A method for mapping coherence and a method and system for reducing varying coherence conditions of a stepper field exposure tool used in lithographic patterning. The present invention describes a method and system to reduce the effective light source of a stepper field exposure tool in order to decrease the variance of coherence conditions across a stepper field. The decrease in variance of coherence conditions across the stepper field corrects for a wide range of linewidth variation in lithographic patterning.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: August 31, 1999
    Assignee: Intel Corporation
    Inventor: Yan Borodovsky
  • Patent number: 5840448
    Abstract: A reticle having only one phase delay value for a given wavelength of incident radiation. The reticle includes a first and second region, both transparent to incident radiation. The second region being adjacent to said first region. The incident radiation transmitted by the second region has a phase delay of other than an integer multiple of 90 degrees relative to said incident radiation transmitted by the first region.
    Type: Grant
    Filed: December 31, 1996
    Date of Patent: November 24, 1998
    Assignee: Intel Corporation
    Inventors: Yan Borodovsky, Vivek Singh
  • Patent number: 5801821
    Abstract: A method for mapping coherence and a method and system for reducing varying coherence conditions of a stepper field exposure tool used in lithographic patterning. The present invention describes a method and system to reduce the effective light source of a stepper field exposure tool in order to decrease the variance of coherence conditions across a stepper field. The decrease in variance of coherence conditions across the stepper field corrects for a wide range of linewidth variation in lithographic patterning.
    Type: Grant
    Filed: June 30, 1995
    Date of Patent: September 1, 1998
    Assignee: Intel Corporation
    Inventor: Yan Borodovsky
  • Patent number: 5532090
    Abstract: An enhanced method and apparatus for forming openings in a photosensitive layer. Using a standard microlithographic printer such as stepper or scan and step system, an unpatterned photosensitive layer is exposed to a first mask having an opening pattern with dimensions within tight (for a given technology generation) process tolerances. Next, prior to development, the photosensitive layer is exposed to a second mask having a grid of clear spaces, surrounding the opening pattern. The combined exposure to the first and second mask forms a latent image of a reduced dimension opening. By the use of two exposures, with the exposure dose for each designed such that intensity profile is easily controllable in the presence of uncontrollable equipment imperfections and process variations, a reduced dimension opening can be formed in a highly manufacturable process with opening sizes smaller than that achievable through conventional lithographic techniques.
    Type: Grant
    Filed: March 1, 1995
    Date of Patent: July 2, 1996
    Assignee: Intel Corporation
    Inventor: Yan A. Borodovsky
  • Patent number: 5498579
    Abstract: A method of enhancing the lithographic resolution of randomly laid out isolated structures is disclosed. A first mask comprises an active layer with isolated features such as gates. Portions of the active layer have a reduced dimension typical of periodic structures. The first mask additionally has complementary features provided along side the reduced active features to provide periodicity. In this way, the resolution of the lithographic process is enhanced, and other enhanced resolution technologies additionally can be used to best advantage to form a patterned photosensitive layer having isolated features of reduced width. The photosensitive layer is then exposed to a second mask which exposes the complementary features so that they are removed from the latent image in the photosensitive layer. This second exposure also further improves resolution by enhancing the contrast between exposed and unexposed regions.
    Type: Grant
    Filed: June 8, 1994
    Date of Patent: March 12, 1996
    Assignee: Intel Corporation
    Inventors: Yan A. Borodovsky, Ananda G. Sarangi
  • Patent number: 5424154
    Abstract: A method of enhancing the lithographic resolution of randomly laid out isolated structures is disclosed. A first mask comprises an active layer with isolated features such as gates. Portions of the active layer have a reduced dimension typical of periodic structures. The first mask additionally has complementary features provided along side the reduced active features to provide periodicity. In this way, the resolution of the lithographic process is enhanced, and other enhanced resolution technologies additionally can be used to best advantage to form a patterned photosensitive layer having isolated features of reduced width. The photosensitive layer is then exposed to a second mask which exposes the complementary features so that they are removed from the latent image in the photosensitive layer. This second exposure also further improves resolution by enhancing the contrast between exposed and unexposed regions.
    Type: Grant
    Filed: December 10, 1993
    Date of Patent: June 13, 1995
    Assignee: Intel Corporation
    Inventor: Yan A. Borodovsky
  • Patent number: 4767215
    Abstract: A beam of light, such as a laser, is used to scan across a lens. The beam passing through the lens is modulated by an optical encoder which controls the amount of the beam passing through the encoder to a light receptor. The received light is quantified and processed to determine any distortion caused by the lens. The encoder is comprised of a set of transparent windows upon an opaque face, the windows having a certain pattern that a beam travelling across the windows casts a specific light intensity pattern. The encoder also allows determination of astigmatism of the lens and distortion inherent in the beam itself.
    Type: Grant
    Filed: June 9, 1986
    Date of Patent: August 30, 1988
    Assignee: Ateoq Corporation
    Inventor: Yan Borodovsky
  • Patent number: 4672420
    Abstract: An improved integrated circuit structure, and method of making the structure, is disclosed wherein at least one metallization layer is coated during production of the structure with a conductive layer capable of withstanding metal removal means, and an upper metallization layer is subsequently applied to the structure. At least a portion of the subsequent metallization layer is in ohmic contact with the conductive layer and the lower metallization layer is protected by the intervening conductive layer during subsequent removal of the upper metallization layer if subsequent reworking of the structure becomes necessary. In a preferred embodiment, the use of the conductive layer over a metallization layer further enhances the construction process during patterning of a photoresist applied over the conductive layer by the use of a conductive material having antireflective properties.
    Type: Grant
    Filed: April 12, 1985
    Date of Patent: June 9, 1987
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Yan Borodovsky, Mammen Thomas, Danny Ma
  • Patent number: 4580332
    Abstract: An improved integrated circuit structure, and method of making the structure, is disclosed wherein at least one metallization layer is coated with a conductive indium arsenide layer during production of the structure and an upper metallization layer subsequently is applied to the structure wherein at least a portion of the subsequent metallization layer is in ohmic contact with the conductive indium arsenide layer whereby the lower metallization layer is protected by the intervening indium arsenide layer during subsequent removal of the upper metallization layer if subsequent reworking of the structure becomes necessary. The use of the indium arsenide layer over a metallization layer further enhances the construction process by the use of its antireflective properties during patterning of a photoresist applied over the indium arsenide layer.
    Type: Grant
    Filed: March 26, 1984
    Date of Patent: April 8, 1986
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Yan A. Borodovsky
  • Patent number: 4529685
    Abstract: An improved method for making an integrated circuit device is disclosed which comprises coating a reflective layer with an antireflective coating comprising a layer of indium arsenide before applying a layer of photosensitive material or photoresist during production of the device. Light passing through the photosensitive material is absorbed by the antireflective coating so that only the minor amount of light required for alignment is reflected back through the photosensitive material resulting in sharper pattern definition in the photoresistive material and better process control overall. The antireflective indium arsenide layer is applied in a thickness of at least 500 angstroms and is further characterized by an 10 to 25% reflectivity relatively independent of coating thickness and wave length of light in the frequency range normally used to expose photoresist material.
    Type: Grant
    Filed: March 2, 1984
    Date of Patent: July 16, 1985
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Yan A. Borodovsky