Patents by Inventor Yasushi Mizusawa

Yasushi Mizusawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090183984
    Abstract: The invention is related to A seed film forming method capable of forming a seed film in recesses without forming overhangs. The seed film forming method of depositing a seed film for plating includes the steps of: producing metal ions by ionizing a metal target with a plasma in a processing vessel that can be evacuated; and depositing a metal film on a surface provided with recesses of a workpiece mounted on a stage placed in the processing vessel by supplying bias power to the workpiece to attract the metal ions to the workpiece; wherein a film deposition step of depositing the metal film by using the bias power determined so that the metal film deposited on the surface of the workpiece may not be sputtered, and a film deposition interrupting step of interrupting the deposition of the metal film by stopping producing the metal ions are repeated alternately by a number of cycles.
    Type: Application
    Filed: January 26, 2007
    Publication date: July 23, 2009
    Inventors: Takashi Sakuma, Taro Ikeda, Osamu Yokoyama, Tsukasa Matsuda, Tatsuo Hatano, Yasushi Mizusawa
  • Publication number: 20090087583
    Abstract: An object to be processed (e.g., semiconductor wafer W) having a recess formed in a surface thereof is placed on a stage 34 disposed in a processing vessel 24 capable of being vacuumized. Thereafter, a plasma is generated in the processing vessel 24, so that a metal target 70 is ionized by the plasma to generate metal ions in the processing vessel 24. Then, a thin film is deposited on the surface of the object to be processed including a surface in the recess, by supplying a bias power to the stage 34 so as to draw the metal ions into the object to be processed placed on the stage 34 by the supplied bias power. In the present invention, a wattage of the bias power is varied within a range in which the surface of the object to be processed is not substantially sputtered.
    Type: Application
    Filed: April 10, 2007
    Publication date: April 2, 2009
    Inventors: Takashi Sakuma, Osamu Yokoyama, Taro Ikeda, Tatsuo Hatano, Yasushi Mizusawa
  • Publication number: 20090041950
    Abstract: Embodiments of a method and system for improving the consistency of a layer or a plurality of layers with a desired profile in a deposition system are generally described herein. Other embodiments may be described and claimed.
    Type: Application
    Filed: August 7, 2007
    Publication date: February 12, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: SHIGERU MIZUNO, TAKASHI SAKUMA, YASUSHI MIZUSAWA
  • Publication number: 20080237859
    Abstract: An interconnect structure for an integrated circuit and method of forming the interconnect structure. The method includes depositing a metallic layer containing a reactive metal in an interconnect opening formed within a dielectric material containing a dielectric reactant element, thermally reacting at least a portion of the metallic layer with at least a portion of the dielectric material to form a diffusion barrier primarily containing a compound of the reactive metal from the metallic layer and the dielectric reactant element from the dielectric material, and filling the interconnect opening with Cu metal, where the diffusion barrier surrounds the Cu metal within the opening. The reactive metal can be Co, Ru, Mo, W, or Ir, or a combination thereof. The interconnect opening can be a trench, a via, or a dual damascene opening.
    Type: Application
    Filed: March 26, 2007
    Publication date: October 2, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Tadahiro Ishizaka, Satohiko Hoshino, Kuzuhiro Hamamoto, Shigeru Mizuno, Yasushi Mizusawa
  • Publication number: 20080200002
    Abstract: A method for generating metal ions by sputtering a metal target (56) by plasma, attracting the metal ions by bias power to a target object S which is to be processed and is mounted on a mounting table (20) in a processing vessel, and depositing a metal film (74) on the target object having a recess (2) thus filling the recess. The bias power is set to realize such a state as the metal deposition rate by attraction of metal ions is substantially balanced with the etching rate of plasma sputter etching on the surface of the target object. Consequently, the recess in the target object can be filled with metal without causing such a defect as void.
    Type: Application
    Filed: October 18, 2005
    Publication date: August 21, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kenji Suzuki, Taro Ikeda, Tatsuo Hatano, Yasushi Mizusawa
  • Publication number: 20080075835
    Abstract: A method and system are provided for integrated substrate processing in Cu metallization. The method includes providing a substrate in a vacuum processing tool containing a plurality of processing systems configured to process the substrate and a substrate transfer system configured to transfer the substrate under vacuum conditions between the plurality of processing systems, and performing an integrated deposition process on the substrate. The plurality of processing systems and the substrate transfer system maintain a base pressure of background gases at 6.8×10?8 Torr or lower, preferably 5×10?8 Torr or lower, during the integrated deposition process. According to one embodiment, the integrated process includes depositing a barrier metal layer on the substrate, and depositing a Cu layer on the barrier metal layer. According to another embodiment, the integrated process further includes depositing a depositing a Ru layer on the barrier metal layer, and depositing a Cu layer on the Ru layer.
    Type: Application
    Filed: September 26, 2006
    Publication date: March 27, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Tadahiro Ishizaka, Masamichi Hara, Yasushi Mizusawa
  • Publication number: 20070234955
    Abstract: A method and apparatus is described for reducing CO poisoning of a thin metal film formed on a substrate using a metal carbonyl precursor. The thin metal film is formed on the substrate resting on a substrate holder in a thin film deposition system. The substrate holder comprises a shield ring positioned on a peripheral edge of the substrate holder and configured to surround the peripheral edge of the substrate, whereby the shield ring reduces the production of CO by-products at the peripheral edge of the substrate.
    Type: Application
    Filed: March 29, 2006
    Publication date: October 11, 2007
    Applicant: Tokyo Electron Limited
    Inventors: Kenji Suzuki, Atsushi Gomi, Masamichi Hara, Yasushi Mizusawa
  • Publication number: 20070215048
    Abstract: A method and system is described for reducing particle contamination of a substrate in a deposition system. The deposition system comprises one or more particle diffusers disposed therein and configured to prevent or partially prevent the passage of film precursor particles, or break-up or partially break-up film precursor particles. The particle diffuser may be installed in the film precursor evaporation system, or the vapor delivery system, or the vapor distribution system, or two or more thereof.
    Type: Application
    Filed: March 16, 2006
    Publication date: September 20, 2007
    Inventors: Kenji Suzuki, Atsushi Gomi, Masamichi Hara, Yasushi Mizusawa
  • Publication number: 20070218200
    Abstract: A method and system is described for reducing particle contamination in a vapor distribution system. The vapor distribution system comprises a housing and a vapor distribution head comprising a plurality of openings configured to introduce a film precursor vapor to a deposition system. The housing and vapor distribution head define a plenum coupled to a film precursor evaporation system, and configured to receive the film precursor vapor from the evaporation system and distribute the film precursor vapor within the deposition system through the plurality of openings. In order to reduce particle contamination, the vapor distribution system is designed to reduce the difference, or ratio, between the pressure in the plenum and the pressure in the deposition system. For example, the plenum pressure can be less than twice the pressure in the process space, or can be less than 50 mTorr, 30 mTorr or even 20 mTorr than the pressure in the process space.
    Type: Application
    Filed: March 16, 2006
    Publication date: September 20, 2007
    Inventors: Kenji Suzuki, Atsushi Gomi, Masamichi Hara, Yasushi Mizusawa
  • Publication number: 20070218683
    Abstract: A method for forming a modified TaC or TaCN film that may be utilized as a barrier film for Cu metallization. The method includes disposing a substrate in a process chamber of a plasma enhanced atomic layer deposition (PEALD) system configured to perform a PEALD process, depositing a TaC or TaCN film on the substrate using the PEALD process, and modifying the deposited TaC or TaCN film by exposing the deposited TaC or TaCN film to plasma excited hydrogen or atomic hydrogen or a combination thereof in order to remove carbon from at least the plasma exposed portion of the deposited TaCN film. The method further includes forming a metal film on the modified TaCN film, where the modified TaCN film provides stronger adhesion to the metal film than the deposited TaCN film. According to one embodiment, a TaCN film is deposited from alternating exposures of TAIMATA and plasma excited hydrogen.
    Type: Application
    Filed: March 20, 2006
    Publication date: September 20, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Tadahiro Ishizaka, Tsukasa Matsuda, Masamichi Hara, Jacques Faguet, Yasushi Mizusawa
  • Publication number: 20070116873
    Abstract: A method, computer readable medium, and system for vapor deposition on a substrate that maintain a first assembly of the vapor deposition system at a first temperature, maintain a second assembly of the vapor deposition system at a reduced temperature lower than the first temperature, dispose the substrate in a process space of the first assembly that is vacuum isolated from a transfer space in the second assembly, and deposit a material on the substrate. As such, the system includes a first assembly having a process space configured to facilitate material deposition, a second assembly coupled to the first assembly and having a transfer space to facilitate transfer of the substrate into and out of the deposition system, a substrate stage connected to the second assembly and configured to support the substrate, and a sealing assembly configured to separate the process space from the transfer space.
    Type: Application
    Filed: November 18, 2005
    Publication date: May 24, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yicheng Li, Tadahiro Ishizaka, Kaoru Yamamoto, Atsushi Gomi, Masamichi Hara, Toshiaki Fujisato, Jacques Faguet, Yasushi Mizusawa
  • Publication number: 20070116872
    Abstract: A method, computer readable medium, and system for vapor deposition on a substrate that disposes a substrate in a process space of a processing system that is vacuum isolated from a transfer space of the processing system, processes the substrate at either of a first position or a second position in the process space while maintaining vacuum isolation from the transfer space, and deposits a material on said substrate at either the first position or the second position. As such, the system includes a first assembly having a process space configured to facilitate material deposition, a second assembly coupled to the first assembly and having a transfer space to facilitate transfer of the substrate into and out of the deposition system, a substrate stage connected to the second assembly and configured to support and translate the substrate between a first position in the transfer space to a second position in the process space.
    Type: Application
    Filed: November 18, 2005
    Publication date: May 24, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yicheng Li, Tadahiro Ishizaka, Kaoru Yamamoto, Atsushi Gomi, Masamichi Hara, Toshiaki Fujisato, Jacques Faguet, Yasushi Mizusawa
  • Patent number: 6451682
    Abstract: This invention provides a filming method for covering the surface of the insulating film of a semiconductor substrate with a copper interconnect film free from pores. The surface of the insulating film 2 of a semiconductor substrate 1 is filmed with a copper or copper alloy 3 by any one of plating, CVD and PVD, and the whole body is then heated under a high-pressure gas atmosphere to cover the surface with an interconnect film 4 free from pores.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: September 17, 2002
    Assignee: Ulvac, Inc.
    Inventors: Takao Fujikawa, Makoto Kadoguchi, Kohei Suzuki, Yasushi Mizusawa, Tomoyasu Kondou, Yoji Taguchi
  • Patent number: 6299739
    Abstract: This invention provides a method of forming a metal wiring film excellent in EM resistance and low electric resistance. In a method of forming a wiring structure by filming and covering the surface of the insulating film of a substrate to be treated having a hole or groove formed thereon with a metallic material such as copper, aluminum, silver or the like, thereby filling the hole or groove inner part with the metallic material to form a wiring structure, the substrate to be treated is exposed to a high temperature under a high-pressure gas atmosphere after the continuous filming and covering with the metallic material along the inner surface profile of the hole or groove, whereby the surface diffusion phenomenon of the metallic material is promoted to reform the metal film into a film structure as the surface area of the metal film is minimized.
    Type: Grant
    Filed: April 20, 1999
    Date of Patent: October 9, 2001
    Assignee: Kabushiki Kaisha Kobe Seiko Sho
    Inventors: Takao Fujikawa, Takahiko Ishii, Yutaka Narukawa, Makoto Kadoguchi, Yasushi Mizusawa, Tomoyasu Kondou, Yuji Taguchi