Patents by Inventor Yi-Hsiang Huang

Yi-Hsiang Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10510976
    Abstract: A light-emitting apparatus including a light-emitting device, a light-guiding structure and a light output structure is provided. The light-emitting device includes a light-emitting layer. The light-guiding structure is configured to guide light emitted from the light-emitting layer. The light-guiding structure is disposed beside the light-emitting device and a refractive index of the light-guiding structure is greater than or equal to an average refractive index of the light-emitting device. The light output structure is configured to receive the light guided by the light-guiding structure to output the light out of the light-emitting apparatus.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: December 17, 2019
    Assignees: Industrial Technology Research Institute, Intellectual Property Innovation Corporation
    Inventors: Yi-Hsiang Huang, Yu-Tang Tsai, Kuan-Ting Chen
  • Publication number: 20190164266
    Abstract: An image information display method, an image information display system and a display. The method includes: capturing a background image of the display; obtaining an object according the background image; capturing a relative movement information between a first user and the object; capturing a visual information corresponding to the first user; determining whether a reading comfort degree corresponding to the object meets a predetermined condition according to the relative movement information and the visual information; displaying a dynamic information corresponding to the object by the display when the reading comfort degree meets the predetermined condition; and not displaying the dynamic information corresponding to the object by the display when the reading comfort degree does not meet the predetermined condition.
    Type: Application
    Filed: September 25, 2018
    Publication date: May 30, 2019
    Applicants: Industrial Technology Research Institute, Intellectual Property Innovation Corporation
    Inventors: Shin-Hong Kuo, Kuan-Ting Chen, Yu-Hsin Lin, Yi-Shou Tsai, Yu-Hsiang Tsai, Yi-Hsiang Huang
  • Patent number: 10276761
    Abstract: A photoelectric device package including a substrate, a first circuit layer, a carrier structure, a second circuit layer, at least one photoelectric device, and a first encapsulation layer is provided. The first circuit layer is disposed on the substrate. The carrier structure is disposed on the substrate and covers the first circuit layer. The carrier structure includes a first dielectric layer, a second dielectric layer, and an elastic layer disposed between the first dielectric layer and the second dielectric layer. The Young's modulus of the elastic layer is less than the Young's modulus of the first dielectric layer and the second dielectric layer. The second circuit layer is disposed on the carrier structure. The photoelectric device is disposed on the carrier structure and is electrically connected to the first and second circuit layers. The first encapsulation layer is disposed on the carrier structure and encapsulates the photoelectric device.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: April 30, 2019
    Assignees: Industrial Technology Research Institute, Intellectual Property Innovation Corporation
    Inventors: Yi-Hsiang Huang, Cheng-Chung Lee, Jia-Chong Ho, Wei-Han Chen, Shin-Hong Kuo
  • Publication number: 20190088900
    Abstract: A light emitting device and a transparent electrode thereof are provided in which the transparent electrode includes a transparent conducting layer and an injection layer. The injection layer is disposed between the transparent conducting layer and a light emitting layer of the light emitting device, wherein a material of the injection layer is a metal-doped alkali metal salt or a metal-doped metal oxide.
    Type: Application
    Filed: December 20, 2017
    Publication date: March 21, 2019
    Applicants: Industrial Technology Research Institute, Intellectual Property Innovation Corporation
    Inventors: Yi-Hsiang Huang, Kuan-Ting Chen, Yu-Tang Tsai, Yu-Hsiang Tsai, Wei-Lung Tsai, Yu-Yu Ho
  • Publication number: 20180351056
    Abstract: A photoelectric device package including a substrate, a first circuit layer, a carrier structure, a second circuit layer, at least one photoelectric device, and a first encapsulation layer is provided. The first circuit layer is disposed on the substrate. The carrier structure is disposed on the substrate and covers the first circuit layer. The carrier structure includes a first dielectric layer, a second dielectric layer, and an elastic layer disposed between the first dielectric layer and the second dielectric layer. The Young's modulus of the elastic layer is less than the Young's modulus of the first dielectric layer and the second dielectric layer. The second circuit layer is disposed on the carrier structure. The photoelectric device is disposed on the carrier structure and is electrically connected to the first and second circuit layers. The first encapsulation layer is disposed on the carrier structure and encapsulates the photoelectric device.
    Type: Application
    Filed: April 12, 2018
    Publication date: December 6, 2018
    Applicants: Industrial Technology Research Institute, Intellectual Property Innovation Corporation
    Inventors: Yi-Hsiang Huang, Cheng-Chung Lee, Jia-Chong Ho, Wei-Han Chen, Shin-Hong Kuo
  • Publication number: 20180175326
    Abstract: A light emitting device includes a first electrode, a second electrode, an organic layer and a conductive layer. The organic layer is disposed between the first electrode and the second electrode. The conductive layer is disposed between the organic layer and the first electrode. A refractive index of the conductive layer is lower than a refractive index of the organic layer in a visible light wavelength, so that an energy radiated by a light emitted by the organic layer through the first electrode is less than an energy radiated by the light emitted by the organic layer through the second electrode.
    Type: Application
    Filed: March 21, 2017
    Publication date: June 21, 2018
    Applicant: Industrial Technology Research Institute
    Inventors: Yi-Hsiang Huang, Yu-Tang Tsai, Kuan-Ting Chen
  • Publication number: 20180149944
    Abstract: A display panel including a substrate, a display device, a dielectric layer, and an optical resonance structure is provided. The substrate has a layout area and a light transmitting area located outside the layout area. The display device is disposed on the layout area of the substrate. The display device includes a first display electrode, a second display electrode, and a display media layer deposited between the first display electrode and the second display electrode. The dielectric layer is disposed on the substrate and covers the display device. The optical resonance structure is disposed on the dielectric layer and distributed correspondingly to the display device. The optical resonance structure includes a first transflective layer and a second transflective layer stacked on the display device and separated from each other.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 31, 2018
    Applicants: Industrial Technology Research Institute, Intellectual Property Innovation Corporation
    Inventors: Chih-Chia Chang, Yi-Hsiang Huang, Kai-Ming Chang, Kuan-Ting Chen
  • Publication number: 20180151826
    Abstract: A light-emitting apparatus including a light-emitting device, a light-guiding structure and a light output structure is provided. The light-emitting device includes a light-emitting layer. The light-guiding structure is configured to guide light emitted from the light-emitting layer. The light-guiding structure is disposed beside the light-emitting device and a refractive index of the light-guiding structure is greater than or equal to an average refractive index of the light-emitting device. The light output structure is configured to receive the light guided by the light-guiding structure to output the light out of the light-emitting apparatus.
    Type: Application
    Filed: November 30, 2017
    Publication date: May 31, 2018
    Applicants: Industrial Technology Research Institute, Intellectual Property Innovation Corporation
    Inventors: Yi-Hsiang Huang, Yu-Tang Tsai, Kuan-Ting Chen
  • Patent number: 9837637
    Abstract: An electroluminescent (EL) device is disclosed, comprising a first electrode, a second electrode, one or more functional layers, and a conducting layer. The first electrode is transparent and with a high refractive index nH more than 1.75. The one or more functional layers include a light emitting layer. The conducting layer has a low refractive index nL less than 1.65, being disposed between the first electrode and the one or more functional layers. By judicious combination of the first electrode and conducting layer to induce appropriate microcavity effects, increased coupling efficiencies of EL device could be then obtained.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: December 5, 2017
    Assignee: NATIONAL TAIWAN UNIVERSITY
    Inventors: Chung-Chih Wu, Yi-Hsiang Huang, Wei-Lung Tsai, Min Jiao, Wei-Kai Lee
  • Patent number: 9710374
    Abstract: A data writing method, a memory controller, and a memory storage device are provided. The method is applied to control a rewritable non-volatile memory module that includes two memory units. The method includes: configuring a plurality of logical addresses and mapping the logical addresses to at least parts of physical erasing units in the two memory units; receiving a writing command from a host system to instruct to write data into one of the logical addresses; writing the data into a physical erasing unit in the two memory units; determining one of the memory units where the physical erasing unit belongs to; if the physical erasing unit belongs to one of the memory units, erasing another physical erasing unit in the other memory unit while writing the data into the physical erasing unit. Accordingly, a speed of writing data into the memory storage device by the host system is accelerated.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 18, 2017
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Yi-Hsiang Huang
  • Patent number: 9501397
    Abstract: A data writing method and a memory controller and a memory storage apparatus using the same are provided. The data writing method includes grouping a plurality of physical blocks into a plurality of physical units, grouping the physical units into at least a data area and a free area, and configuring a plurality of logical units for mapping to the physical units of the data area. The data writing method also includes getting a physical unit from the free area, writing data in at least one of the logical units into the gotten physical unit, and writing an end mark into the gotten physical unit, and in the gotten physical unit, the end mark follows the data belonging to the at least one logical unit. Thereby, the storage space of each physical unit can be effectively used, and the lifespan of the memory storage apparatus can be prolonged.
    Type: Grant
    Filed: November 26, 2010
    Date of Patent: November 22, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Yi-Hsiang Huang
  • Patent number: 9442834
    Abstract: A data management method for a rewritable non-volatile memory module including a first memory unit and a second memory unit is provided. The method includes: grouping erasing units of the first memory unit into a data area and a spare area; and grouping the physical erasing units of the second memory unit into a data backup area and a command recording area; configuring multiple logical addresses to map to the physical erasing units associated with the data area; receiving a write command which instructs writing data; writing the data to a physical erasing unit associated with the spare area, and writing the data to a physical erasing unit associated with the data backup area; recording at least a portion of the write command in a physical erasing unit associated with the command recording area. Accordingly, data is backuped in the rewritable non-volatile memory module.
    Type: Grant
    Filed: October 2, 2012
    Date of Patent: September 13, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Yi-Hsiang Huang, Chao-Ming Chan
  • Patent number: 9394352
    Abstract: POTE has recently been identified as a tumor antigen expressed in a variety of human cancers, including colon, ovarian, breast, prostate, lung and pancreatic cancer. Described herein are immunogenic POTE polypeptides, including modified POTE polypeptides, that bind MHC class I molecules. The immunogenic POTE polypeptides are capable of inducing an immune response against POTE-expressing tumor cells. Thus, provided herein is a method of eliciting an immune response in a subject, such as a subject having a type of cancer that expresses POTE.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: July 19, 2016
    Assignee: The United States of America, as represented by the Secretary, Department of Health and Human Services
    Inventors: Jay A. Berzofsky, Yi-Hsiang Huang, Masaki Terabe, Ira H. Pastan
  • Patent number: 9378130
    Abstract: A data writing method for a rewritable non-volatile memory module, and a memory controller and a memory storage apparatus using the same are provided. The method includes partitioning physical blocks of the rewritable non-volatile memory module into a data area and a spare area and configuring logical blocks. The method also includes selecting physical blocks from the spare area as spare physical blocks corresponding to a logical block and using only lower physical pages of the spare physical blocks to store updated data that is to be written into the logical block. The method further includes moving valid data of all logical pages of the logical block into a physical block of the data area, wherein each lower physical page and an upper physical page corresponding thereto in the physical block are programmed together. Accordingly, the method can effectively improve the speed and reliability of writing data.
    Type: Grant
    Filed: February 4, 2012
    Date of Patent: June 28, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Chung-Lin Wu, Yi-Hsiang Huang
  • Publication number: 20160128613
    Abstract: A body information sensing device for obtaining body information of a user. The body information sensing device includes a housing, a sensing module and a processing module. The housing is detachably disposed at the outer surface of a daily necessity. The sensing module is disposed at the outer surface of the housing, wherein the sensing module is for sensing the body information of the user. The processing module is disposed at the housing, and the sensing module is electrically connected with the processing module.
    Type: Application
    Filed: November 4, 2015
    Publication date: May 12, 2016
    Inventors: HSIN-TSUNG TUNG, YI-HSIANG HUANG
  • Publication number: 20160111673
    Abstract: An electroluminescent (EL) device is disclosed, comprising a first electrode, a second electrode, one or more functional layers, and a conducting layer. The first electrode is transparent and with a high refractive index nH more than 1.75. The one or more functional layers include a light emitting layer. The conducting layer has a low refractive index nL less than 1.65, being disposed between the first electrode and the one or more functional layers. By judicious combination of the first electrode and conducting layer to induce appropriate microcavity effects, increased coupling efficiencies of EL device could be then obtained.
    Type: Application
    Filed: October 15, 2015
    Publication date: April 21, 2016
    Inventors: CHUNG-CHIH WU, YI-HSIANG HUANG, WEI-LUNG TSAI, MIN JIAO, WEI-KAI LEE
  • Patent number: 9176865
    Abstract: A data writing method for controlling a rewritable non-volatile memory module having physical erasing units is provided. The physical erasing units are grouped into a first buffer area and a second buffer area. A write command instructed to write a data to a first logical address is received. Whether the quantity of the data is smaller than a predetermined value is determined. If so, the data is written into the first buffer area or the second buffer area. If the data is written into the second buffer area, at least one second logical address mapped to at least one physical programing unit in the first buffer area is obtained, and valid data belonging to the second logical address is merged, wherein the number of the second logical address is smaller than a merging threshold. Thereby, the time for a host system to wait for a write success message is shortened.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: November 3, 2015
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Yi-Hsiang Huang
  • Patent number: 9146691
    Abstract: A method for managing commands in a command queue, a memory controller, and a memory storage apparatus are provided. The method includes: storing at least one first command in a command queue register according to a plurality of first indication bits and updating the first indication bits according to a current storage status of the command queue register; generating a plurality of updated second indication bits according to the updated first indication bits and a plurality of second indication bits. The method also includes: obtaining at least one first command index corresponding to at least one register block storing the at least one first command in the command queue register according to the updated second indication bits and adding the at least one first command index into a command index register; executing commands corresponding to un-executed command indices in the command queue register.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: September 29, 2015
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Yi-Hsiang Huang, Chao-Ming Chan
  • Patent number: 9128624
    Abstract: A flash memory storage system including a flash memory chip, a connector, and a controller is provided. The flash memory chip has a plurality of physical blocks. The connector is configured to couple to a host system. The controller is coupled to the flash memory chip and the connector. The controller configures a plurality of logical blocks and maps the logical blocks to a portion of the physical blocks. In addition, the controller identifies rewritable disc commands from the host system and writes data from the host system into the physical blocks mapped to the logical blocks according to the rewritable disc commands. Thereby, a rewritable disc device is simulated by using the flash memory storage system.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: September 8, 2015
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Hon-Wai Ng, Yi-Hsiang Huang, Shih-Hsien Hsu, Hsiang-Hsiung Yu
  • Publication number: 20150010590
    Abstract: POTE has recently been identified as a tumor antigen expressed in a variety of human cancers, including colon, ovarian, breast, prostate, lung and pancreatic cancer. Described herein are immunogenic POTE polypeptides, including modified POTE polypeptides, that bind MHC class I molecules. The immunogenic POTE polypeptides are capable of inducing an immune response against POTE-expressing tumor cells. Thus, provided herein is a method of eliciting an immune response in a subject, such as a subject having a type of cancer that expresses POTE.
    Type: Application
    Filed: September 25, 2014
    Publication date: January 8, 2015
    Inventors: Jay A. Berzofsky, Yi-Hsiang Huang, Masaki Terabe, Ira H. Pastan