Patents by Inventor Yoshihiro Sato
Yoshihiro Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9881967Abstract: An imaging device includes a unit pixel cell including: a semiconductor substrate including a first region exposed to a surface of the semiconductor substrate in a first area, and a second region directly adjacent to the first region and exposed to the surface in a second area; a photoelectric converter; a contact plug connected to the second region; a first transistor including the second region as one of a source and a drain, a first electrode covering a first portion of the first area, and a first insulation layer between the first electrode and the semiconductor substrate; a second electrode covering a second portion of the first area; and a second insulation layer between the second electrode and the semiconductor substrate. When seen in a direction perpendicular to the surface, a contact between the second region and the contact plug is located between the first electrode and the second electrode.Type: GrantFiled: January 27, 2017Date of Patent: January 30, 2018Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Yoshihiro Sato, Junji Hirase
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Patent number: 9881960Abstract: Each unit pixel includes a photoelectric converter, an n-type impurity region forming an accumulation diode together with the semiconductor region, the accumulation diode accumulating a signal charge generated by the photoelectric converter, an amplifier transistor including a gate electrode electrically connected to the impurity region, and an isolation region formed around the amplifier transistor and implanted with p-type impurities. The amplifier transistor includes an n-type source/drain region formed between the gate electrode and the isolation region, and a channel region formed under the gate electrode. A gap in the isolation region is, in a gate width direction, wider at a portion including the channel region than at a portion including the source/drain region.Type: GrantFiled: November 28, 2014Date of Patent: January 30, 2018Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Yoshihiro Sato, Ryohei Miyagawa, Tokuhiko Tamaki, Junji Hirase, Yoshiyuki Ohmori, Yoshiyuki Matsunaga
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Publication number: 20180022926Abstract: Provided is a method for easily producing an oxidized carbon black aqueous dispersion that can highly remove multivalent metal ions and exhibit excellent dispersion stability. A method for producing an oxidized carbon black aqueous dispersion by successively performing on an aqueous slurry of oxidized carbon black having one or more anionic functional groups on a surface thereof a neutralization step of mixing an alkali metal hydroxide and performing heating/neutralization in the presence of one or more selected from a water-soluble chelating agent and a salt thereof or after mixing an alkali metal hydroxide and performing heating/neutralization, mixing one or more selected from a water-soluble chelating agent and a salt thereof and a separation and removal step of separating and removing a multivalent metal ion chelate complex from a mixed solution obtained at the neutralization step using a separation membrane.Type: ApplicationFiled: January 20, 2016Publication date: January 25, 2018Applicant: TOKAI CARBON CO., LTD.Inventors: Takuya Sakoda, Yoshihiro Sato
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Patent number: 9875899Abstract: The semiconductor transistor according the present invention includes an active layer composed of a GaN-based semiconductor and a gate insulating film formed on the active layer. The gate insulating film has a first insulating film including one or more compounds selected from the group consisting of Al2O3, HfO2, ZrO2, La2O3, and Y2O3 formed on the active layer, and a second insulating film composed of SiO2 formed on the first insulating film.Type: GrantFiled: March 2, 2011Date of Patent: January 23, 2018Assignees: FUJI ELECTRIC CO., LTD., TOHOKU UNIVERSITYInventors: Hiroshi Kambayashi, Katsunori Ueno, Takehiko Nomura, Yoshihiro Sato, Akinobu Teramoto, Tadahiro Ohmi
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Publication number: 20170355891Abstract: Provided is an adhesive which, in a metal foil-containing laminated composite film used in a high temperature sterilization treatment, is resistant to the effects of moisture in the air during curing, has good workability when used as a solvent-free adhesive, and exhibits excellent adhesive strength and acid resistance. Provided is a method for producing an adhesive composition, the method including: a step of obtaining an alcohol-added isocyanate (E) by reacting a trifunctional or higher isocyanate compound (C2) and a monofunctional alcohol (D) at an equivalence ratio of isocyanate groups in the trifunctional or higher isocyanate compound (C2):monofunctional alcohol (D)=100 mol %:25 to 65 mol %, and a step of mixing a polyisocyanate (A) containing a trifunctional or higher isocyanate compound (C1) and the alcohol-added isocyanate (E), and an alcohol (B) having an acid value of 0.Type: ApplicationFiled: December 22, 2015Publication date: December 14, 2017Applicants: TOYO INK SC HOLDINGS CO., LTD., TOYO-MORTON, LTD., TOYOCHEM CO., LTD.Inventors: Tetsuya NATSUMOTO, Toru OYA, Yoshitaka TONE, Hiroyuki HAYASHI, Tetsuya KANEKO, Tadashi SOMEDA, Yoshihiro SATO
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Publication number: 20170345760Abstract: The semiconductor device includes: a transistor having a gate electrode formed on a semiconductor substrate and first and second source/drain regions formed in portions of the semiconductor substrate on both sides of the gate electrode; a gate interconnect formed at a position opposite to the gate electrode with respect to the first source/drain region; and a first silicon-germanium layer formed on the first source/drain region to protrude above the top surface of the semiconductor substrate. The gate interconnect and the first source/drain region are connected via a local interconnect structure that includes the first silicon-germanium layer.Type: ApplicationFiled: August 17, 2017Publication date: November 30, 2017Inventors: Tsutomu Oosuka, Hisashi Ogawa, Yoshihiro Sato
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Patent number: 9811816Abstract: To enable registration of a commodity without interrupting the flow of sales registration by an operator, a commodity identification device 2 specifically includes: a camera 27 that takes an image of an object that an operator holds over the camera; and a CPU 211 that is configured to, when the object is recognized from an image taken by the camera 27 and the object recognized is compared with reference images of each commodity in plurality of directions, and when the object is similar to a plurality of commodities, specify reference images having a noticeable difference, and guide the operator to rotate the object so that the object in the direction corresponding to the specified reference images is directed toward the camera 27.Type: GrantFiled: October 27, 2015Date of Patent: November 7, 2017Assignee: CASIO COMPUTER CO., LTDInventor: Yoshihiro Sato
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Patent number: 9813651Abstract: A solid-state imaging device according to the present disclosure includes pixels arranged two-dimensionally, each of the pixels including: a metal electrode; a photoelectric conversion layer that is on the metal electrode and converts light into an electrical signal; a transparent electrode on the photoelectric conversion layer; an electric charge accumulation region that is electrically connected to the metal electrode and accumulates electric charges from the photoelectric conversion layer; an amplifier transistor that applies a signal voltage according to an amount of the electric charges in the electric charge accumulation region; and a reset transistor that resets electrical potential of the electric charge accumulation region, in which the reset transistor includes a gate oxide film thicker than a gate oxide film of the amplifier transistor.Type: GrantFiled: December 22, 2014Date of Patent: November 7, 2017Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Mitsuyoshi Mori, Hirohisa Ohtsuki, Yoshiyuki Ohmori, Yoshihiro Sato, Ryohei Miyagawa
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Patent number: 9780039Abstract: The semiconductor device includes: a transistor having a gate electrode formed on a semiconductor substrate and first and second source/drain regions formed in portions of the semiconductor substrate on both sides of the gate electrode; a gate interconnect formed at a position opposite to the gate electrode with respect to the first source/drain region; and a first silicon-germanium layer formed on the first source/drain region to protrude above the top surface of the semiconductor substrate. The gate interconnect and the first source/drain region are connected via a local interconnect structure that includes the first silicon-germanium layer.Type: GrantFiled: February 2, 2016Date of Patent: October 3, 2017Assignee: PANNOVA SEMIC, LLCInventors: Tsutomu Oosuka, Hisashi Ogawa, Yoshihiro Sato
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Patent number: 9773825Abstract: Each unit pixel includes a photoelectric converter formed above a semiconductor region, an amplifier transistor formed in the semiconductor region, and including a gate electrode connected to the photoelectric converter, a reset transistor configured to reset a potential of the gate electrode, and an isolation region formed in the semiconductor region between the amplifier transistor and the reset transistor to electrically isolate the amplifier transistor from the reset transistor. The amplifier transistor includes a source/drain region. The source/drain region has a single source/drain structure.Type: GrantFiled: December 9, 2014Date of Patent: September 26, 2017Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Junji Hirase, Yoshiyuki Matsunaga, Yoshihiro Sato
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Publication number: 20170264840Abstract: An imaging device includes a semiconductor layer and a pixel cell. The pixel cell includes an impurity region of a first conductivity type, the impurity region located in the semiconductor layer, a photoelectric converter electrically connected to the impurity region and located above the semiconductor layer, a first transistor having a first gate, a first source and a first drain, one of the first source and the first drain electrically connected to the impurity region, a second transistor having a second gate of a second conductivity type different from the first conductivity type, a second source and a second drain, the second transistor including the impurity region as one of the second source and the second drain, the second gate electrically connected to the impurity region, and a third transistor having a third gate, a third source and a third drain, the third gate electrically connected to the photoelectric converter.Type: ApplicationFiled: March 1, 2017Publication date: September 14, 2017Inventors: JUNJI HIRASE, YOSHIHIRO SATO, YOSHINORI TAKAMI, MASAYUKI TAKASE, MASASHI MURAKAMI
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Publication number: 20170250216Abstract: An imaging device includes a unit pixel cell including: a semiconductor substrate including a first region exposed to a surface of the semiconductor substrate in a first area, and a second region directly adjacent to the first region and exposed to the surface in a second area; a photoelectric converter; a contact plug connected to the second region; a first transistor including the second region as one of a source and a drain, a first electrode covering a first portion of the first area, and a first insulation layer between the first electrode and the semiconductor substrate; a second electrode covering a second portion of the first area; and a second insulation layer between the second electrode and the semiconductor substrate. When seen in a direction perpendicular to the surface, a contact between the second region and the contact plug is located between the first electrode and the second electrode.Type: ApplicationFiled: January 27, 2017Publication date: August 31, 2017Inventors: YOSHIHIRO SATO, JUNJI HIRASE
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Patent number: 9711558Abstract: An imaging device including a unit pixel cell comprising: a semiconductor substrate including a first conductivity type region of a first conductivity type, a first and second impurity regions of a second conductivity type provided in the first conductivity type region; a photoelectric converter located above the semiconductor substrate; and a first transistor including a gate electrode and at least a part of the second impurity region as a source or a drain. The first impurity region is at least partially located in a surface of the semiconductor substrate and electrically connected to the photoelectric converter. The second impurity region is electrically connected to the photoelectric converter via the first impurity region and has an impurity concentration lower than that of the first impurity region. The second impurity region at least partially overlaps the gate electrode in a plan view.Type: GrantFiled: September 7, 2015Date of Patent: July 18, 2017Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Yoshihiro Sato, Yoshinori Takami, Kosaku Saeki, Junji Hirase
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Publication number: 20170170226Abstract: A solid-state imaging device according to the present disclosure includes: a charge storage region that stores a signal charge obtained through photoelectric conversion in a photoelectric conversion film; an amplification transistor that amplifies the signal charge stored in the charge storage region in a corresponding pixel; a contact plug that is electrically connected to the charge storage region and contains a semiconductor material; and a line that is disposed above the contact plug and contains a semiconductor material. The contact plug and the charge storage region are electrically connected, and the contact plug and a gate electrode of the amplification transistor are electrically connected via the line.Type: ApplicationFiled: February 24, 2017Publication date: June 15, 2017Inventors: Mitsuyoshi MORI, Ryohei MIYAGAWA, Yoshiyuki OHMORI, Yoshihiro SATO, Yutaka HIROSE, Yusuke SAKATA, Toru OKINO
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Patent number: 9679640Abstract: A non-volatile storage system is provided that includes a reversible resistance-switching memory cell and a controller coupled to the reversible resistance-switching memory cell. The controller is configured to program the reversible resistance-switching memory cell to three or more memory states while limiting the current through the memory cell to less than between about 0.1 microamp and about 30 microamps.Type: GrantFiled: February 13, 2017Date of Patent: June 13, 2017Assignee: SanDisk Technologies LLCInventor: Yoshihiro Sato
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Publication number: 20170153169Abstract: A breaking strength tester includes: a tubular pressure container having opened both ends to house a part of a pillar-shaped honeycomb structure including a partition walls and a circumferential wall; a tubular pressurization elastic body disposed to surround an entire circumference of a pressurized portion having a length equal to or less than ½ of a length in an axial direction of the circumferential wall; a partial pressurization unit which elastically deforms the pressurization elastic body and applies uniform pressure to the entire circumference of the circumferential wall of the pressurized portion of the honeycomb structure housed in the pressure container up to pressure test strength; and a pressure measurement unit which measures a value of the uniform pressure applied to the circumferential wall by the pressurization elastic body.Type: ApplicationFiled: October 21, 2016Publication date: June 1, 2017Applicant: NGK INSULATORS, LTD.Inventors: Kazuki IIDA, Yasumasa FUJIOKA, Hisazumi SHAKU, Kazunari AKITA, Yoshihiro SATO
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Patent number: 9635463Abstract: Provided are a vibrating body for speaker device which prevents interlayer from peeling in advance and includes a large effective vibration area, and a speaker device including this vibrating body for speaker device. The vibrating body for speaker device includes a first interlaced fiber member, and a second interlaced fiber member which overlaps with the first interlaced fiber member, and one of the first interlaced fiber member and the second interlaced fiber member includes polyvinyl alcohol fibers containing boron, and an outer circumferential portion of the first interlaced fiber member is larger than an outer circumferential portion of the second interlaced fiber member.Type: GrantFiled: April 1, 2013Date of Patent: April 25, 2017Assignees: PIONEER CORPORATION, TOHOKU PIONEER CORPORATION, MOGAMI DENKI CORPORATIONInventors: Kazuharu Kawata, Haruki Hoshikawa, Yoshihiro Sato, Takanobu Saito
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Patent number: 9627431Abstract: A solid-state imaging device according to the present disclosure includes: a charge storage region that stores a signal charge obtained through photoelectric conversion in a photoelectric conversion film; an amplification transistor that amplifies the signal charge stored in the charge storage region in a corresponding pixel; a contact plug that is electrically connected to the charge storage region and contains a semiconductor material; and a line that is disposed above the contact plug and contains a semiconductor material. The contact plug and the charge storage region are electrically connected, and the contact plug and a gate electrode of the amplification transistor are electrically connected via the line.Type: GrantFiled: December 16, 2014Date of Patent: April 18, 2017Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Mitsuyoshi Mori, Ryohei Miyagawa, Yoshiyuki Ohmori, Yoshihiro Sato, Yutaka Hirose, Yusuke Sakata, Toru Okino
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Patent number: 9595321Abstract: A method is provided for operating a reversible resistance-switching memory cell. The method includes programming the reversible resistance-switching memory cell to three or more memory states while limiting the current through the memory cell to less than between about 0.1 microamp and about 30 microamps.Type: GrantFiled: February 21, 2016Date of Patent: March 14, 2017Assignee: SanDisk Technologies LLCInventor: Yoshihiro Sato
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Publication number: 20170036432Abstract: A manufacturing method of a honeycomb structure includes a forming step of forming a quadrangular pillar-shaped honeycomb formed body, a firing step of firing the honeycomb formed body and forming a quadrangular pillar-shaped honeycomb fired body, a coating step of coating at least a part of side surfaces of the honeycomb fired body with a paste-like bonding material, a honeycomb block body preparing step of bonding the plurality of honeycomb fired bodies while performing pressurizing, to prepare a honeycomb block body, and a circumference grinding step of grinding a circumferential surface of the honeycomb block body and obtaining the honeycomb structure, and in the honeycomb block body preparing step, the bonding is performed without interposing any member other than the bonding material between the honeycomb fired bodies, and the bonding material has a shear thinning property.Type: ApplicationFiled: October 19, 2016Publication date: February 9, 2017Applicant: NGK INSULATORS, LTD.Inventors: Yutaka ISHII, Kazunari AKITA, Yoshihiro SATO, Masayuki NATE