Patents by Inventor Yoshihiro Uozumi
Yoshihiro Uozumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11921428Abstract: According to one embodiment, a substrate processing method is disclosed. The method can include treating a substrate with a first liquid. The substrate has a structural body formed on a major surface of the substrate. The method can include forming a support member supporting the structural body by bringing a second liquid into contact with the substrate wetted by the first liquid, and changing at least a portion of the second liquid into a solid by carrying out at least one of causing the second liquid to react, reducing a quantity of a solvent included in the second liquid, and causing at least a portion of a substance dissolved in the second liquid to be separated. The method can include removing the support member by changing at least a part of the support member from a solid phase to a gaseous phase, without passing through a liquid phase.Type: GrantFiled: February 25, 2022Date of Patent: March 5, 2024Assignee: Kioxia CorporationInventors: Yoshihiro Uozumi, Shinsuke Kimura, Yoshihiro Ogawa, Hiroyasu Iimori, Tatsuhiko Koide, Hideaki Hirabayashi, Yuji Nagashima
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Publication number: 20230130044Abstract: A method for manufacturing a semiconductor device is provided, including: preparing a first chip forming portion having a first semiconductor substrate, first metal pads provided at the substrate and a first circuit electrically connected to at least a part of the pads, and a second chip forming portion having a second semiconductor substrate, second metal pads provided at substrate and a second circuit electrically connected to at least a part of the pads; bonding the first and the second chip forming portions while joining the first and the second pads to form a bonding substrate having a non-bonded region between the first and the second chip forming portions at an outer peripheral portion thereof; and filling an insulating film into the non-bonded region, at least a part of the insulating film containing at least one selected from the group consisting of silicon nitride and nitrogen-containing silicon carbide.Type: ApplicationFiled: December 23, 2022Publication date: April 27, 2023Applicant: Kioxia CorporationInventor: Yoshihiro UOZUMI
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Patent number: 11621239Abstract: A semiconductor device according to an embodiment includes: a bonding substrate which includes a first chip forming portion having first metal pads provided at a semiconductor substrate and a first circuit connected to the first metal pads, and a second chip forming portion having second metal pads joined to the first metal pads and a second circuit connected to the second metal pads and being bonded to the first chip forming portion; and an insulating film which is filled into a non-bonded region between the first chip forming portion and the second chip forming portion at an outer peripheral portion of the bonding substrate. At least a part of the insulating film contains at least one selected from the group consisting of silicon nitride and nitrogen-containing silicon carbide.Type: GrantFiled: September 14, 2020Date of Patent: April 4, 2023Assignee: Kioxia CorporationInventor: Yoshihiro Uozumi
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Patent number: 11581277Abstract: A semiconductor device according to an embodiment includes: a bonding substrate which includes a first chip forming portion having first metal pads provided at a semiconductor substrate and a first circuit connected to the first metal pads, and a second chip forming portion having second metal pads joined to the first metal pads and a second circuit connected to the second metal pads and being bonded to the first chip forming portion; and an insulating film which is filled into a non-bonded region between the first chip forming portion and the second chip forming portion at an outer peripheral portion of the bonding substrate. At least a part of the insulating film contains at least one selected from the group consisting of silicon nitride and nitrogen-containing silicon carbide.Type: GrantFiled: September 14, 2020Date of Patent: February 14, 2023Assignee: Kioxia CorporationInventor: Yoshihiro Uozumi
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Publication number: 20220181171Abstract: According to one embodiment, a substrate processing method is disclosed. The method can include treating a substrate with a first liquid. The substrate has a structural body formed on a major surface of the substrate. The method can include forming a support member supporting the structural body by bringing a second liquid into contact with the substrate wetted by the first liquid, and changing at least a portion of the second liquid into a solid by carrying out at least one of causing the second liquid to react, reducing a quantity of a solvent included in the second liquid, and causing at least a portion of a substance dissolved in the second liquid to be separated. The method can include removing the support member by changing at least a part of the support member from a solid phase to a gaseous phase, without passing through a liquid phase.Type: ApplicationFiled: February 25, 2022Publication date: June 9, 2022Applicant: KIOXIA CORPORATIONInventors: Yoshihiro UOZUMI, Shinsuke KIMURA, Yoshihiro OGAWA, Hiroyasu IIMORI, Tatsuhiko KOIDE, Hideaki HIRABAYASHI, Yuji NAGASHIMA
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Publication number: 20210091024Abstract: A semiconductor device according to an embodiment includes: a bonding substrate which includes a first chip forming portion having first metal pads provided at a semiconductor substrate and a first circuit connected to the first metal pads, and a second chip forming portion having second metal pads joined to the first metal pads and a second circuit connected to the second metal pads and being bonded to the first chip forming portion; and an insulating film which is filled into a non-bonded region between the first chip forming portion and the second chip forming portion at an outer peripheral portion of the bonding substrate. At least a part of the insulating film contains at least one selected from the group consisting of silicon nitride and nitrogen-containing silicon carbide.Type: ApplicationFiled: September 14, 2020Publication date: March 25, 2021Applicant: Kioxia CorporationInventor: Yoshihiro UOZUMI
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Publication number: 20190214277Abstract: According to one embodiment, a substrate processing method is disclosed. The method can include treating a substrate with a first liquid. The substrate has a structural body formed on a major surface of the substrate. The method can include forming a support member supporting the structural body by bringing a second liquid into contact with the substrate wetted by the first liquid, and changing at least a portion of the second liquid into a solid by carrying out at least one of causing the second liquid to react, reducing a quantity of a solvent included in the second liquid, and causing at least a portion of a substance dissolved in the second liquid to be separated. The method can include removing the support member by changing at least a part of the support member from a solid phase to a gaseous phase, without passing through a liquid phase.Type: ApplicationFiled: March 18, 2019Publication date: July 11, 2019Applicant: Toshiba Memory CorporationInventors: Yoshihiro Uozumi, Shinsuke Kimura, Yoshihiro Ogawa, Hiroyasu Iimori, Tatsuhiko Koide, Hideaki Hirabayashi, Yuji Nagashima
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Patent number: 9929017Abstract: An etching method according to an embodiment, includes performing etching on a material having tungsten (W) as a main component by using as an etchant a chemical solution having hydrogen peroxide as a main component. The chemical solution contains 12 ppm or more and 100,000 ppm or less of W.Type: GrantFiled: March 7, 2013Date of Patent: March 27, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Nagisa Takami, Yoshihiro Uozumi
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Patent number: 9553189Abstract: According to certain embodiments, a silicide layer is formed after the fabrication of a functional gate electrode using a gate-last scheme. An initial semiconductor structure has at least one impurity regions formed on a semiconductor substrate, a sacrifice film formed over the impurity region, an isolation layer formed over the sacrifice film and a dielectric layer formed over the isolation film. A via is patterned into the dielectric layer of the initial semiconductor structure and through the thickness of the isolation layer such that a contact opening is formed in the isolation layer. The sacrifice film underlying the isolation layer is then removed leaving a void space underlying the isolation layer. Then, a metal silicide precursor is placed within the void space, and the metal silicide precursor is converted to a silicide layer through an annealing process.Type: GrantFiled: June 29, 2015Date of Patent: January 24, 2017Assignee: Kabushiki Kaisha ToshibaInventor: Yoshihiro Uozumi
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Publication number: 20160071747Abstract: According to one embodiment, a substrate processing method is disclosed. The method can include treating a substrate with a first liquid. The substrate has a structural body formed on a major surface of the substrate. The method can include forming a support member supporting the structural body by bringing a second liquid into contact with the substrate wetted by the first liquid, and changing at least a portion of the second liquid into a solid by carrying out at least one of causing the second liquid to react, reducing a quantity of a solvent included in the second liquid, and causing at least a portion of a substance dissolved in the second liquid to be separated. The method can include removing the support member by changing at least a part of the support member from a solid phase to a gaseous phase, without passing through a liquid phase.Type: ApplicationFiled: November 13, 2015Publication date: March 10, 2016Inventors: Yoshihiro Uozumi, Shinsuke Kimura, Yoshihiro Ogawa, Hiroyasu limori, Tatsuhiko Koide, Hideaki Hirabayashi, Yuji Nagashima
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Patent number: 9213242Abstract: According to one embodiment, a substrate processing method is disclosed. The method can include treating a substrate with a first liquid. The substrate has a structural body formed on a major surface of the substrate. The method can include forming a support member supporting the structural body by bringing a second liquid into contact with the substrate wetted by the first liquid, and changing at least a portion of the second liquid into a solid by carrying out at least one of causing the second liquid to react, reducing a quantity of a solvent included in the second liquid, and causing at least a portion of a substance dissolved in the second liquid to be separated. The method can include removing the support member by changing at least a part of the support member from a solid phase to a gaseous phase, without passing through a liquid phase.Type: GrantFiled: July 3, 2012Date of Patent: December 15, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Yoshihiro Uozumi, Shinsuke Kimura, Yoshihiro Ogawa, Hiroyasu Iimori, Tatsuhiko Koide, Hideaki Hirabayashi, Yuji Nagashima
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Publication number: 20150318395Abstract: According to certain embodiments, a silicide layer is formed after the fabrication of a functional gate electrode using a gate-last scheme. An initial semiconductor structure has at least one impurity regions formed on a semiconductor substrate, a sacrifice film formed over the impurity region, an isolation layer formed over the sacrifice film and a dielectric layer formed over the isolation film. A via is patterned into the dielectric layer of the initial semiconductor structure and through the thickness of the isolation layer such that a contact opening is formed in the isolation layer. The sacrifice film underlying the isolation layer is then removed leaving a void space underlying the isolation layer. Then, a metal silicide precursor is placed within the void space, and the metal silicide precursor is converted to a silicide layer through an annealing process.Type: ApplicationFiled: June 29, 2015Publication date: November 5, 2015Inventor: Yoshihiro Uozumi
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Patent number: 9099474Abstract: According to certain embodiments, a silicide layer is formed after the fabrication of a functional gate electrode using a gate-last scheme. An initial semiconductor structure has at least one impurity regions formed on a semiconductor substrate, a sacrifice film formed over the impurity region, an isolation layer formed over the sacrifice film and a dielectric layer formed over the isolation film. A via is patterned into the dielectric layer of the initial semiconductor structure and through the thickness of the isolation layer such that a contact opening is formed in the isolation layer. The sacrifice film underlying the isolation layer is then removed leaving a void space underlying the isolation layer. Then, a metal silicide precursor is placed within the void space, and the metal silicide precursor is converted to a silicide layer through an annealing process.Type: GrantFiled: December 6, 2012Date of Patent: August 4, 2015Assignee: Kabushiki Kaisha ToshibaInventor: Yoshihiro Uozumi
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Patent number: 8946809Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor memory device. The method includes forming a first stopper film forming a lower gate layer, making a recess in the lower gate layer, filling a sacrificial film into the recess, forming a second stopper film, making an opening in the second stopper film, forming a stacked body. The stacked body includes electrode films and insulating films. The method includes, making a slit in the stacked body, making a hole in the stacked body, removing the sacrificial film via the hole, forming a memory film including a charge storage film. The method includes forming a channel body on a side wall of the memory film. An etching rate of the first stopper film and the second stopper film is lower than an etching rate of the electrode films and the insulating films.Type: GrantFiled: September 4, 2013Date of Patent: February 3, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhide Takamura, Ryota Katsumata, Masaru Kidoh, Yoshihiro Uozumi, Daigo Ichinose, Toru Matsuda
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Patent number: 8912089Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a stacked body on a substrate. The stacked body includes a plurality of first conductive layers including a metallic element as a main component and a plurality of second conductive layers including a metallic element as a main component provided respectively between the first conductive layers. The method includes making a hole to pierce the stacked body. The method includes making a slit to divide the stacked body. The method includes making a gap between the first conductive layers by removing the second conductive layers by etching via the slit or the hole. The method includes forming a memory film including a charge storage film at a side wall of the hole. The method includes forming a channel body on an inner side of the memory film inside the hole.Type: GrantFiled: March 21, 2013Date of Patent: December 16, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Seiichi Omoto, Yoshihiro Uozumi, Tadashi Iguchi, Osamu Yamane, Kazuyuki Masukawa, Yoshihiro Yanai
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Publication number: 20140284691Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor memory device. The method includes forming a first stopper film forming a lower gate layer, making a recess in the lower gate layer, filling a sacrificial film into the recess, forming a second stopper film, making an opening in the second stopper film, forming a stacked body. The stacked body includes electrode films and insulating films. The method includes, making a slit in the stacked body, making a hole in the stacked body, removing the sacrificial film via the hole, forming a memory film including a charge storage film. The method includes forming a channel body on a side wall of the memory film. An etching rate of the first stopper film and the second stopper film is lower than an etching rate of the electrode films and the insulating films.Type: ApplicationFiled: September 4, 2013Publication date: September 25, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Kazuhide Takamura, Ryota Katsumata, Masaru Kidoh, Yoshihiro Uozumi, Daigo Ichinose, Toru Matsuda
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Publication number: 20140073069Abstract: An etching method according to an embodiment, includes performing etching on a material having tungsten (W) as a main component by using as an etchant a chemical solution having hydrogen peroxide as a main component. The chemical solution contains 12 ppm or more and 100,000 ppm or less of W.Type: ApplicationFiled: March 7, 2013Publication date: March 13, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Nagisa TAKAMI, Yoshihiro UOZUMI
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Publication number: 20140061752Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a stacked body on a substrate. The stacked body includes a plurality of first conductive layers including a metallic element as a main component and a plurality of second conductive layers including a metallic element as a main component provided respectively between the first conductive layers. The method includes making a hole to pierce the stacked body. The method includes making a slit to divide the stacked body. The method includes making a gap between the first conductive layers by removing the second conductive layers by etching via the slit or the hole. The method includes forming a memory film including a charge storage film at a side wall of the hole. The method includes forming a channel body on an inner side of the memory film inside the hole.Type: ApplicationFiled: March 21, 2013Publication date: March 6, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Seiichi Omoto, Yoshihiro Uozumi, Tadashi Iguchi, Osamu Yamane, Kazuyuki Masukawa, Yoshihiro Yanai
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Patent number: 8513140Abstract: A post-dry etching cleaning liquid composition for cleaning a substrate after dry etching is provided, the cleaning liquid composition containing at least one type of fluorine compound, glyoxylic acid, at least one type of organic acid salt, and water. With regard to the fluorine compound, ammonium fluoride may be used. With regard to the organic acid salt, at least one of ammonium oxalate, ammonium tartarate, ammonium citrate, and ammonium acetate may be used.Type: GrantFiled: September 23, 2010Date of Patent: August 20, 2013Assignees: Sony Corporation, Kabushiki Kaisha Toshiba, Kanto Kagaku Kabushiki KaishaInventors: Masafumi Muramatsu, Kazumi Asada, Yukino Hagino, Atsushi Okuyama, Takahito Nakajima, Kazuhiko Takase, Yoshihiro Uozumi, Tsuyoshi Matsumura, Takuo Ohwada, Norio Ishikawa
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Publication number: 20130196512Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method can rinse a substrate with water, a plurality of protruding patterns being formed on the substrate. The method can dry the substrate by removing water from a recess between the protruding patterns by irradiating microwaves.Type: ApplicationFiled: August 27, 2012Publication date: August 1, 2013Inventors: Tatsuhiko KOIDE, Yoshihiro OGAWA, Yoshihiro UOZUMI