Patents by Inventor Yoshihisa Nagano
Yoshihisa Nagano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7015564Abstract: A capacitive element includes a lower electrode having a three-dimensional shape, an upper electrode formed so as to be opposed to the lower electrode, and a capacitor insulating film formed between the lower and upper electrodes and made of a crystallized ferroelectric material. The thickness of the capacitor insulating film is set at 12.5 through 100 nm both inclusive.Type: GrantFiled: August 12, 2004Date of Patent: March 21, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihisa Nagano, Shinichiro Hayashi
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Patent number: 6939725Abstract: A capacitor including a capacitor lower electrode, a capacitor dielectric film of a highly dielectric film or a ferroelectric film and a capacitor upper electrode is formed on a semiconductor substrate. A protection film is formed on the semiconductor substrate so as to cover the capacitor. A first TEOS film having a relatively large water content is formed on the protection film through first TEOS-O3 CVD where an ozone concentration is relatively low. A second TEOS-O3 film having a relatively small water content is formed on the first TEOS-O3 film through second TEOS-O3 CVD where the ozone concentration is relatively high.Type: GrantFiled: February 3, 2004Date of Patent: September 6, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshie Kutsunai, Shinichiro Hayashi, Yuji Judai, Yoshihisa Nagano
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Publication number: 20050167725Abstract: A capacitor element is provided which is composed of a lower electrode, an upper electrode formed in opposing relation to the lower electrode, and a capacitor dielectric film made of a ferroelectric material or a high dielectric material and formed between the lower and upper electrodes. The lower electrode, the capacitor dielectric film, and the upper electrode are formed in a region extending at least from within a hole provided in an interlayer insulating film having a first hydrogen barrier film disposed on the upper surface thereof toward a position above the hole. A second hydrogen barrier film in contact with the first hydrogen barrier film is disposed to cover the upper surface of the upper electrode and the side surface of the portion of the upper electrode which has been formed above the hole.Type: ApplicationFiled: January 14, 2005Publication date: August 4, 2005Inventors: Yoshihisa Nagano, Takumi Mikawa
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Publication number: 20050082638Abstract: A semiconductor device includes: a capacitor provided on a supporting substrate having an integrated circuit thereon and including a lower electrode, a dielectric film, and an upper electrode; a first interlayer insulating film provided so as to cover the capacitor; a first interconnect selectively provided on the first interlayer insulating film and electrically connected to the integrated circuit and the capacitor through a first contact hole formed in the first interlayer insulating film; a second interlayer insulating film formed of ozone TEOS and provided so as to cover the first interconnect; a second interconnect selectively provided on the second interlayer insulating film and electrically connected to the first interconnect through a second contact hole formed in the second interlayer insulating film; and a passivation layer provided so as to cover the second interconnect.Type: ApplicationFiled: October 19, 2004Publication date: April 21, 2005Inventors: Yoshihisa Nagano, Toshie Kutsunai, Yuji Judai, Yasuhiro Uemoto, Eiji Fujii
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Publication number: 20050051829Abstract: A semiconductor device includes: an insulating underlying layer of which surface portion has a concave portion; a lower electrode formed on the underlying layer along the inner face of the concave portion; a capacitor insulating film formed on the lower electrode and made of a high-dielectric or a ferroelectric subjected to thermal treatment for crystallization; and an upper electrode formed on the capacitor insulating film. The lower electrode and the upper electrode are made of a material that generates tensile stress in the thermal treatment for the capacitor insulating film, and the upper end part of the side wall and the corner part at the bottom face of the concave portion of the underlying layer are rounded.Type: ApplicationFiled: August 12, 2004Publication date: March 10, 2005Inventors: Satoru Goto, Yoshihisa Nagano
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Publication number: 20050045990Abstract: The semiconductor device of the invention includes a capacitor device, which is formed on a substrate and which includes a capacitive lower electrode, a capacitive insulating film made of an insulating metal oxide film and a capacitive upper electrode. An interlevel insulating film having an opening reaching the capacitive upper electrode is formed over the capacitor device. A metal interconnection including a titanium film is formed over the interlevel insulating film so as to be electrically connected to the capacitive upper electrode through the opening. An anti-diffusion film having conductivity is formed between the capacitive upper electrode and the metal interconnection for preventing titanium atoms composing the titanium film of the metal interconnection from passing through the capacitive upper electrode and diffusing into the capacitive insulating film.Type: ApplicationFiled: September 28, 2004Publication date: March 3, 2005Applicant: Matsushita Electronics CorporationInventors: Keisaku Nakao, Akihiro Matsuda, Yasufumi Izutsu, Toyoji Ito, Takumi Mikawa, Toru Nasu, Yoshihisa Nagano, Keisuke Tanaka, Toshie Kutsunai
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Patent number: 6849887Abstract: A semiconductor device includes: a capacitor provided on a supporting substrate having an integrated circuit thereon and including a lower electrode, a dielectric film, and an upper electrode; a first interlayer insulating film provided so as to cover the capacitor; a first interconnect selectively provided on the first interlayer insulating film and electrically connected to the integrated circuit and the capacitor through a first contact hole formed in the first interlayer insulating film; a second interlayer insulating film formed of ozone TEOS and provided so as to cover the first interconnect; a second interconnect selectively provided on the second interlayer insulating film and electrically connected to the first interconnect through a second contact hole formed in the second interlayer insulating film; and a passivation layer provided so as to cover the second interconnect.Type: GrantFiled: June 24, 1998Date of Patent: February 1, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihisa Nagano, Toshie Kutsunai, Yuji Judai, Yasuhiro Uemoto, Eiji Fujii
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Patent number: 6847074Abstract: A semiconductor memory device according to the present invention includes a memory cell capacitor for storing data thereon. The capacitor is made up of a first electrode connected to a contact plug, a second electrode and a capacitive insulating film interposed between the first and second electrodes. The first electrode includes a first barrier film in contact with the contact plug and a second barrier film, which is formed on the first barrier film and prevents the diffusion of oxygen. The second barrier film covers the upper and side faces of the first barrier film.Type: GrantFiled: February 20, 2001Date of Patent: January 25, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihisa Nagano, Tooru Nasu, Shinichiro Hayashi, Eiji Fujii
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Publication number: 20050006684Abstract: A capacitive element includes a lower electrode having a three-dimensional shape, an upper electrode formed so as to be opposed to the lower electrode, and a capacitor insulating film formed between the lower and upper electrodes and made of a crystallized ferroelectric material. The thickness of the capacitor insulating film is set at 12.5 through 100 nm both inclusive.Type: ApplicationFiled: August 12, 2004Publication date: January 13, 2005Inventors: Yoshihisa Nagano, Shinichiro Hayashi
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Publication number: 20040229429Abstract: A protective insulating film is deposited over first and second field-effect transistors formed on a semiconductor substrate. A capacitor composed of a capacitor lower electrode, a capacitor insulating film composed of an insulating metal oxide film, and a capacitor upper electrode is formed on the protective insulating film. A first contact plug formed in the protective insulating film provides a direct connection between the capacitor lower electrode and an impurity diffusion layer of the first field-effect transistor. A second contact plug formed in the protective insulating film provides a direct connection between the capacitor upper electrode and an impurity diffusion layer of the second field-effect transistor.Type: ApplicationFiled: June 22, 2004Publication date: November 18, 2004Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihisa Nagano, Yasuhiro Uemoto
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Patent number: 6818498Abstract: On a substrate, there are provided a lower electrode, a capacitance insulating film, a passivation insulating film, and a first partial film of an upper electrode to be filled in a second aperture (capacitance determining aperture) formed in the passivation insulating film. The lower electrode, the capacitance insulating film, and the first partial film constitute a capacitance element. The upper electrode has the first partial film which is in contact with the capacitance insulating film and a second partial film which is not in contact with the capacitance insulating film. Since a second electrode wire consisting of a lower-layer film composed of titanium and an upper-layer film composed of an aluminum alloy film is in contact with the second partial film distinct from the first partial film of the upper electrode, titanium or the like encroaching from the second electrode wire can be prevented from diffusing into the capacitance insulating film.Type: GrantFiled: March 20, 2003Date of Patent: November 16, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takumi Mikawa, Yuji Judai, Yoshihisa Nagano
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Patent number: 6809000Abstract: The semiconductor device of the invention includes a capacitor device, which is formed on a substrate and which includes a capacitive lower electrode, a capacitive insulating film made of an insulating metal oxide film and a capacitive upper electrode. An interlevel insulating film having an opening reaching the capacitive upper electrode is formed over the capacitor device. A metal interconnection including a titanium film is formed over the interlevel insulating film so as to be electrically connected to the capacitive upper electrode through the opening. An anti-diffusion film having conductivity is formed between the capacitive upper electrode and the metal interconnection for preventing titanium atoms composing the titanium film of the metal interconnection from passing through the capacitive upper electrode and diffusing into the capacitive insulating film.Type: GrantFiled: March 5, 2001Date of Patent: October 26, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Keisaku Nakao, Akihiro Matsuda, Yasufumi Izutsu, Toyoji Ito, Takumi Mikawa, Toru Nasu, Yoshihisa Nagano, Keisuke Tanaka, Toshie Kutsunai
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Publication number: 20040185653Abstract: A conductive oxygen barrier layer is formed on an interlayer dielectric film and patterned such that it is in contact with the top surface of a contact plug to prevent the diffusion of oxygen into the contact plug from above. The conductive oxygen barrier layer is composed of a lower layer containing a conductive nitride such as TiAlN, and an upper layer containing a conductive oxide such as IrO2. An insulative oxygen barrier layer composed of Al2O3 and having a thickness of approximately 20 nm is formed on the side surfaces of the conductive oxygen barrier layer to prevent the diffusion of oxygen into the contact plug from the sides, such as from the sides of the lower layer of the conductive barrier layer.Type: ApplicationFiled: January 8, 2004Publication date: September 23, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Yoshihisa Nagano, Toshie Kutsunai
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Patent number: 6781179Abstract: The semiconductor memory device of the present invention includes: an interlayer insulating film formed on a semiconductor substrate; a contact plug formed to extend through the interlayer insulating film; and a capacitor formed on the interlayer insulating film so that an electrode of the capacitor is connected with the contact plug. The electrode has an iridium oxide film as an oxygen barrier film. The average grain size of granular crystals constituting the iridium oxide film is a half or less of the thickness of the iridium oxide film.Type: GrantFiled: May 23, 2002Date of Patent: August 24, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toru Nasu, Yoshihisa Nagano
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Publication number: 20040155279Abstract: A capacitor including a capacitor lower electrode, a capacitor dielectric film of a highly dielectric film or a ferroelectric film and a capacitor upper electrode is formed on a semiconductor substrate. A protection film is formed on the semiconductor substrate so as to cover the capacitor. A first TEOS film having a relatively large water content is formed on the protection film through first TEOS-O3 CVD where an ozone concentration is relatively low. A second TEOS-O3 film having a relatively small water content is formed on the first TEOS-O3 film through second TEOS-O3 CVD where the ozone concentration is relatively high.Type: ApplicationFiled: February 3, 2004Publication date: August 12, 2004Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Toshie Kutsunai, Shinichiro Hayashi, Yuji Judai, Yoshihisa Nagano
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Patent number: 6756282Abstract: A protective insulating film is deposited over first and second field-effect transistors formed on a semiconductor substrate. A capacitor composed of a capacitor lower electrode, a capacitor insulating film composed of an insulating metal oxide film, and a capacitor upper electrode is formed on the protective insulating film. A first contact plug formed in the protective insulating film provides a direct connection between the capacitor lower electrode and an impurity diffusion layer of the first field-effect transistor. A second contact plug formed in the protective insulating film provides a direct connection between the capacitor upper electrode and an impurity diffusion layer of the second field-effect transistor.Type: GrantFiled: June 10, 2002Date of Patent: June 29, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihisa Nagano, Yasuhiro Uemoto
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Patent number: 6737697Abstract: A capacitor including a capacitor lower electrode, a capacitor dielectric film of a highly dielectric film or a ferroelectric film and a capacitor upper electrode is formed on a semiconductor substrate. A protection film is formed on the semiconductor substrate so as to cover the capacitor. A first TEOS film having a relatively large water content is formed on the protection film through first TEOS-O3 CVD where an ozone concentration is relatively low. A second TEOS-O3 film having a relatively small water content is formed on the first TEOS-O3 film through second TEOS-O3 CVD where the ozone concentration is relatively high.Type: GrantFiled: February 9, 2001Date of Patent: May 18, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshie Kutsunai, Shinichiro Hayashi, Yuji Judai, Yoshihisa Nagano
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Patent number: 6730951Abstract: A capacitor includes: a lower electrode; a capacitor insulating film made of a metal oxide and formed on the lower electrode; an upper electrode formed on the capacitor insulating film; and a buried insulating film surrounding the lower electrode. The lower electrode includes a conductive barrier layer that prevents diffusion of oxygen, and an insulating barrier layer that prevents diffusion of hydrogen is formed so as to be in contact with at least a side surface of the conductive barrier layer in a side surface of the lower electrode.Type: GrantFiled: June 21, 2002Date of Patent: May 4, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihisa Nagano, Eiji Fujii
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Publication number: 20030181017Abstract: On a substrate, there are provided a lower electrode, a capacitance insulating film, a passivation insulating film, and a first partial film of an upper electrode to be filled in a second aperture (capacitance determining aperture) formed in the passivation insulating film. The lower electrode, the capacitance insulating film, and the first partial film constitute a capacitance element. The upper electrode has the first partial film which is in contact with the capacitance insulating film and a second partial film which is not in contact with the capacitance insulating film. Since a second electrode wire consisting of a lower-layer film composed of titanium and an upper-layer film composed of an aluminum alloy film is in contact with the second partial film distinct from the first partial film of the upper electrode, titanium or the like encroaching from the second electrode wire can be prevented from diffusing into the capacitance insulating film.Type: ApplicationFiled: March 20, 2003Publication date: September 25, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Takumi Mikawa, Yuji Judai, Yoshihisa Nagano
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Publication number: 20030175998Abstract: After forming a lower electrode by patterning a conducting film formed on a substrate by using an etching gas including chlorine, chlorine remaining on the lower electrode is removed by irradiating the lower electrode with plasma of a gas including fluorine. Thereafter, a capacitor dielectric film made of an insulating metal oxide is formed on the lower electrode, and an upper electrode is formed on the capacitor dielectric film.Type: ApplicationFiled: December 19, 2002Publication date: September 18, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihisa Nagano, Shinichiro Hayashi, Yuji Judai