Abstract: A semiconductor device includes: a semiconductor substrate and a transistor formed on the semiconductor substrate. The semiconductor device also includes: a first interlayer insulation film formed on the semiconductor substrate including the upper portion of the transistor, a first contact formed to be connected through the first interlayer insulation film to the transistor, a ferroelectric capacitor formed to be connected to the first contact, a second interlayer insulation film formed on the first interlayer insulation film, and a second contact formed to connect the ferroelectric capacitor to a wiring through the second interlayer insulation film. The contact surfaces between the second contact and the ferroelectric capacitor have the same planar shape.

Abstract: A semiconductor device comprises an insulation film that is provided on a semiconductor substrate, a first contact plug that is provided in the insulation film and includes a metal, a first adhesive film that is provided on the insulation film, has a higher oxygen affinity than the metal, and includes an oxide, a second adhesive film that is provided on the first contact plug and has a film thickness that is smaller than a film thickness of the first adhesive film, a first capacitor electrode that is provided on the contact plug and the first adhesive film, has a part in direct contact with the first contact plug, a capacitor insulation film that is provided on the first capacitor electrode, and a second capacitor electrode that is provided on the capacitor insulation film.

Abstract: A semiconductor device comprising a ferroelectric capacitor having improved reliability is disclosed. According to one aspect of the present invention, it is provided a semiconductor device comprising a transistor formed on a semiconductor substrate, a ferroelectric capacitor formed above the transistor and comprising a lower electrode, a ferroelectric film and an upper electrode, a first hydrogen barrier film formed over the ferroelectric capacitor, an insulator formed over the first hydrogen barrier film, a contact plug disposed in the insulator and electrically connected with the upper electrode, a second hydrogen barrier film disposed between the contact plug and the insulator continuously, and a wiring connected with the contact plug.

Abstract: A semiconductor memory, comprising: a first memory cell transistor disposed on a semiconductor substrate; a second memory cell transistor disposed on the semiconductor substrate and having a first source-drain region in common with the first memory cell transistor; a first ferroelectric capacitor disposed with a via in between above a second source-drain region of the first memory cell transistor; a second ferroelectric capacitor disposed with a via in between above a second source-drain region of the second memory cell transistor; an interlayer dielectric disposed on the semiconductor substrate, as coating the memory cell transistors and the ferroelectric capacitors, the interlayer dielectric having a contact hole through which the first source-drain region is partially exposed at the bottom and upper electrodes of the first and second ferroelectric capacitors are partially exposed at the top; and a wiring layer filled into the contact hole, which connects the first source-drain region, the upper electrode o

Abstract: A semiconductor device comprising a ferroelectric capacitor having improved reliability is disclosed. According to one aspect of the present invention, it is provided a semiconductor device comprising a transistor formed on a semiconductor substrate, a ferroelectric capacitor formed above the transistor and comprising a lower electrode, a ferroelectric film and an upper electrode, a first hydrogen barrier film formed over the ferroelectric capacitor, an insulator formed over the first hydrogen barrier film, a contact plug disposed in the insulator and electrically connected with the upper electrode, a second hydrogen barrier film disposed between the contact plug and the insulator continuously, and a wiring connected with the contact plug.

Abstract: A semiconductor memory device including a capacitor array having an effective size smaller than a minimum feature size of lithography is disclosed. According to one aspect of the present invention, it is provided a semiconductor memory device comprising a transistor including a gate electrode formed on a gate insulator on a semiconductor substrate and a plurality of sources/drains disposed in the semiconductor substrate to face each other holding the gate electrode therebetween, a ferroelectric capacitor formed above the transistor and including a lower electrode, a ferroelectric film, and an upper electrode, a first wiring line electrically connected to the lower electrode, and a second wiring line electrically connected to the upper electrode, wherein the ferroelectric capacitor is a staggered-electrode capacitor in which the upper electrode is shifted from the lower electrode and equivalently overlaps with parts of the plurality of lower electrodes.

Abstract: A semiconductor storage device including a capacitor whose stored signal quantity is large with respect to its area share ratio, and a manufacturing method thereof are disclosed. According to one aspect of the present invention, it is provided a semiconductor storage device comprising a transistor formed on a semiconductor substrate, a capacitor which is formed above the transistor and includes a lower electrode, a dielectric film and an upper electrode, a semi-insulating layer formed in a side edge of the upper electrode and formed by locally transforming the upper electrode, an insulator formed to cover the capacitor, and a wiring line connected with the upper electrode.

Abstract: A semiconductor device comprises an insulation film that is provided on a semiconductor substrate, a first contact plug that is provided in the insulation film and includes a metal, a first adhesive film that is provided on the insulation film, has a higher oxygen affinity than the metal, and includes an oxide, a second adhesive film that is provided on the first contact plug and has a film thickness that is smaller than a film thickness of the first adhesive film, a first capacitor electrode that is provided on the contact plug and the first adhesive film, has a part in direct contact with the first contact plug, a capacitor insulation film that is provided on the first capacitor electrode, and a second capacitor electrode that is provided on the capacitor insulation film.

Abstract: A semiconductor device comprising a ferroelectric capacitor having improved reliability is disclosed. According to one aspect of the present invention, it is provided a semiconductor device comprising a transistor formed on a semiconductor substrate, a ferroelectric capacitor formed above the transistor and comprising a lower electrode, a ferroelectric film and an upper electrode, a first hydrogen barrier film formed over the ferroelectric capacitor, an insulator formed over the first hydrogen barrier film, a contact plug disposed in the insulator and electrically connected with the upper electrode, a second hydrogen barrier film disposed between the contact plug and the insulator continuously, and a wiring connected with the contact plug.

Abstract: A semiconductor device includes a plurality of first word lines which extend in a first direction, a plurality of second word lines which extend in a direction orthogonal to the first direction, a plurality of selection circuits which are provided at intersections of the first word lines and the second word lines, and each of which includes a first transistor and a second transistor which are connected in series, the first transistor having a gate electrode connected to one of the first word lines, and the second transistor having a gate electrode connected to one of the second word lines.

Abstract: A piezoelectric sheet, which comprises a matrix comprising a polyimide, silicone rubber or an epoxy resin, and a cubic lead zirconate titanate single-crystal particle dispersed in the matrix, wherein (100) plane of said single-crystal particle is oriented parallel to a plane of said sheet, and said single-crystal particle penetrates the plane of said sheet from one to the other side. Conventionally, since the constituent crystal particles are randomly oriented, properties of the crystal particles are obtained as the average values of the properties of the individual particles. In contrast, according to the piezoelectric sheet of the present invention, since the cubic PZT single-crystal particles have been disposed so that (100) axes are oriented perpendicularly to the plane of the sheet, the PZT can have the properties inherent in the (100) planes.

Abstract: A transistor is formed in a surface region of a semiconductor substrate. A capacitor is formed above the transistor, and has a first electrode, a second electrode, and a dielectric film formed between the first and second electrodes. A first contact is formed on a side surface portion of the capacitor so as to be close to at least a portion of the capacitor, and connected to one of source/drain regions. A side insulating film is formed, in contact with at least the capacitor, on the sidewalls of the first contact.

Abstract: A semiconductor storage device wherein a plurality of ferroelectric capacitors are sufficiently covered with a hydrogen barrier film formed thereon comprises a field effect transistor formed on one surface side of a semiconductor substrate, a plurality of ferroelectric capacitors formed close to each other above the field effect transistor, an insulting film configured to cover the plurality of ferroelectric capacitors and planarised a space between adjacent ferroelectric capacitors in a self-aligned manner during formation thereof, and a hydrogen barrier film formed on the insulating film.

Abstract: A ferro-electric memory device includes a gate electrode which is formed on a semiconductor substrate, first and second diffusion layers which are formed in the semiconductor substrate, a first contact which is electrically connected to the first diffusion layer, a first oxygen barrier film having insulating properties, which is formed on the first contact, a second contact which is electrically connected to the first contact, a second oxygen barrier film having insulating properties, which is formed on the second contact, a ferro-electric capacitor which has a lower electrode, a ferro-electric film, and an upper electrode, a third contact which is electrically connected to the upper electrode, a first interconnection which is electrically connected to the second and third contacts, and a third oxygen barrier film having insulating properties, which is arranged between the ferro-electric capacitor and the second contact and brought into contact with the first oxygen barrier film.

Abstract: A ferro-electric memory device includes a first ferro-electric capacitor which is selectively formed on a first insulating film and has a first lower electrode, a first ferro-electric film, and a first upper electrode, a first hydrogen barrier film which has first to third portions, the first portion being formed on the first insulating film, the second portion covering the side surfaces of the first lower electrode, first ferro-electric film, and first upper electrode, and the third portion being formed on the upper surface of the first upper electrode, a first interlayer formed on the second portion, and a second hydrogen barrier film which has fourth to sixth portions, the fourth portion having a first contact portion which comes into contact with at least part of the first portion, the fifth portion being formed on the first interlayer, and the sixth portion being formed on the third portion.

Abstract: A PZT fiber is formed by using a titanium wire or a heat-resistant metal wire made of platinum or the like, as a core wire, and overlaying PZT crystals on a surface of the wire. A smart board utilizing the PZT fiber is formed by embedding the PZT fiber into a conductive composite material layer made of carbon fiber reinforced plastic or the like. An actuator utilizing the smart board is constituted by applying a voltage between the PZT fiber and the conductive composite layer of the smart board.

Abstract: A ferro-electric memory device includes a gate electrode which is formed on a semiconductor substrate, first and second diffusion layers which are formed in the semiconductor substrate, a first contact which is electrically connected to the first diffusion layer, a first oxygen barrier film having insulating properties, which is formed on the first contact, a second contact which is electrically connected to the first contact, a second oxygen barrier film having insulating properties, which is formed on the second contact, a ferro-electric capacitor which has a lower electrode, a ferro-electric film, and an upper electrode, a third contact which is electrically connected to the upper electrode, a first interconnection which is electrically connected to the second and third contacts, and a third oxygen barrier film having insulating properties, which is arranged between the ferro-electric capacitor and the second contact and brought into contact with the first oxygen barrier film.

Abstract: A ferro-electric memory device includes a first ferro-electric capacitor which is selectively formed on a first insulating film and has a first lower electrode, a first ferro-electric film, and a first upper electrode, a first hydrogen barrier film which has first to third portions, the first portion being formed on the first insulating film, the second portion covering the side surfaces of the first lower electrode, first ferro-electric film, and first upper electrode, and the third portion being formed on the upper surface of the first upper electrode, a first interlayer formed on the second portion, and a second hydrogen barrier film which has fourth to sixth portions, the fourth portion having a first contact portion which comes into contact with at least part of the first portion, the fifth portion being formed on the first interlayer, and the sixth portion being formed on the third portion.

Abstract: A capacitor is configured by a bottom electrode BE, an inter-electrode dielectric D, and a top electrode TE. Directly under the bottom electrode BE, for example, silicon oxide (SiO2) is disposed, and directly above the top electrode TE as well, for example, silicon oxide (SiO2) is disposed. The capacitor is covered with an insulating layer Low-k having a low dielectric constant. The insulating layer Low-k is formed from a material having as low of a dielectric constant as possible in order to reduce the parasitic capacitance between wirings. High-dielectrics High-k for suppressing the swelling of electric lines of force are disposed on side walls of an inter-electrode dielectric D. A dielectric constant of the High-dielectric High-k is at least higher than a dielectric constant of the insulating layer Low-k.

Abstract: A capacitor is configured by a bottom electrode BE, an inter-electrode dielectric D, and a top electrode TE. Directly under the bottom electrode BE, for example, silicon oxide (SiO2) is disposed, and directly above the top electrode TE as well, for example, silicon oxide (SiO2) is disposed. The capacitor is covered with an insulating layer Low-k having a low dielectric constant. The insulating layer Low-k is formed from a material having as low of a dielectric constant as possible in order to reduce the parasitic capacitance between wirings. High-dielectrics High-k for suppressing the swelling of electric lines of force are disposed on side walls of an inter-electrode dielectric D. A dielectric constant of the High-dielectric High-k is at least higher than a dielectric constant of the insulating layer Low-k.