Abstract: Disclosed herein are a common mode filter for increasing inductance using simpler structure and a method of manufacturing the same, the common mode filter including: a magnetic material substrate; an insulating layer included on an upper portion of the magnetic material substrate and having a coil electrode formed therein; an opening part penetrating through a central portion of the insulating layer; and a magnetic composite formed in the opening part, wherein the opening part has a side wall inclined at a predetermined angle.

Abstract: Disclosed herein is a common mode filter including: a coil part including a conductor coil provided in an insulating part; a plurality of external electrodes provided on the insulating part while being electrically connected to the conductor coil; and a magnetic material part provided in a region between the plurality of external electrodes on the insulating part. By this configuration, impedance characteristics of the common mode filter may be improved.

Abstract: There is provided an inductor, including a circuit board having an input and output terminal formed on a lower surface thereof, a connection pad formed on an upper surface thereof, and a via electrically connecting the input and output terminal and the connection pad, a coil having both ends joined to the connection pad and wound in a circular or a polygonal spiral shape in a longitudinal direction of the circuit board so as to have one or more turns, and a body stacked on the circuit board such that the coil and the connection pad are embedded therein.

Abstract: Disclosed is a printed circuit board, including a base member, an insulating layer formed on each of both surfaces of the base member so that the surfaces of the base member are flattened, a circuit layer formed on the insulating layer, and a via for connecting the circuit layer formed on one surface of the base member with the circuit layer formed on the other surface of the base member. A method of manufacturing the printed circuit board is also provided.

Abstract: Disclosed herein is a printed circuit board, including: a base substrate; and a circuit pattern formed on the base substrate, including a conductive filler therein, and having roughness formed on a surface thereof.

Abstract: The present invention relates to a stacked wafer level package and a method of manufacturing the same. The stacked wafer level package in accordance with the present invention can improve a misalignment problem generated in a stacking process by performing a semiconductor chip mounting process, a rearrangement wiring layer forming process, the stacking process and so on after previously bonding internal connection means for interconnection between stacked electronic components to a conductive layer for forming a rearrangement wiring layer, thereby improving reliability and yield and reducing manufacturing cost.

Abstract: Disclosed herein are a hybrid lamination substrate and a manufacturing method thereof. The hybrid lamination substrate includes: a core layer; at least one first insulating layer that is made of a photosensitive resin material and is formed on an upper portion, a lower portion, or upper and lower portions of the core layer; and at least one second insulating layer that is made of a non-photosensitive resin material and is formed on the upper portion, the lower portion, or the upper and lower portions of the core layer. Further, a package substrate including the same and a manufacturing method of a hybrid lamination substrate are proposed.

Abstract: The present invention relates to a via structure having an open stub and a printed circuit board having the same. In accordance with an embodiment of the present invention, a via structure having an open stub including: a signal transmission via passing through an insulating layer; upper and lower via pads for connecting first and second transmission lines, which are respectively formed on and under the insulating layer, and the signal transmission via; and at least one open stub connected to an outer periphery of each via pad to have a shunt capacitance with each ground pattern formed on and under the insulating layer is provided. Further, a printed circuit board with a via having an open stub is provided.

Abstract: Disclosed herein is a common mode filter including an internal electrode manufactured in a coil electrode form and provided with a simultaneous coil pattern in which two coil electrodes are overlapped with each other in a single layer in a direction in which a coil is wound, wherein a height of a second insulating layer formed on the internal electrode is higher than an interval between the coils. Therefore, a portion at which a parasitic capacitance is generated may be basically blocked, and a self resonant frequency (SRF) may be increased while filtering performance as the common mode filter is maintained.

Abstract: Disclosed herein is a thin film type common mode filter including: a base substrate made of an insulating material; a first insulating layer formed on the base substrate; a coil-shaped internal electrode formed on the first insulating layer; a second insulating layer formed on the internal electrode; an external electrode terminal having a vertical section connected to a side surface of the internal electrode and a horizontal section extended from an upper end of the vertical section toward a horizontal direction to thereby form a parallel surface spaced apart from the internal electrode by a predetermined distance; and a ferrite resin layer formed between the horizontal section of the external electrode terminal and the internal electrode.

Abstract: Disclosed herein is a common mode filter with an ESD protection pattern built therein. The common mode filter includes a base substrate that is made of an insulating material, a first insulating layer that is formed on the base substrate, a coil-shaped internal electrode that is formed on the first insulating layer, a second insulating layer that is formed on the internal electrode, a first external electrode terminal that is formed on the second insulating layer, a first ferrite resin layer that is formed on the second insulating layer and receives the first external electrode terminal, an ESD protection pattern that is formed on the first external electrode terminal, a second external electrode terminal that is formed on the ESD protection pattern, and a second ferrite resin layer that is formed on the first ferrite resin layer and receives the second external electrode terminal.

Abstract: Disclosed herein are a coil component and a manufacturing method thereof. The coil component includes: an electrode body including coil electrodes disposed therein, the coil electrodes having an insulating film deposited on a surface thereof; and external terminals formed at both side portions of the electrode body and connected to the coil electrodes, wherein the electrode body is made of an insulating material with which magnetic powders are mixed, in order to improve impedance characteristics.

Abstract: The present invention relates to an electrostatic discharge protection device. The electrostatic discharge protection device in accordance with an embodiment of the present invention includes a substrate, an electrostatic discharge absorbing layer having a plating film formed on the substrate, electrodes disposed on the substrate to be spaced apart from each other by a predetermined interval with the electrostatic discharge absorbing layer interposed therebetween, and an insulating layer for covering the substrate and the electrodes.

Abstract: A method of manufacturing a stacked wafer level package includes: preparing a substrate; forming a conductive layer on the substrate; forming chip connection pads and internal connection pads on the conductive layer; forming solder balls connected to the internal connection pads; mounting a semiconductor chip on the conductive layer to be connected to the chip connection pads; forming a sealing member to seal the solder balls and the semiconductor chip; separating the substrate from the conductive layer; forming a rearrangement wiring layer by etching the conductive layer; forming an external connection on the rearrangement wiring layer; forming contact holes in the sealing member to expose the solder balls; and stacking an electronic component to be electrically connected to the solder balls exposed through the contact holes.

Abstract: A method of fabricating a package substrate, includes forming a cavity in at least one region of an upper surface of a wafer, the cavity including a chip mounting region, forming a through-hole penetrating through the wafer and a via filling the through-hole, forming a first wiring layer and a second wiring layer spaced apart from the first wiring layer, which are extended into the cavity, and mounting a chip in the cavity to be connected to the first wiring layer and the second wiring layer.

Abstract: Disclosed herein are an inductor element and a manufacturing method thereof. The inductor element includes: an electrode body formed of insulating material and having an internal electrode having a coil shape disposed therein; and external terminals formed on a part of the electrode body and each connected with both ends of the internal electrode, wherein electrode body is formed and separated on a base substrate, whereby a size of the inductor element is reduced.

Abstract: Disclosed herein are a ferrite powder not including pores in a surface thereof, a method for preparing the same, and a common mode noise filter including the same as a material for a magnetic layer. The spherical ferrite powder in which the pores in the surface thereof are removed as a magnetic layer of the common mode noise filter has high density, such that dispersibility is improved, thereby making it possible to improve adhesive strength with a polymer binder to be mixed. In addition, the adhesive strength between the polymer binder and the ferrite powder is improved, such that at the time of manufacturing or mounting of a chip, a defect such as a crack generated by a thermal impact due to a lack of adhesive strength between the ferrite powder and the polymer binder may be suppressed, thereby securing the reliability with respect to the thermal impact.

Abstract: Disclosed herein are a multilayer inductor including a protecting layer including an inorganic filler having different stretching ratios in traverse and mechanical directions or an inorganic filler coated with a color former, and a protecting layer composition of a multilayer inductor, including 10 to 30 parts by weight of an inorganic filler having different stretching ratios in traverse and mechanical directions, and 10 to 30 parts by weight of a dispersant, based on 100 parts by weight of an epoxy resin, so that thermal deformation of an inductor chip can be reduced by including the inorganic filler having different stretching ratios in traverse and machine directions in the outermost insulating layer of the multilayer inductor, thereby reducing change in external appearance due to heat, thereby providing a multilayer inductor securing reliability.

Abstract: A printed circuit board and a manufacturing method of the printed circuit board are disclosed. The printed circuit board includes: a first insulation layer having a first pattern formed thereon; a first trench caved in one surface of the first insulation layer along at least a portion of the first pattern; and a second insulation layer stacked on one surface of the first insulation layer so as to cover the first pattern. The first trench is filled by the second insulation layer.

Abstract: Disclosed herein is a common mode noise filter independently including ferrite powder having pores formed in a surface thereof or including at least two kinds of ferrite powder having different particle sizes as a magnetic layer. According to the present invention, the adhesive strength between the polymer binder and the ferrite powder that are included in the magnetic layer is improved, such that at the time of manufacturing or mounting of a chip, a defect such as a crack generated by a thermal impact due to a lack of adhesive strength between the ferrite powder and the polymer binder may be suppressed, thereby securing the reliability with respect to the thermal impact.