Patents by Inventor Yu-Chang Lin
Yu-Chang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11982866Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.Type: GrantFiled: December 15, 2022Date of Patent: May 14, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
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Patent number: 11985906Abstract: A magnetic tunnel junction (MTJ) memory cell and a metallic etch mask portion are formed over a substrate. At least one dielectric etch stop layer is deposited over the metallic etch mask portion, and a via-level dielectric layer is deposited over the at least one dielectric etch stop layer. A via cavity may be etched through the via-level dielectric layer, and a top surface of the at least one dielectric etch stop layer is physically exposed. The via cavity may be vertically extended by removing portions of the at least one dielectric etch stop layer and the metallic etch mask portion. A contact via structure is formed directly on a top surface of the top electrode in the via cavity to provide a low-resistance contact to the top electrode.Type: GrantFiled: March 12, 2021Date of Patent: May 14, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Yu-Feng Yin, Tai-Yen Peng, An-Shen Chang, Han-Ting Tsai, Qiang Fu, Chung-Te Lin
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Publication number: 20240136228Abstract: A nanoFET transistor includes doped channel junctions at either end of a channel region for one or more nanosheets of the nanoFET transistor. The channel junctions are formed by a iterative recessing and implanting process which is performed as recesses are made for the source/drain regions. The implanted doped channel junctions can be controlled to achieve a desired lateral straggling of the doped channel junctions.Type: ApplicationFiled: January 2, 2024Publication date: April 25, 2024Inventors: Yu-Chang Lin, Chun-Feng Nieh, Huicheng Chang, Yee-Chia Yeo
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Patent number: 11968908Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.Type: GrantFiled: June 30, 2022Date of Patent: April 23, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tai-Yen Peng, Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang, Qiang Fu, Chen-Jung Wang
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Patent number: 11967876Abstract: An industrial heavy load electric linear actuator includes a gearbox (10), an electric motor (20), a lead screw (30), an extension pipe (40) and a load baring structure (50). The electric motor (20) is connected to the gearbox (10). A portion of the lead screw (30) is received inside the gearbox (10) and driven by the electric motor (20), and another portion of the lead screw (30) is extended out of the gearbox (10). The extension pipe (40) is movably fastened to the lead screw (30). The load bearing structure (50) includes a sleeve (51), a bearing (52), a fastening element (53), a fixation seat (54) and a rear supporting seat (55). The sleeve (51) is mounted to the lead screw (30) and holds the bearing (52) jointly with the fastening element (53). The fixation seat (54) and the rear supporting seat (55) hold the bearing (52) at outer perimeters of the sleeve (51) and the fastening element (53).Type: GrantFiled: January 18, 2022Date of Patent: April 23, 2024Assignee: TIMOTION TECHNOLOGY CO., LTD.Inventor: Yu-Chang Lin
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Publication number: 20240128876Abstract: A switching control circuit for use in controlling a resonant flyback power converter generates a first driving signal and a second driving signal. The first driving signal is configured to turn on the first transistor to generate a first current to magnetize a transformer and charge a resonant capacitor. The transformer and charge a resonant capacitor are connected in series. The second driving signal is configured to turn on the second transistor to generate a second current to discharge the resonant capacitor. During a power-on period of the resonant flyback power converter, the second driving signal includes a plurality of short-pulses configured to turn on the second transistor for discharging the resonant capacitor. A pulse-width of the short-pulses of the second driving signal is short to an extent that the second current does not exceed a current limit threshold.Type: ApplicationFiled: June 15, 2023Publication date: April 18, 2024Inventors: Yu-Chang Chen, Ta-Yung Yang, Kun-Yu Lin, Fu-Ciao Syu, Chia-Hsien Yang, Hsin-Yi Wu
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Publication number: 20240120845Abstract: A resonant flyback power converter includes: a first transistor and a second transistor which are configured to switch a transformer and a resonant capacitor for generating an output voltage; and a switching control circuit generating first and second driving signals for controlling the first and the second transistors. The turn-on of the first driving signal magnetizes the transformer. The second driving signal includes a resonant pulse having a resonant pulse width and a ZVS pulse during the DCM operation. The resonant pulse is configured to demagnetize the transformer. The resonant pulse has a first minimum resonant period for a first level of the output load and a second minimum resonant period for a second level of the output load. The first level is higher than the second level and the second minimum resonant period is shorter than the first minimum resonant period.Type: ApplicationFiled: April 14, 2023Publication date: April 11, 2024Inventors: Yu-Chang Chen, Ta-Yung Yang, Kun-Yu Lin, Hsin-Yi Wu
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Publication number: 20240120846Abstract: A resonant flyback power converter includes: a first transistor and a second transistor which are configured to switch a transformer and a resonant capacitor for generating an output voltage; and a switching control circuit generating first and second driving signals for controlling the first and the second transistors. The turn-on of the first driving signal magnetizes the transformer. During a DCM (discontinuous conduction mode) operation, the second driving signal includes a resonant pulse for demagnetizing the transformer and a ZVS (zero voltage switching) pulse for achieving ZVS of the first transistor. The resonant pulse is skipped when the output voltage is lower than a low-voltage threshold.Type: ApplicationFiled: April 14, 2023Publication date: April 11, 2024Inventors: Yu-Chang Chen, Ta-Yung Yang, Kun-Yu Lin, Hsin-Yi Wu
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Publication number: 20240113187Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having one or more interior surfaces forming a recess within an upper surface of the substrate. Source/drain regions are disposed within the substrate on opposing sides of the recess. A first gate dielectric is arranged along the one or more interior surfaces forming the recess, and a second gate dielectric is arranged on the first gate dielectric and within the recess. A gate electrode is disposed on the second gate dielectric. The second gate dielectric includes one or more protrusions that extend outward from a recessed upper surface of the second gate dielectric and that are arranged along opposing sides of the second gate dielectric.Type: ApplicationFiled: January 5, 2023Publication date: April 4, 2024Inventors: Jhu-Min Song, Ying-Chou Chen, Yi-Kai Ciou, Chien-Chih Chou, Fei-Yun Chen, Yu-Chang Jong, Chi-Te Lin
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Publication number: 20240107414Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for switching a secondary cell to a primary cell. A user equipment (UE) monitors a first radio condition of the UE for beams of a primary cell and a second radio condition for beams of one or more secondary cells configured for the UE in carrier aggregation. The UE transmits a request to configure a candidate beam of at least one candidate secondary cell as a new primary cell in response to the first radio condition not satisfying a first threshold and the second radio condition for the at least one candidate secondary cell satisfying a second threshold. A base station determines to reconfigure at least one secondary cell as the new primary cell. The base station and the UE perform a handover of the UE to the new primary cell.Type: ApplicationFiled: September 23, 2022Publication date: March 28, 2024Inventors: Yu-Chieh HUANG, Kuhn-Chang LIN, Jen-Chun CHANG, Wen-Hsin HSIA, Chia-Jou LU, Sheng-Chih WANG, Chenghsin LIN, Yeong Leong CHOO, Chun-Hsiang CHIU, Chihhung HSIEH, Kai-Chun CHENG, Chung Wei LIN
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Publication number: 20240096781Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.Type: ApplicationFiled: March 20, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
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Patent number: 11935793Abstract: A method includes forming a source/drain region in a semiconductor fin; after forming the source/drain region, implanting first impurities into the source/drain region; and after implanting the first impurities, implanting second impurities into the source/drain region. The first impurities have a lower formation enthalpy than the second impurities. The method further includes after implanting the second impurities, annealing the source/drain region.Type: GrantFiled: May 29, 2020Date of Patent: March 19, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Chang Lin, Tien-Shun Chang, Chun-Feng Nieh, Huicheng Chang, Yee-Chia Yeo
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Publication number: 20240088291Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.Type: ApplicationFiled: November 15, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Chang Sun, Sheng-Chih Lai, Yu-Wei Jiang, Kuo-Chang Chiang, TsuChing Yang, Feng-Cheng Yang, Chung-Te Lin
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Patent number: 11901235Abstract: A nanoFET transistor includes doped channel junctions at either end of a channel region for one or more nanosheets of the nanoFET transistor. The channel junctions are formed by a iterative recessing and implanting process which is performed as recesses are made for the source/drain regions. The implanted doped channel junctions can be controlled to achieve a desired lateral straggling of the doped channel junctions.Type: GrantFiled: May 25, 2022Date of Patent: February 13, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yu-Chang Lin, Chun-Feng Nieh, Huicheng Chang, Yee-Chia Yeo
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Publication number: 20230392415Abstract: A cover structure of a control box is disclosed. The control box includes a base with a limiting part, the cover structure includes a cover body, a knob and a torsion spring, the cover body is connected to the base, the knob is rotatably connected to the cover body and has a stop arm stopped at the limiting part, two ends of the torsion spring are fixed to the cover body and the knob respectively to generate a pre-torque. When the knob is rotated by an external force, the stop arm is released from the limiting part to unlock the cover structure from the base, and when the external force is removed, the knob restores to original position by the pre-torque. Therefore, the cover structure may be removed from the base quickly to facilitate an operator's use and maintenance.Type: ApplicationFiled: July 8, 2022Publication date: December 7, 2023Inventor: Yu-Chang LIN
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Publication number: 20230387024Abstract: A method includes forming a gate structure on a substrate; forming a gate spacer on a sidewall of the gate structure; forming a carbon-containing layer on the gate spacer; diffusing carbon from the carbon-containing layer into a portion of the substrate below the gate spacer; forming a recess in the substrate on one side of the gate spacer opposite to the gate structure; and forming an epitaxy feature in the recess of the substrate.Type: ApplicationFiled: August 9, 2023Publication date: November 30, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hung-Ming CHEN, Yu-Chang LIN, Chung-Ting LI, Jen-Hsiang LU, Hou-Ju LI, Chih-Pin TSAO
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Publication number: 20230377913Abstract: Embodiments of an ion cryo-implantation process utilize a post implantation heating stage to heat the implanted wafer while under the heavy vacuum used during cryo-implantation. The implanted wafer is then transferred to load locks which are held at a lesser vacuum than the heavy vacuum.Type: ApplicationFiled: August 3, 2023Publication date: November 23, 2023Inventors: Yu-Chang Lin, Tien-Shun Chang, Chun-Feng Nieh, Huicheng Chang, Yee-Chia Yeo
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Patent number: 11788611Abstract: An actuator with a worm gear positioning mechanism, which includes: a shell casing (10); a motor (20) having a worm rod (21); a transmission assembly (30) having a guiding screw rod (31), a worm gear (32) and a bearing (33), the worm gear (32) having an annular member (321) having an inner circumferential surface (322); an outer tube (40) having an outer circumferential surface (41) attached to the inner circumferential surface (322), the worm gear (32) being positioned between the worm rod (21) and the outer tube (40) on a radial direction; and a telescopic tube (50) disposed in the outer tube (40) and having an inner tube (51) and a screw nut (52), the screw nut (52) moveably screwed with the guiding screw rod (31) to make the inner tube (51) linearly movable relative to the outer tube (40).Type: GrantFiled: February 7, 2023Date of Patent: October 17, 2023Assignee: TIMOTION TECHNOLOGY CO., LTD.Inventor: Yu-Chang Lin
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Patent number: 11776911Abstract: A method includes forming a gate structure on a substrate; forming a gate spacer on a sidewall of the gate structure; forming a carbon-containing layer on the gate spacer; diffusing carbon from the carbon-containing layer into a portion of the substrate below the gate spacer; forming a recess in the substrate on one side of the gate spacer opposite to the gate structure; and forming an epitaxy feature in the recess of the substrate.Type: GrantFiled: May 26, 2021Date of Patent: October 3, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hung-Ming Chen, Yu-Chang Lin, Chung-Ting Li, Jen-Hsiang Lu, Hou-Ju Li, Chih-Pin Tsao
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Patent number: 11766115Abstract: A lifting table stand includes a pair of telescopic columns, a carrier, an actuation module, and a passive mechanism. Each telescopic column includes multiple tubes adapted to sheathe with each other and move telescopically relative to each other. The carrier includes a beam straddling the telescopic columns and a pair of support members perpendicularly connected to two ends of the beam. The actuation module includes a receiving member detachably installed to the beam and a driver connected to the receiving member. The passive mechanism includes a transmission shaft and a pair of gear sets installed in the tubes. The transmission shaft passes the driver and is connected to each gear set. Since the receiving member is detachably installed to beam, the actuation module may be changed to different types to control the elevation of the lifting table stand.Type: GrantFiled: February 2, 2023Date of Patent: September 26, 2023Assignee: TIMOTION TECHNOLOGY CO., LTD.Inventor: Yu-Chang Lin