Patents by Inventor Yu-Chang Lin

Yu-Chang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220196093
    Abstract: An electric push rod with a dual brake mechanism includes an electric motor, a transmission device, a first brake mechanism and a second brake mechanism. The electric motor has a driving wheel. The transmission device is installed on a side of the electric motor and includes a deceleration mechanism, a lead screw, a driven wheel, and a telescopic pipe. The deceleration mechanism is disposed between the driving wheel and the driven wheel. The lead screw is sheathed with the driven wheel and the driven wheel is driven by the electric motor to rotate together with the lead screw. The telescopic pipe and the lead screw are screwed and driven. The lead screw is sheathed with the first brake mechanism formed on a side edge of the driven wheel. The lead screw is sheathed with the second brake mechanism disposed between the driven wheel and the telescopic pipe.
    Type: Application
    Filed: February 22, 2021
    Publication date: June 23, 2022
    Inventor: Yu-Chang LIN
  • Publication number: 20220170588
    Abstract: A fixing mechanism for a lifting device is provided. The lifting device includes a motor and a transmission shaft driven by the motor. The fixing mechanism includes a support body, a fixing assembly, a bearing, and a connection assembly. The fixing assembly includes a base plate fixed above the support body and a chamber disposed between the base plate and the support body. A bearing is arranged in the chamber and clamped between the support body and the base plate, and the transmission shaft passes through the bearing and protrudes from the base plate. The connection assembly is sleeved on the transmission shaft to together connect with the motor. Accordingly, power transmission efficiency may be improved, and vibration and noise generated during operation of the motor may be reduced.
    Type: Application
    Filed: December 31, 2020
    Publication date: June 2, 2022
    Inventor: Yu-Chang LIN
  • Patent number: 11348835
    Abstract: A nanoFET transistor includes doped channel junctions at either end of a channel region for one or more nanosheets of the nanoFET transistor. The channel junctions are formed by a iterative recessing and implanting process which is performed as recesses are made for the source/drain regions. The implanted doped channel junctions can be controlled to achieve a desired lateral straggling of the doped channel junctions.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: May 31, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Chang Lin, Chun-Feng Nieh, Huicheng Chang, Yee-Chia Yeo
  • Publication number: 20220037465
    Abstract: A nanoFET transistor includes doped channel junctions at either end of a channel region for one or more nanosheets of the nanoFET transistor. The channel junctions are formed by a iterative recessing and implanting process which is performed as recesses are made for the source/drain regions. The implanted doped channel junctions can be controlled to achieve a desired lateral straggling of the doped channel junctions.
    Type: Application
    Filed: December 11, 2020
    Publication date: February 3, 2022
    Inventors: Yu-Chang Lin, Chun-Feng Nieh, Huicheng Chang, Yee-Chia Yeo
  • Publication number: 20220028707
    Abstract: Embodiments of an ion cryo-implantation process utilize a post implantation heating stage to heat the implanted wafer while under the heavy vacuum used during cryo-implantation. The implanted wafer is then transferred to load locks which are held at a lesser vacuum than the heavy vacuum.
    Type: Application
    Filed: July 21, 2020
    Publication date: January 27, 2022
    Inventors: Yu-Chang Lin, Tien-Shun Chang, Chun-Feng Nieh, Huicheng Chang, Yee-Chia Yeo
  • Publication number: 20210375687
    Abstract: A method includes forming a source/drain region in a semiconductor fin; after forming the source/drain region, implanting first impurities into the source/drain region; and after implanting the first impurities, implanting second impurities into the source/drain region. The first impurities have a lower formation enthalpy than the second impurities. The method further includes after implanting the second impurities, annealing the source/drain region.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 2, 2021
    Inventors: Yu-Chang Lin, Tien-Shun Chang, Chun-Feng Nieh, Huicheng Chang, Yee-Chia Yeo
  • Publication number: 20210367038
    Abstract: A FinFET is provided including a channel region containing a constituent element and excess atoms, the constituent element belonging to a group of the periodic table of elements, wherein said excess atoms are nitrogen, or belong to said group of the periodic table of elements, and a concentration of said excess atoms in the channel region is in the range between about 1019 cm?3 and about 1020 cm?3.
    Type: Application
    Filed: August 4, 2021
    Publication date: November 25, 2021
    Inventors: Yu-Chang Lin, Tien-Shun Chang, Chun-Feng Nieh, Huicheng Chang
  • Patent number: 11178962
    Abstract: A power-driven table stand with combining mechanotronics includes: a horizontal bar structure (10); a pair of supporters (20), connected at two sides of the horizontal bar structure (10); a pair of vertical post structures (30), connected to each of the supporters (20) and having a motor (31); and an electrical device (40), having a controller (41) and a guide wiring (45), wherein the controller (40) is disposed on the horizontal bar structure (10), the guide wiring (45) is stored and hidden in the horizontal bar structure (10) and each of the supporters (20), and electrically connected to the controller (41) and the motor (31). Accordingly, power wires and signal wires can be effectively and properly stored and hidden.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: November 23, 2021
    Assignees: TIMOTION TECHNOLOGY CO., LTD., ADJUSTME SOURCING APS
    Inventors: John Aage Koehn, Yu-Chang Lin
  • Publication number: 20210328044
    Abstract: A semiconductor device, and a method of manufacturing, is provided. A dummy gate is formed on a semiconductor substrate. An interlayer dielectric (ILD) is formed over the semiconductor fin. A dopant is implanted into the ILD. The dummy gate is removed and an anneal is performed on the ILD. The implantation and the anneal lead to an enhancement of channel resistance by a reduction in interlayer dielectric thickness and to an enlargement of critical dimensions of a metal gate.
    Type: Application
    Filed: June 30, 2021
    Publication date: October 21, 2021
    Inventors: Yu-Chang Lin, Tien-Shun Chang, Szu-Ying Chen, Chun-Feng Nieh, Sen-Hong Syue, Huicheng Chang
  • Patent number: 11133415
    Abstract: An embodiment is a method of manufacturing a semiconductor device. The method includes forming a fin on a substrate. A gate structure is formed over the fin. A recess is formed in the fin proximate the gate structure. A gradient doped region is formed in the fin with a p-type dopant. The gradient doped region extends from a bottom surface of the recess to a vertical depth below the recess in the fin. A source/drain region is formed in the recess and on the gradient doped regions.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: September 28, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jyun-Hao Lin, Chun-Feng Nieh, Yu-Chang Lin, Huicheng Chang
  • Publication number: 20210280516
    Abstract: A method includes forming a gate structure on a substrate; forming a gate spacer on a sidewall of the gate structure; forming a carbon-containing layer on the gate spacer; diffusing carbon from the carbon-containing layer into a portion of the substrate below the gate spacer; forming a recess in the substrate on one side of the gate spacer opposite to the gate structure; and forming an epitaxy feature in the recess of the substrate.
    Type: Application
    Filed: May 26, 2021
    Publication date: September 9, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Ming CHEN, Yu-Chang LIN, Chung-Ting LI, Jen-Hsiang LU, Hou-Ju LI, Chih-Pin TSAO
  • Patent number: 11083285
    Abstract: An electric table stand for simple assembly and adjustment includes a beam structure (10), support bars (20), and upright structures (30). Each of the support bars (20) includes a base (21) and a plurality of arms (211, 212, 213) extended from the base (21), wherein an accommodating space (A) is defined by the base (21) and the arms (211, 212, 213). One arm (213) of each of the support bars (20) supports one end of the beam structure (10), and the beam structure (10) is operatively moved in or out of the accommodating space (A). The upright structures (30) are connected to the support bars (20). Accordingly, it is easy to adjust and position each support bar (20) and each upright structure (30) on the beam structure (10).
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: August 10, 2021
    Assignees: TIMOTION TECHNOLOGY CO., LTD., ADJUSTME SOURCING APS
    Inventors: John Aage Koehn, Yu-Chang Lin
  • Patent number: 11088249
    Abstract: A FinFET is provided including a channel region containing a constituent element and excess atoms, the constituent element belonging to a group of the periodic table of elements, wherein said excess atoms are nitrogen, or belong to said group of the periodic table of elements, and a concentration of said excess atoms in the channel region is in the range between about 1019 cm?3 and about 1020 cm?3.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: August 10, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chang Lin, Tien-Shun Chang, Chun-Feng Nieh, Huicheng Chang
  • Patent number: 11056573
    Abstract: A semiconductor device, and a method of manufacturing, is provided. A dummy gate is formed on a semiconductor substrate. An interlayer dielectric (ILD) is formed over the semiconductor fin. A dopant is implanted into the ILD. The dummy gate is removed and an anneal is performed on the ILD. The implantation and the anneal lead to an enhancement of channel resistance by a reduction in interlayer dielectric thickness and to an enlargement of critical dimensions of a metal gate.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: July 6, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chang Lin, Tien-Shun Chang, Szu-Ying Chen, Chun-Feng Nieh, Sen-Hong Syue, Huicheng Chang
  • Patent number: 11024582
    Abstract: A semiconductor device includes a substrate, a carbon-containing diffusion barrier, a phosphorus-containing source/drain feature, a gate structure, and a gate spacer. The substrate has a channel region. The carbon-containing diffusion barrier is present in the substrate. The phosphorus-containing source/drain feature is present in the substrate, and the carbon-containing diffusion barrier is between the channel region and the phosphorus-containing source/drain feature. The gate is present over the channel region of the substrate. The gate spacer abuts the gate structure and is present over a portion of the phosphorus-containing source/drain feature.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: June 1, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Ming Chen, Yu-Chang Lin, Chung-Ting Li, Jen-Hsiang Lu, Hou-Ju Li, Chih-Pin Tsao
  • Publication number: 20210159226
    Abstract: A semiconductor device includes a substrate, a fin structure and an isolation layer formed on the substrate and adjacent to the fin structure. The semiconductor device includes a gate structure formed on at least a portion of the fin structure and the isolation layer. The semiconductor device includes an epitaxial layer including a strained material that provides stress to a channel region of the fin structure. The epitaxial layer has a first region and a second region, in which the first region has a first doping concentration of a first doping agent and the second region has a second doping concentration of a second doping agent. The first doping concentration is greater than the second doping concentration. The epitaxial layer is doped by ion implantation using phosphorous dimer.
    Type: Application
    Filed: February 8, 2021
    Publication date: May 27, 2021
    Inventors: Yu-Chang LIN, Chun-Feng NIEH, Huicheng CHANG, Hou-Yu CHEN, Yong-Yan LU
  • Publication number: 20210083056
    Abstract: A FinFET is provided including a channel region containing a constituent element and excess atoms, the constituent element belonging to a group of the periodic table of elements, wherein said excess atoms are nitrogen, or belong to said group of the periodic table of elements, and a concentration of said excess atoms in the channel region is in the range between about 1019 cm?3 and about 1020 cm?3.
    Type: Application
    Filed: September 17, 2019
    Publication date: March 18, 2021
    Inventors: Yu-Chang Lin, Tien-Shun Chang, Chun-Feng Nieh, Huicheng Chang
  • Patent number: 10920862
    Abstract: An actuator having a manual rotating mechanism and an anti-pinch mechanism includes an actuating body, a manual rotating mechanism, and an anti-pinch mechanism. The actuating body has a stretchable tube. The manual rotating mechanism has a sleeve assembly and a manual rotating wheel. The sleeve assembly has a central shaft and a connecting plate. The anti-pinch mechanism has a clutch wheel which is fixed to the stretchable tube and is movably sleeved around the central shaft. When the stretchable tube is blocked during a retraction stroke, the clutch wheel is detached from the connecting plate such that the clutch wheel follows the stretchable tube to idle. Therefore, the stretchable tube can be manually rotated to retract and the anti-pinch effect during the stretchable tube being retracted can be achieved.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: February 16, 2021
    Assignee: TIMOTION TECHNOLOGY CO., LTD.
    Inventor: Yu-Chang Lin
  • Patent number: D947994
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: April 5, 2022
    Inventors: Hsiang-Hung Wang, Yu-Chang Lin
  • Patent number: D947996
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: April 5, 2022
    Inventors: Hsiang-Hung Wang, Yu-Chang Lin