Abstract: A light-emitting device comprises a first semiconductor layer and a semiconductor mesa formed on the first semiconductor layer, wherein the first semiconductor layer comprises a first sidewall and a first semiconductor layer first surface surrounding the semiconductor mesa, and the semiconductor mesa comprises a second sidewall; and a first reflective structure comprising a first reflective portion covering the first sidewall and a second reflective portion covering the second sidewall, wherein the first reflective portion and the second reflective portion are connected to form a first reflective structure outer opening to expose the first semiconductor layer first surface in a top view of the light-emitting device.

Abstract: A backsheet of a solar cell module including a substrate, a first protection layer, and a second protection layer is provided. The substrate includes a first surface and a second surface opposite to each other. The first protection layer is disposed on the first surface of the substrate. The second protection layer is disposed on the second surface of the substrate, wherein the first protection layer and the second protection layer include a silicone layer. At least one of the first protection layer and the second protection layer includes diffusion particles, wherein the diffusion particles include zinc oxide, titanium dioxide modified with silicon dioxide, or a combination thereof. A thickness of the first protection layer and a thickness of the second protection layer are respectively 10 ?m to 30 ?m. A solar cell module including the backsheet is also provided.

Abstract: The disclosed invention presents a self-tracking reference circuit that compensates for IR drops and achieves the target resistance state at different temperatures after write operations. The disclosed self-tracking reference circuit includes a replica access path, a configurable resistor network, a replica selector mini-array and a step current generator that track PVT variations to provide a PVT tracking level for RRAM verify operation.

Abstract: A transparent electronic device includes an organic film, an amorphous transparent oxycarbide layer, and a matrix layer. The organic film includes a polymer containing carboxyl groups (—COOH). The amorphous transparent oxycarbide layer is disposed on the organic film and consists of a metal element, carbon element, oxygen element and an additional element. The metal element is selected from molybdenum (Mo), indium (In), tin (Sn), zinc (Zn), cadmium (Cd) and a combination thereof. An atomic number percentage of the additional element is equal to or greater than 0%, and is less than the least of an atomic number percentage of the metal element, an atomic number percentage of the oxygen element and an atomic number percentage of the carbon element. The matrix layer is disposed on the amorphous transparent oxycarbide layer. A manufacturing method of a transparent electronic device is also provided.

Abstract: Methods and apparatus for forming a semiconductor device package with a transmission line using a micro-bump layer are disclosed. The micro-bump layer may comprise micro-bumps and micro-bump lines, formed between a top device and a bottom device. A signal transmission line may be formed using a micro-bump line above a bottom device. A ground plane may be formed using a redistribution layer (RDL) within the bottom device, or using additional micro-bump lines. The RDL formed ground plane may comprise open slots. There may be RDLs at the bottom device and the top device above and below the micro-bump lines to form parts of the ground planes.

Abstract: A method of estimating greenhouse gas emission, performed by a processing device, includes: obtaining at least one time period of a number of working stations for a target manufacturing process of a product; obtaining a number of first power consumption data of the target manufacturing process, wherein the first power consumption data correspond to the working stations respectively; calculating a number of second power consumption data based on the at least one time period and the first power consumption data; searching for a number of target coefficients corresponding to the plurality of working stations respectively in coefficient database based on the target manufacturing process; and calculating greenhouse gas emission data of the target manufacturing process based on the second power consumption data and the target coefficients.

Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.

Abstract: A flash memory device and method of making the same are disclosed. The flash memory device is located on a substrate and includes a floating gate electrode, a tunnel dielectric layer located between the substrate and the floating gate electrode, a smaller length control gate electrode and a control gate dielectric layer located between the floating gate electrode and the smaller length control gate electrode. The length of a major axis of the smaller length control gate electrode is less than a length of a major axis of the floating gate electrode.

Abstract: The present invention relates to a method for preparing a modified stem cell, including the following steps: a cell culture step: culturing stem cells in a first culture medium of a culture dish at a predetermined cell density, and removing the first culture medium after a first culture time to obtain a first cell intermediate; an activity stimulation step: preserving the first cell intermediate in a freezing container having a cell cryopreservation solution, and performing a constant temperature stimulation treatment or a variable temperature stimulation treatment for at least more than 1 day; and a product collection step: after completing the activity stimulation step, placing the freezing container in an environment at a thawing temperature for thawing, and then removing the cell cryopreservation solution to obtain the modified stem cell. The modified stem cell can release at least one or more of IL-4, IL-5, IL-13, G-CSF, Fractalkine, and EGF.

Abstract: A light-emitting device comprises a substrate; a first light-emitting unit and a second light-emitting unit formed on the substrate, each of the first light-emitting unit and the second light-emitting unit comprises a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the first light-emitting unit comprises a first semiconductor mesa and a first surrounding part surrounding the first semiconductor mesa, and the second light-emitting unit comprises a second semiconductor mesa and a second surrounding part surrounding the second semiconductor mesa; a trench formed between the first light-emitting unit and the second light-emitting unit and exposing the substrate; a first insulating layer comprising a first opening on the first surrounding part and a second opening on the second semiconductor layer of the second light-emitting unit; and a connecting electrode comprising a first connecting part on the first

Abstract: Various embodiments of the present application are directed towards a control gate layout to improve an etch process window for word lines. In some embodiments, an integrated chip comprises a memory array, an erase gate, a word line, and a control gate. The memory array comprises a plurality of cells in a plurality of rows and a plurality of columns. The erase gate and the word line are elongated in parallel along a row of the memory array. The control gate is elongated along the row and is between and borders the erase gate and the word line. Further, the control gate has a pad region protruding towards the erase gate and the word line. Because the pad region protrudes towards the erase gate and the word line, a width of the pad region is spread between word-line and erase-gate sides of the control gate.

Abstract: A memory array and an operation method of the memory array are provided. The memory array includes first and second ferroelectric memory devices formed along a gate electrode, a channel layer and a ferroelectric layer between the gate electrode and the channel layer. The ferroelectric memory devices include: a common source/drain electrode and two respective source/drain electrodes, separately in contact with a side of the channel layer opposite to the ferroelectric layer, wherein the common source/drain electrode is disposed between the respective source/drain electrodes; and first and second auxiliary gates, capacitively coupled to the channel layer, wherein the first auxiliary gate is located between the common source/drain electrode and one of the respective source/drain electrodes, and the second auxiliary gate is located between the common source/drain electrode and the other respective source/drain electrode.

Abstract: A semiconductor package including a ring structure with one or more indents and a method of forming are provided. The semiconductor package may include a substrate, a first package component bonded to the substrate, wherein the first package component may include a first semiconductor die, a ring structure attached to the substrate, wherein the ring structure may encircle the first package component in a top view, and a lid structure attached to the ring structure. The ring structure may include a first segment, extending along a first edge of the substrate, and a second segment, extending along a second edge of the substrate. The first segment and the second segment may meet at a first corner of the ring structure, and a first indent of the ring structure may be disposed at the first corner of the ring structure.

Abstract: A mobile device includes a housing, a first radiation element, a second radiation element, a third radiation element, a first switch element, and a second switch element. The first radiation element has a first feeding point. The second radiation element has a second feeding point. The first radiation element, the second radiation element, and the third radiation element are distributed over the housing. The first switch element is closed or open, so as to selectively couple the first radiation element to the third radiation element. The second switch element is closed or open, so as to selectively couple the second radiation element to the third radiation element. An antenna structure is formed by the first radiation element, the second radiation element, and the third radiation element.

Abstract: A transparent electronic device includes an organic film, an amorphous transparent oxycarbide layer, and a matrix layer. The organic film includes a polymer containing carboxyl groups (—COOH). The amorphous transparent oxycarbide layer is disposed on the organic film and consists of a metal element, carbon element, oxygen element and an additional element. The metal element is selected from molybdenum (Mo), indium (In), tin (Sn), zinc (Zn), cadmium (Cd) and a combination thereof. An atomic number percentage of the additional element is equal to or greater than 0%, and is less than the least of an atomic number percentage of the metal element, an atomic number percentage of the oxygen element and an atomic number percentage of the carbon element. The matrix layer is disposed on the amorphous transparent oxycarbide layer. A manufacturing method of a transparent electronic device is also provided.

Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.

Abstract: A scheduling method of scheduling a target wake time (TWT) communication between an access point and at least one station. The scheduling method includes the access point adjusting a broadcast TWT schedule according to a power saving setting, and the access point transmitting the broadcast TWT schedule. The broadcast TWT schedule includes a broadcast TWT SP start time, a broadcast TWT service period and a broadcast TWT interval.

Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer includes a lateral outer perimeter surface surrounding the active layer; a plurality of vias penetrating the semiconductor stack to expose the first semiconductor layer; a first pad portion and a second pad portion formed on the semiconductor stack to respectively electrically connected to the first semiconductor layer and the second semiconductor layer, wherein the second pad portion and the first pad portion are arranged in a first direction; wherein the plurality of vias is arranged in a plurality of rows, the plurality of rows are arranged in the first direction and includes a first row and a second row, the first row is covered by the second pad portion, the second row is not covered by the first pad portion and the second pad portion, whe

Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; one or multiple vias penetrating the active layer and the second semiconductor layer to expose the first semiconductor layer; a first contact layer covering the one or multiple vias; a third insulating layer including a first group of one or multiple third insulating openings on the second semiconductor layer to expose the first contact layer; a first pad on the semiconductor stack and covering the first group of one or multiple third insulating openings; and a second pad on the semiconductor stack and separated from the first pad with a distance, wherein the second pad is formed at a position other than positions of the one or multiple vias in a top view of the light-emitting device.

Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.