Patents by Inventor Yu-Ling Lin

Yu-Ling Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230238488
    Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.
    Type: Application
    Filed: March 7, 2023
    Publication date: July 27, 2023
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Tsung-Hsun CHIANG, Bo-Jiun HU, Wen-Hung CHUANG, Yu-Ling LIN
  • Publication number: 20230215998
    Abstract: A light-emitting device includes a semiconductor stack, first and second insulative layers, a reflective conductive structure, and first and second pads. The semiconductor stack includes a first semiconductor layer, and a mesa having an active region having a second semiconductor layer and formed on the first semiconductor layer. The first insulative layer is formed on the semiconductor stack and has first openings. The reflective conductive structure is formed on the first insulative layer and is electrically connected to the second semiconductor layer through the first openings. The second insulative layer is formed on the reflective conductive structure and includes second openings and a contact area covering portions overlapped with the first and second openings. A first pad is formed on the second insulative layer and electrically connected to the first semiconductor layer. A second pad formed on the second insulative layer and electrically connected to the second semiconductor layer.
    Type: Application
    Filed: December 28, 2022
    Publication date: July 6, 2023
    Inventors: Chao-Hsing CHEN, Meng-Hsiang HONG, Chi-Shiang HSU, Yen-Liang KUO, Chien-Ya HUNG, Yong-Yang CHEN, Yu-Ling LIN, Xue-Cheng YAO
  • Patent number: 11658269
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; one or multiple vias penetrating the active layer and the second semiconductor layer to expose the first semiconductor layer; a first contact layer covering the one or multiple vias; a third insulating layer including a first group of one or multiple third insulating openings on the second semiconductor layer to expose the first contact layer; a first pad on the semiconductor stack and covering the first group of one or multiple third insulating openings; and a second pad on the semiconductor stack and separated from the first pad with a distance, wherein the second pad is formed at a position other than positions of the one or multiple vias in a top view of the light-emitting device.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: May 23, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Bo-Jiun Hu, Tsung-Hsun Chiang, Wen-Hung Chuang, Kuan-Yi Lee, Yu-Ling Lin, Chien-Fu Shen, Tsun-Kai Ko
  • Publication number: 20230155041
    Abstract: A transparent electronic device includes an organic film, an amorphous transparent oxycarbide layer, and a matrix layer. The organic film includes a polymer containing carboxyl groups (—COOH). The amorphous transparent oxycarbide layer is disposed on the organic film and consists of a metal element, carbon element, oxygen element and an additional element. The metal element is selected from molybdenum (Mo), indium (In), tin (Sn), zinc (Zn), cadmium (Cd) and a combination thereof. An atomic number percentage of the additional element is equal to or greater than 0%, and is less than the least of an atomic number percentage of the metal element, an atomic number percentage of the oxygen element and an atomic number percentage of the carbon element. The matrix layer is disposed on the amorphous transparent oxycarbide layer. A manufacturing method of a transparent electronic device is also provided.
    Type: Application
    Filed: October 21, 2022
    Publication date: May 18, 2023
    Inventors: Yu-Ling LIN, Tsung-Ying KE
  • Publication number: 20220409552
    Abstract: The present invention provides novel pharmaceutical formulations comprising derivatives of NDGA, including M4N (tetra-0-methyl nordihydroguaiaretic acid) and temozolomide and their use in the inhibition and treatment of neoplastic diseases, including glioblastoma multiforme, lung and other cancers.
    Type: Application
    Filed: November 25, 2020
    Publication date: December 29, 2022
    Inventors: Ru Chih C. Huang, Jong Ho Chun, Yu-Ling Lin, Yu-Chuan LIang, Kuang-Wen Liao, Tiffany Jackson, David Mold, Chien-Hsien Lai
  • Publication number: 20220388202
    Abstract: A multi-shot moulding part structure includes a first structural part, an ink decoration layer, and a second structural part. The first structural part has a first area surface, a second area surface, and a joining surface located on the second area surface. The joining surface is non-parallel to the second area surface. The ink decoration layer is spread on the first area surface and the second area surface, but not on the joining surface. The second structural part is combined with the first structural part and covers the second area surface. The second structural part touches the joining surface. By the second structural part touching the joining surface of the first structural part that is not coated with the ink decoration layer, the structural bonding strength between the first structural part and the second structural part is enhanced.
    Type: Application
    Filed: August 31, 2021
    Publication date: December 8, 2022
    Applicants: Inventec (Pudong) Technology Corp., Inventec Corporation
    Inventors: Wen-Ching Lin, Ting-Yu Wang, Fa-Chih Ke, Yu-Ling Lin, Wen-Hsiang Chen
  • Patent number: 11410952
    Abstract: An integrated circuit package includes a die. An electrically conductive layer comprises a redistribution layer (RDL) in the die, or a micro-bump layer above the die, or both. The micro bump layer comprises at least one micro-bump line. A filter comprises the electrically conductive layer. A capacitor comprises an electrode formed in the electrically conductive layer.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: August 9, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiao-Tsung Yen, Jhe-Ching Lu, Yu-Ling Lin, Chin-Wei Kuo, Min-Chie Jeng
  • Publication number: 20220231196
    Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer includes a lateral outer perimeter surface surrounding the active layer; a plurality of vias penetrating the semiconductor stack to expose the first semiconductor layer; a first pad portion and a second pad portion formed on the semiconductor stack to respectively electrically connected to the first semiconductor layer and the second semiconductor layer, wherein the second pad portion and the first pad portion are arranged in a first direction; wherein the plurality of vias is arranged in a plurality of rows, the plurality of rows are arranged in the first direction and includes a first row and a second row, the first row is covered by the second pad portion, the second row is not covered by the first pad portion and the second pad portion, whe
    Type: Application
    Filed: April 4, 2022
    Publication date: July 21, 2022
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Tsung-Hsun CHIANG, Bo-Jiun HU, Wen-Hung CHUANG, Yu-Ling LIN
  • Patent number: 11329195
    Abstract: A semiconductor light-emitting device includes a substrate; a first semiconductor layer and a second semiconductor layer formed on the substrate, wherein the first semiconductor layer includes a first exposed portion and a second portion; a plurality of first trenches formed on the substrate and including a surface composed by the first exposed portion; a second trench formed on the substrate and including a surface composed by the second exposed portion at a periphery region of the semiconductor light-emitting device, wherein each of the plurality of first trenches is branched from the second trench; and a patterned metal layer formed on the second semiconductor layer and including a first metal region and a second metal region, and portions of the second metal region are formed in the plurality of first trenches and the second trench to electrically connect to the first exposed portion and the second exposed portion.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: May 10, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Tsung-Hsun Chiang, Bo-Jiun Hu, Wen-Hung Chuang, Yu-Ling Lin
  • Patent number: 11145767
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a floating substrate; and a capacitor grounded and connected to the floating substrate. A method of manufacturing a semiconductor structure is also provided.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: October 12, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsiao-Tsung Yen, Yu-Ling Lin, Chin-Wei Kuo, Ho-Hsiang Chen, Chewn-Pu Jou, Min-Chie Jeng
  • Publication number: 20210313388
    Abstract: A light-emitting device comprises a substrate; a first light-emitting unit and a second light-emitting unit formed on the substrate, each of the first light-emitting unit and the second light-emitting unit comprises a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the first light-emitting unit comprises a first semiconductor mesa and a first surrounding part surrounding the first semiconductor mesa, and the second light-emitting unit comprises a second semiconductor mesa and a second surrounding part surrounding the second semiconductor mesa; a trench formed between the first light-emitting unit and the second light-emitting unit and exposing the substrate; a first insulating layer comprising a first opening on the first surrounding part and a second opening on the second semiconductor layer of the second light-emitting unit; and a connecting electrode comprising a first connecting part on the first
    Type: Application
    Filed: June 15, 2021
    Publication date: October 7, 2021
    Inventors: Chao-Hsing CHEN, I-Lun MA, Bo-Jiun HU, Yu-Ling LIN, Chien-Chih LIAO
  • Patent number: 11063087
    Abstract: A light-emitting device includes a substrate; a first light-emitting unit and a second light-emitting unit formed on the substrate, each of the first light-emitting unit and the second light-emitting unit includes a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; a trench formed between the first light-emitting unit and the second light-emitting unit, and exposing the substrate; and a connecting electrode including a first connecting part on the first light-emitting unit and connected to the first semiconductor layer of the first light-emitting unit, a second connecting part on the second light-emitting unit and connected to the second semiconductor layer of the second light-emitting unit, and a third connecting part formed in the trench to connect the first connecting part and the second connecting part.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: July 13, 2021
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, I-Lun Ma, Bo-Jiun Hu, Yu-Ling Lin, Chien-Chih Liao
  • Publication number: 20210210659
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; one or multiple vias penetrating the active layer and the second semiconductor layer to expose the first semiconductor layer; a first contact layer covering the one or multiple vias; a third insulating layer including a first group of one or multiple third insulating openings on the second semiconductor layer to expose the first contact layer; a first pad on the semiconductor stack and covering the first group of one or multiple third insulating openings; and a second pad on the semiconductor stack and separated from the first pad with a distance, wherein the second pad is formed at a position other than positions of the one or multiple vias in a top view of the light-emitting device.
    Type: Application
    Filed: March 19, 2021
    Publication date: July 8, 2021
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Bo-Jiun HU, Tsung-Hsun CHIANG, Wen-Hung CHUANG, Kuan-Yi LEE, Yu-Ling LIN, Chien-Fu SHEN, Tsun-Kai KO
  • Patent number: 10985295
    Abstract: A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first contact layer on the first semiconductor layer; a second contact layer on the second semiconductor layer, wherein the first contact layer and the second contact layer comprise a metal material other than gold (Au) or copper (Cu); a first pad on the semiconductor stack; a second pad on the semiconductor stack.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: April 20, 2021
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Bo-Jiun Hu, Tsung-Hsun Chiang, Wen-Hung Chuang, Kuan-Yi Lee, Yu-Ling Lin, Chien-Fu Shen, Tsun-Kai Ko
  • Patent number: 10971296
    Abstract: A device includes a substrate, and a vertical inductor over the substrate. The vertical inductor includes a plurality of parts formed of metal, wherein each of the parts extends in one of a plurality of planes perpendicular to a major surface of the substrate. Metal lines interconnect neighboring ones of the plurality of parts of the vertical inductor.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: April 6, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiao-Tsung Yen, Huan-Neng Chen, Yu-Ling Lin, Chin-Wei Kuo, Mei-Show Chen, Ho-Hsiang Chen, Min-Chie Jeng
  • Publication number: 20210082848
    Abstract: Methods and apparatus for forming a semiconductor device package with a transmission line using a micro-bump layer are disclosed. The micro-bump layer may comprise micro-bumps and micro-bump lines, formed between a top device and a bottom device. A signal transmission line may be formed using a micro-bump line above a bottom device. A ground plane may be formed using a redistribution layer (RDL) within the bottom device, or using additional micro-bump lines. The RDL formed ground plane may comprise open slots. There may be RDLs at the bottom device and the top device above and below the micro-bump lines to form parts of the ground planes.
    Type: Application
    Filed: November 16, 2020
    Publication date: March 18, 2021
    Inventors: Chin-Wei Kuo, Hsiao-Tsung Yen, Min-Chie Jeng, Yu-Ling Lin
  • Publication number: 20210036049
    Abstract: A light-emitting diode, includes a substrate; a semiconductor stack formed on the substrate; a first current blocking patterned structure and a second current blocking patterned structure formed on the semiconductor stack and separated from each other; and a plurality of electrodes formed on the semiconductor stack and electrically connected to the semiconductor stack; wherein the first current blocking patterned structure is overlapped with one of the plurality of electrodes and the second current blocking patterned structure is not overlapped with the plurality of electrodes.
    Type: Application
    Filed: July 30, 2020
    Publication date: February 4, 2021
    Inventors: Hsin Ying WANG, Tzung Shiun YEH, Yu Ling LIN, Bo Jiun HU
  • Patent number: 10899050
    Abstract: The present subject matter relates to fabrication of micro-arc oxidation (MAO) based insert-molded components. In an example implementation, a method of fabricating a MAO based insert-molded component comprises forming an insert-molded component and oxidizing the insert-molded component through MAO. The insert-molded component has a metal body molded with a plastic body. On oxidation of the insert-molded component through MAO an oxide layer is formed on the metal body.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: January 26, 2021
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Chi Hao Chang, Kuan-Ting Wu, Yu-Ling Lin
  • Patent number: 10840201
    Abstract: Methods and apparatus for forming a semiconductor device package with a transmission line using a micro-bump layer are disclosed. The micro-bump layer may comprise micro-bumps and micro-bump lines, formed between a top device and a bottom device. A signal transmission line may be formed using a micro-bump line above a bottom device. A ground plane may be formed using a redistribution layer (RDL) within the bottom device, or using additional micro-bump lines. The RDL formed ground plane may comprise open slots. There may be RDLs at the bottom device and the top device above and below the micro-bump lines to form parts of the ground planes.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: November 17, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin-Wei Kuo, Hsiao-Tsung Yen, Min-Chie Jeng, Yu-Ling Lin
  • Publication number: 20200357956
    Abstract: A semiconductor light-emitting device includes a substrate; a first semiconductor layer and a second semiconductor layer formed on the substrate, wherein the first semiconductor layer includes a first exposed portion and a second portion; a plurality of first trenches formed on the substrate and including a surface composed by the first exposed portion; a second trench formed on the substrate and including a surface composed by the second exposed portion at a periphery region of the semiconductor light-emitting device, wherein each of the plurality of first trenches is branched from the second trench; and a patterned metal layer formed on the second semiconductor layer and including a first metal region and a second metal region, and portions of the second metal region are formed in the plurality of first trenches and the second trench to electrically connect to the first exposed portion and the second exposed portion.
    Type: Application
    Filed: July 24, 2020
    Publication date: November 12, 2020
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Tsung-Hsun CHIANG, Bo-Jiun HU, Wen-Hung CHUANG, Yu-Ling LIN