Patents by Inventor YUAN HUANG

YUAN HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961738
    Abstract: In a method of forming a pattern, a first pattern is formed over an underlying layer, the first pattern including main patterns and a lateral protrusion having a thickness of less than 25% of a thickness of the main patterns, a hard mask layer is formed over the first pattern, a planarization operation is performed to expose the first pattern without exposing the lateral protrusion, a hard mask pattern is formed by removing the first pattern while the lateral protrusion being covered by the hard mask layer, and the underlying layer is patterned using the hard mask pattern as an etching mask.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Ta Chen, Hua-Tai Lin, Han-Wei Wu, Jiann-Yuan Huang
  • Patent number: 11961714
    Abstract: A substrate processing apparatus comprises a chamber member that defines an interior volume that has an aspect ratio. The chamber member comprises a pair of laterally opposing inlet walls and a loading port. Each of the pair of laterally opposing inlet walls has an inlet port configured to receive output from a remote plasma source. The loading port is arranged between the pair of inlet walls, configured to allow passage of a substrate into the interior volume.
    Type: Grant
    Filed: May 31, 2021
    Date of Patent: April 16, 2024
    Assignee: LINCO TECHNOLOGY CO., LTD.
    Inventors: Yi-Yuan Huang, Yi-Cheng Liu
  • Publication number: 20240119283
    Abstract: A method of performing automatic tuning on a deep learning model includes: utilizing an instruction-based learned cost model to estimate a first type of operational performance metrics based on a tuned configuration of layer fusion and tensor tiling; utilizing statistical data gathered during a compilation process of the deep learning model to determine a second type of operational performance metrics based on the tuned configuration of layer fusion and tensor tiling; performing an auto-tuning process to obtain a plurality of optimal configurations based on the first type of operational performance metrics and the second type of operational performance metrics; and configure the deep learning model according to one of the plurality of optimal configurations.
    Type: Application
    Filed: October 6, 2023
    Publication date: April 11, 2024
    Applicant: MEDIATEK INC.
    Inventors: Jui-Yang Hsu, Cheng-Sheng Chan, Jen-Chieh Tsai, Huai-Ting Li, Bo-Yu Kuo, Yen-Hao Chen, Kai-Ling Huang, Ping-Yuan Tseng, Tao Tu, Sheng-Je Hung
  • Publication number: 20240120639
    Abstract: A 3D IC package is provided. The 3D IC package includes: a first IC die comprising a first substrate at a back side of the first IC die; a second IC die stacked at the back side of the first IC die and facing the first substrate; a TSV through the first substrate and electrically connecting the first IC die and the second IC die, the TSV having a TSV cell including a TSV cell boundary surrounding the TSV; and a protection module fabricated in the first substrate, wherein the protection module is electrically connected to the TSV, and the protection module is within the TSV cell.
    Type: Application
    Filed: August 10, 2023
    Publication date: April 11, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Hsiang Huang, Fong-Yuan Chang, Tsui-Ping Wang, Yi-Shin Chu
  • Publication number: 20240121755
    Abstract: Methods and device for paging configuration and power saving in wireless terminal devices are disclosed. The disclosed method may be performed by a wireless terminal device. The method may include receiving paging subgroup configuration information from a wireless network; determining a paging subgroup identifier based on the paging subgroup configuration information and a paging subgroup mode of the wireless terminal device; and determining whether to wake up to monitor a paging occasion based on whether the paging subgroup identifier is indicated prior to an arrival of the paging occasion.
    Type: Application
    Filed: December 15, 2023
    Publication date: April 11, 2024
    Applicant: ZTE Corporation
    Inventors: Fei DONG, He HUANG, Yuan GAO
  • Publication number: 20240117297
    Abstract: A p-aminobenzoic acid-producing microorganism is provided. The p-aminobenzoic acid-producing microorganism is obtained by a method for preparing a p-aminobenzoic acid-producing microorganism. The method for preparing a p-aminobenzoic acid-producing microorganism includes (a) performing an acclimation process on a source microorganism with at least one sulfonamide antibiotic to obtain at least one acclimatized microorganism and (b) screening out at least one p-aminobenzoic acid-producing microorganism from the at least one acclimatized microorganism, wherein the at least one p-aminobenzoic acid-producing microorganism has a higher p-aminobenzoic acid titer than the source microorganism.
    Type: Application
    Filed: December 29, 2022
    Publication date: April 11, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Pei-Ching CHANG, Jhong-De LIN, Ya-Lin LIN, Hung-Yu LIAO, Hsiang Yuan CHU, Jie-Len HUANG
  • Patent number: 11954152
    Abstract: The present specification discloses video matching. In a computer-implemented method, a plurality of feature vectors of a target video is obtained. A candidate video similar to the target video is retrieved from a video database based on the plurality of feature vectors of the target video. A time domain similarity matrix feature map is constructed between the target video and the candidate video based on the target video and the candidate video. Using the time domain similarity matrix feature map as an input into a deep learning detection model, a video segment matching the target video in the candidate video and a corresponding similarity is output.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: April 9, 2024
    Assignee: Alipay (Hangzhou) Information Technology Co., Ltd.
    Inventors: Chen Jiang, Wei Zhang, Qing Wang, Yuan Cheng, Furong Xu, Kaiming Huang, Xiaobo Zhang, Feng Qian, Xudong Yang, Tan Pan
  • Publication number: 20240111116
    Abstract: An anti-twist structure of voice coil motor includes a base, a lens housing, an elastic sheet, a magnet, and a yoke member. The lens housing has a margin wall, and the margin wall has a first protrusion and a contact portion. The elastic sheet has a hollowed slot, and the first protrusion pass through the hollowed slot, so that the elastic sheet is disposed on a portion of the margin wall and on the contact portion. The yoke member has an upper wall and a side wall. The side wall is disposed at one side of the upper wall and the side wall extends outward in a direction not parallel to the upper wall. The yoke member surrounds the lens housing, the elastic sheet, and the magnet. The lens housing has a deflectable angle relative to a horizontal reference line.
    Type: Application
    Filed: December 7, 2023
    Publication date: April 4, 2024
    Applicant: Lanto Electronic Limited
    Inventors: Wen-Yen Huang, Meng-Ting Lin, Fu-Yuan Wu, Shang-Yu Hsu, Bing-Bing Ma, Jie Du
  • Publication number: 20240113010
    Abstract: A semiconductor device is disclosed herein. The semiconductor device includes a routing structure. The routing structure has an intermediate conductive routing layer. The intermediate conductive routing layer includes a first mesh conductive layer formed in a predetermined second region of the semiconductor device and a second mesh conductive layer formed in a predetermined first region of the semiconductor device. The first mesh conductive layer and the second mesh conductive layer are electrically isolated from each other. The intermediate conductive routing layer further includes multiple first conductive islands formed in the predetermined first region and multiple second conductive islands formed in the predetermined second region.
    Type: Application
    Filed: September 20, 2023
    Publication date: April 4, 2024
    Inventors: Po-Hsien Huang, Yu-Huei Lee, Hsin-Hung Lin, Chun-Yuan Shih, Lien-Chieh Yu
  • Publication number: 20240103244
    Abstract: An anti-twist structure of voice coil motor includes a base, a lens housing, an elastic sheet, a magnet, and a yoke member. The lens housing has a margin wall, and the margin wall has a first protrusion and a contact portion. The elastic sheet has a hollowed slot, and the first protrusion pass through the hollowed slot, so that the elastic sheet is disposed on a portion of the margin wall and on the contact portion. The yoke member has an upper wall and a side wall. The side wall is disposed at one side of the upper wall and the side wall extends outward in a direction not parallel to the upper wall. The yoke member surrounds the lens housing, the elastic sheet, and the magnet. The lens housing has a deflectable angle relative to a horizontal reference line.
    Type: Application
    Filed: December 7, 2023
    Publication date: March 28, 2024
    Applicant: Lanto Electronic Limited
    Inventors: Wen-Yen Huang, Meng-Ting Lin, Fu-Yuan Wu, Shang-Yu Hsu, Bing-Bing Ma, Jie Du
  • Publication number: 20240107804
    Abstract: A display substrate and a display device are provided. The display substrate includes a display region including light emitting units; the light emitting units are arranged into light emitting unit rows, and the light emitting units in one of the light emitting unit rows are arranged along a first direction; the light emitting units include first light emitting units. In at least part of the display region: distances, in the first direction, between a light emitting region of one first light emitting unit and light emitting regions of two of the first light emitting units adjacent to the one first light emitting units are different, and/or distances, in a second direction, between a light emitting region of one first light emitting units and the light emitting regions of two of the first light emitting units adjacent to the one first light emitting units are different.
    Type: Application
    Filed: May 31, 2021
    Publication date: March 28, 2024
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Mingwen WANG, Yao HUANG, Xingliang XIAO, Zhong LU, Yuan CHEN, Yamei ZHOU, Yu SONG, Wei HU, Fuqiang LIN
  • Publication number: 20240105619
    Abstract: Semiconductor devices and methods of manufacture are provided wherein a metallization layer is located over a substrate, and a power grid line is located within the metallization layer. A signal pad is located within the metallization layer and the signal pad is surrounded by the power grid line. A signal external connection is electrically connected to the signal pad.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 28, 2024
    Inventors: Fong-Yuan Chang, Noor Mohamed Ettuveettil, Po-Hsiang Huang, Sen-Bor Jan, Ming-Fa Chen, Chin-Chou Liu, Yi-Kan Cheng
  • Publication number: 20240105546
    Abstract: A module device on a first substrate includes a power module, a housing, a pair of locking structures. The housing covers the power module. The locking structures are installed on a pair of opposite sides of the housing, and the locking structure includes a main body, a locking ring, a pair of ribs and anchoring portions. The locking ring extends from a side toward an inner side of the main body, and is a double-ring structure, which includes an inner and an outer ring. A first side of the outer ring is connected to the main body, a second side of the outer ring is connected to the inner ring. The ribs extend along a normal direction of the top surface of the main body. The anchoring portions are disposed at the end of the ribs, and an extending direction is perpendicular to an extending direction of the rib.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 28, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Ji-Yuan Syu, Yuan-Cheng Huang, Yu-Chih Wang
  • Publication number: 20240105351
    Abstract: A method for measuring drop time of a control rod cluster integrated with a rod position measurement device is provided, wherein the method is used to measure the drop time of each control rod cluster, and includes: Si, monitoring a voltage Ua of coils in Group A to capture a rod cluster drop signal; S2, searching a point (tmax, Vmax) with a maximum drop speed or with a local maximum drop speed; S3, retroactively calculating, from tmax, an end of a time period T4 when the control rod cluster starts to drop; S4, retroactively searching, from a minimum value point of a drop reference signal DROPref, a start of the time period T4 when the drop reference signal DROPref drops from a maximum value to 33% thereof; and S5, determining, from tmax forward, a time point t6 when a drop speed of the control rod cluster is lower than 0.
    Type: Application
    Filed: January 14, 2021
    Publication date: March 28, 2024
    Applicant: NUCLEAR POWER OPERATIONS RESEARCH INSTITUTE (NPRI)
    Inventors: Zhengke CHANG, Minghui ZHANG, Yuan HUANG, Ye TIAN, Shaohua XU, Xinxin LIU, Weijian ZHU, Yiming MA, Shengfeng XU, Bo CHAO, Ning TAO, Zihua YANG, Desong LANG, Qichao WANG
  • Patent number: 11942906
    Abstract: The present invention provides a transmitter including a mixer, a harmonic impedance adjustment circuit and an amplifier. The mixer is configured to mix a first baseband signal with a first oscillation signal to generate a first mixed signal to a first node, and to mix a second baseband signal with a second oscillation signal to generate a second mixed signal to a second node. The harmonic impedance adjustment circuit is coupled between the first node and the second node, and is configured to reduce harmonic components of the first mixed signal and the second mixed signal to generate an adjusted first mixed signal and an adjusted second mixed signal. The amplifier is coupled to the harmonic impedance adjustment circuit, and is configured to generate an amplified signal according to the adjusted first mixed signal and the adjusted second mixed signal.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: March 26, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ting-Yao Huang, Teng-Yuan Chang, Po-Chih Wang, Ka-Un Chan
  • Patent number: 11939664
    Abstract: A semiconductor process system includes a process chamber. The process chamber includes a wafer support configured to support a wafer. The system includes a bell jar configured to be positioned over the wafer during a semiconductor process. The interior surface of the bell jar is coated with a rough coating. The rough coating can include zirconium.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Meng-Chun Hsieh, Tsung-Yu Tsai, Hsing-Yuan Huang, Chih-Chang Wu, Szu-Hua Wu, Chin-Szu Lee
  • Patent number: 11939212
    Abstract: A MEMS device is provided. The MEMS device includes a substrate having at least one contact, a first dielectric layer disposed on the substrate, at least one metal layer disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer and the metal layer and having a recess structure, and a structure layer disposed on the second dielectric layer and having an opening. The opening is disposed on and corresponds to the recess structure, and the cross-sectional area at the bottom of the opening is smaller than the cross-sectional area at the top of the recess structure. The MEMS device also includes a sealing layer, and at least a portion of the sealing layer is disposed in the opening and the recess structure. The second dielectric layer, the structure layer, and the sealing layer define a chamber.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: March 26, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Heng-Chung Chang, Jhih-Jie Huang, Chih-Ya Tsai, Jing-Yuan Lin
  • Publication number: 20240095467
    Abstract: Translating applications to a target language includes extracting program integrated information (PII) to be translated and creating translation context datasets based on interpretation of accessibility information associated with particular strings of PII. Translation pairs include PII and corresponding context datasets for context-based translation of application components. A two-stage index contains PII strings for first stage lookup and context datasets for distinguishing duplicate PII strings as a second stage lookup. Real-time translation is facilitated by the two-stage index, which is established by translation pairs and resulting translations.
    Type: Application
    Filed: September 16, 2022
    Publication date: March 21, 2024
    Inventors: CHIH-YUAN LIN, Jin Shi, Shu-Chih Chen, PEI-YI LIN, Chao Yuan Huang
  • Publication number: 20240099147
    Abstract: In some embodiments, the present disclosure relates to a method in which a first set of one or more voltage pulses is applied to a piezoelectric device over a first time period. During the first time period, the method determines whether a performance parameter of the piezoelectric device has a first value that deviates from a reference value by more than a predetermined value. Based on whether the first value deviates from the reference value by more than the predetermined value, the method selectively applies a second set of one or more voltage pulses to the piezoelectric device over a second time period. The second time period is after the first time period and the second set of one or more voltage pulses differs in magnitude and/or polarity from the first set of one or more voltage pulses.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 21, 2024
    Inventors: Chi-Yuan Shih, Shih-Fen Huang, You-Ru Lin, Yan-Jie Liao
  • Publication number: 20240096800
    Abstract: A semiconductor device includes first and second active regions extending in parallel in a substrate, a plurality of conductive patterns, each conductive pattern of the plurality of conductive patterns extending on the substrate across each of the first and second active regions, and a plurality of metal lines, each metal line of the plurality of metal lines overlying and extending across each of the first and second active regions. Each conductive pattern of the plurality of conductive patterns is electrically connected in parallel with each metal line of the plurality of metal lines.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 21, 2024
    Inventors: Fei Fan DUAN, Fong-yuan CHANG, Chi-Yu LU, Po-Hsiang HUANG, Chih-Liang CHEN