Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated chip structure. The method may be performed by forming a plurality of interconnect layers within a first interconnect structure disposed over an upper surface of a first semiconductor substrate. An edge trimming process is performed to remove parts of the first interconnect structure and the first semiconductor substrate along a perimeter of the first semiconductor substrate. The edge trimming process results in the first semiconductor substrate having a recessed surface coupled to the upper surface by way of an interior sidewall disposed directly over the first semiconductor substrate. A dielectric capping structure is formed onto a sidewall of the first interconnect structure after performing the edge trimming process.

Abstract: A method and a platform for detecting an immunogenicity of a tumor neoantigen are provided. Specifically, the detection method includes the following steps: culturing human peripheral blood monocytes ex vivo for 13 days, adding an antigenic peptide fragment of human influenza virus and stimulating and activating cytokines, antigenic peptides, and immunoadjuvants during the 13 days, and finally conducting enzyme-linked immunospot (ELISPOT) chromogenic reaction and instrument-based scanning, counting, and analysis to detect the immunogenicity of tumor neoantigen. An application of the detection method and platform in biomedicine is provided. Compared with the prior art, the detection method and platform have advantages and characteristics of a short detection period, high convenience, low consumption of experimental cells, and low detection cost. Therefore, the detection method and platform can be used for ex vivo high-throughput assay for the immunogenicity of the tumor neoantigen.

Abstract: A three dimensional Integrated Circuit (IC) Power Grid (PG) may be provided. The three dimensional IC PG may comprise a first IC die, a second IC die, an interface, and a power distribution structure. The interface may be disposed between the first IC die and the second IC die. The power distribution structure may be connected to the interface. The power distribution structure may comprise at least one Through-Silicon Vias (TSV) and a ladder structure connected to at least one TSV.

Abstract: Semiconductor devices and methods of manufacture are provided wherein a metallization layer is located over a substrate, and a power grid line is located within the metallization layer. A signal pad is located within the metallization layer and the signal pad is surrounded by the power grid line. A signal external connection is electrically connected to the signal pad.

Abstract: A method for identifying hard-coded strings in source code is disclosed. In one embodiment, such a method parses source code and associated localization resource files to identify hard-coded strings and their associated context. The method provides a confidence score for each hard-coded string that indicates whether the hard-coded string is translatable or non-translatable. Based on the confidence score for each hard-coded string, the method transforms each hard-coded string into a single equivalence word. The method then prepares training data by tagging the hard-coded strings in the source code and associated localization resource files as one of translatable and non-translatable. The method then trains a parts-of-speech (POS) tagging model using the training data. At runtime, the method fetches potential hard-coded strings and tags each hard-coded string as one of translatable and non-translatable using the POS tagging model. A corresponding system and computer program product are also disclosed.

Abstract: Provided is a method for diagnosing and monitoring progression of cancer or effectiveness of a therapeutic treatment. The method includes detecting a methylation level of at least one gene in a biological sample containing circulating free DNA. Also provided are primer pairs and probes for diagnosis or prognosis of cancer in a subject in need thereof.

Abstract: Packaged semiconductor devices including high-thermal conductivity molding compounds and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution structure; a first die over and electrically coupled to the first redistribution structure; a first through via over and electrically coupled to the first redistribution structure; an insulation layer extending along the first redistribution structure, the first die, and the first through via; and an encapsulant over the insulation layer, the encapsulant surrounding portions of the first through via and the first die, the encapsulant including conductive fillers at a concentration ranging from 70% to about 95% by volume.

Abstract: A method of engineering forecast and analysis is provided. The method includes: generating a forecasting model based on financial or business information obtained through a user interface, where the forecasting model expresses a logical determining and/or calculation rule based on a structure of a high-order directed graph and by using a plurality of nodes, attributes of the plurality of nodes, and a relationship between every two of the plurality of nodes, and the forecasting model expresses a forecasting path through a directed edge between the nodes; and configuring a common attribute of the forecasting model, an attribute of the forecasting path, and a personalized attribute of the node based on instantiation configuration information.

Abstract: A method of wavelength tuning in a silicon photonics circuit includes receiving a bus waveguide, a ring resonator optically coupled to the bus waveguide, and a dielectric layer over the bus waveguide and over the ring resonator. The method further includes performing a first heat process at a first temperature to heat up the dielectric layer, where the first heat process shifts an initial resonance wavelength of the ring resonator to a first resonance wavelength shorter than the initial resonance wavelength. The first heat process permanently shifts the initial resonance wavelength to the first resonance wavelength, the first resonance wavelength being a wavelength when no heat is being applied to the ring resonator.

Abstract: A substrate processing apparatus, comprising: a processing chamber having a plasma intake wall configured to receive plasma from a remote plasma source (RPS) and a surrounding wall having an inner surface defining an interior volume for receiving a substrate; and a substrate support having a substrate supporting surface facing the plasma intake wall and elevatably arranged in the interior volume of the processing chamber. The surrounding wall, in a cross-section of the processing chamber, includes: a first segment having a first width associated with a processing region for the substrate support; a second segment having a width greater than the first width that is further away from the plasma intake wall than the first segment.

Abstract: A package includes a package component, a device die over and bonded to the package component, a metal cap having a top portion over the device die, and a thermal interface material between and contacting the device die and the metal cap. The thermal interface material includes a first portion directly over an inner portion of the device die, and a second portion extending directly over a corner region of the device die. The first portion has a first thickness. The second portion has a second thickness greater than the first thickness.

Abstract: An electrostatic sensing system configured to sense an electrostatic information of a fluid inside a fluid distribution component and including an electrostatic sensing assembly, a signal amplifier and an analog-to-digital converter. The electrostatic sensing assembly includes a sensing component, and a shield. The sensing component is configured to be disposed at the fluid distribution component. The sensing component is disposed through the fluid distribution component so as to be partially located in the fluid distribution component. The shield surrounds a part of the sensing component that is located in the fluid distribution component. At least part of the shield is located on an upstream side of the sensing component. The signal amplifier is electrically connected to the sensing component. The analog-to-digital converter is electrically connected to the signal amplifier. The shield has an opening spaced apart from the sensing component.

Abstract: The present disclosure relates to air assemblies having an inflation, a deflation, and a closed state for use with inflatable products, such as air mattresses. Specifically, the present disclosure relates to air assemblies where the configuration of the air assembly can be changed manually by a user by operating a directional control valve to inflate, deflate, or close the inflatable product. The directional control valve may also activate a pump in the inflation and deflation states and deactivate the pump in the closed state.

Abstract: A data storage device, and an error tolerance selecting method thereof which includes: writing data to data blocks of the data storage device; reading written data of the data blocks as read data; comparing the read data and the written data of each data column in the data blocks, and calculating a number of error bits in each chunk including a plurality of data columns accordingly; calculating a difference value between the number of error bits in the chunk and a first threshold value to store the difference value in an error tolerance list; and selecting a largest difference value in the error tolerance list as an error tolerance.

Abstract: A device establishes a first encrypted tunnel with a first active security gateway at a first data center to enable the device to communicate, via the first encrypted tunnel, with a first access and mobility management function (AMF) at the first data center. The device forwards, via the first encrypted tunnel and the first active security gateway, a first User Equipment device (UE) message to the first AMF. The device determines an occurrence of a failure or overload condition at the first active security gateway, and establishes, based on the determined occurrence of the failure or overload condition, a second encrypted tunnel with a standby security gateway at a second data center to enable the device to communicate, via the second encrypted tunnel, with the first AMF. The device forwards, via the second encrypted tunnel and the standby security gateway, at least one second UE message to the first AMF.

Abstract: A semiconductor device assembly including a through-silicon via (TSV) having an end region protruding from a back side of the substrate, the end region being surrounded by a conductive annulus disposed over the back side of the substrate; a dielectric layer disposed over the back side of the substrate, the dielectric layer having an upper surface flush with an upper surface of the end region of the TSV and flush with an upper surface of the conductive annulus; and a bond pad disposed over and electrically coupled to the end region of the TSV and the conductive annulus.

Abstract: The invention discloses a substrate container including a shell and a cover member. The shell defines an accommodation space, and has a bottom and at least one exhaust hole formed on the bottom, wherein the exhaust hole is adjacent to an opening of the shell. The cover member is mounted to the bottom of the shell, and the cover member and the bottom of the shell define a negative pressure cavity above and communicating with the at least one exhaust hole. An elongated exhaust hole is defined above the negative pressure cavity, and communicates with the negative pressure cavity and the accommodation space. A gas in the accommodation space is exhausted sequentially from the elongated exhaust hole, the negative pressure cavity and the at least one exhaust hole.

Abstract: An embodiment of the disclosure provides a package device including a redistribution layer, an integrated passive device layer, a first port, and a second port. The integrated passive device layer contacts the redistribution layer. The integrated passive device layer has at least one capacitor. The at least one capacitor includes a first capacitor and a second capacitor. The first port is electrically connected to the first capacitor and the second capacitor. The second port is provided opposite to the first port. The second port is electrically connected to the first capacitor and the second capacitor. The first port and the second port have the same resistance.

Abstract: A high-speed connector includes an insulating housing, and a first terminal assembly mounted in the insulating housing. The first terminal assembly includes a plurality of first terminals, a first base body and a first conductive film. The plurality of the first terminals include at least two first grounding terminals and at least two first signal terminals. At least one portion of a bottom of the first base body extends downward to form at least one first protruding portion. The at least two first signal terminals penetrate through the at least one first protruding portion. The first conductive film is covered to the at least one first protruding portion. The first conductive film has a first metal layer. The first metal layer is electrically connected with the at least two first grounding terminals to form a grounding structure.