Abstract: The present invention provides a semiconductor capacitor structure. The semiconductor capacitor structure comprises a first metal layer, a second metal layer and a first dielectric layer. The first metal layer is arranged to be a part of a first electrode of the semiconductor capacitor structure, and the first metal layer comprises a first portion and a second portion. The first portion is formed to have a first pattern, and the second portion is connected to the first portion. The second metal layer is arranged to be a part of a second electrode of the semiconductor capacitor structure, and the first dielectric layer is formed between the first metal layer and the second metal layer.

Abstract: A method of wake-up signal transmission for an access point (AP) in a wireless communication system is disclosed. The method comprises transmitting a beacon for notification of a Wi-Fi device in the wireless communication system, and transmitting a wake-up signal to the Wi-Fi device, wherein the wake-up signal is a binary signal for indicating the Wi-Fi device to receive or not to receive a data from the AP.

Abstract: An integrated circuit includes a first polysilicon region having a first grain size formed on a substrate. The integrated circuit also includes a second polysilicon region, having a second grain size different from the first grain size, formed on the substrate. The first polysilicon region is doped with a first dopant of a first conductive type and a second dopant selected from elements of group IIIA and group IVA which has an atomic weight heavier than that of silicon.

Abstract: A digital circuit comprises a plurality of functional circuits and a finite state machine. Each functional circuit comprises a digital macro, a resistance control device and at least one device with capacitance. The digital macro is coupled to a ground. The resistance control device is electrically connected between the digital macro and an always-on power mesh. The at least one device with capacitance is electrically connected between the resistance control device and the ground. The finite state machine is electrically connected to the resistance control device, and is configured to adjust the resistance of the resistance control device.

Abstract: A method of fabricating an integrated circuit is also provided. The method includes forming a first polysilicon region having an initial grain size on a substrate. The first polysilicon region is implanted with a first dopant of a first conductivity type and a second dopant. After the implantation, the first polysilicon region has a first grain size larger than the initial grain size. Then, a laser rapid thermal annealing process is performed to the first polysilicon region.

Abstract: A system for the coexistence between a plurality of wireless communication modules sharing a single antenna includes an antenna, first and second transceiving paths, and first and second wireless communications modules. The first wireless communications module is coupled to a first transceiving path and transmits or receives first wireless signals via the first transceiving path. The second wireless communications module is coupled to the second transceiving path and transmits and receives second wireless signals via the first and the second transceiving paths, wherein signal strengths of the second wireless signals passing through the second transceiving path are attenuated by a certain level, and the attenuated second wireless signals are added to the first wireless signals when passing through the first transceiving path, wherein one of the first and the second communications module is a LTE module and the other one is a WLAN module.

Abstract: A frequency selective circuit includes a first transistor, an impedance element, a first capacitive element, a second capacitive element, a second capacitive and a second transistor. The first transistor includes a first terminal, a second terminal and a control terminal. The impedance element is coupled between the first terminal and the control terminal of the first transistor. The first capacitive element is coupled to the first terminal of the first transistor. The second capacitive element is coupled to the control terminal of the first transistor. The second transistor includes a first terminal, a second terminal and a control terminal, wherein the control terminal of the second transistor is coupled to the control terminal of the first transistor.

Abstract: A frequency selective circuit includes a first transistor, an impedance element, a first capacitive element, a second capacitive element, a second capacitive and a second transistor. The first transistor includes a first terminal, a second terminal and a control terminal. The impedance element is coupled between the first terminal and the control terminal of the first transistor. The first capacitive element is coupled to the first terminal of the first transistor. The second capacitive element is coupled to the control terminal of the first transistor. The second transistor includes a first terminal, a second terminal and a control terminal, wherein the control terminal of the second transistor is coupled to the control terminal of the first transistor.

Abstract: An integrated circuit includes a first polysilicon region having a first grain size formed on a substrate. The integrated circuit also includes a second polysilicon region, having a second grain size different from the first grain size, formed on the substrate. The first polysilicon region is doped with a first dopant of a first conductive type and a second dopant selected from elements of group IIIA and group IVA which has an atomic weight heavier than that of silicon.

Abstract: An integrated circuit includes a first polysilicon region having a first grain size formed on a substrate. The integrated circuit also includes a second polysilicon region, having a second grain size different from the first grain size, formed on the substrate. Furthermore, a method of fabricating an integrated circuit is also provided. The method includes forming a first polysilicon region having an initial grain size on a substrate. The first polysilicon region is implanted with a first dopant of a first conductivity type and a second dopant. After the implantation, the first polysilicon region has a first grain size larger than the initial grain size. Then, a laser rapid thermal annealing process is performed to the first polysilicon region.

Abstract: An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes an impedance device coupled between a pad and a power line and a clamp unit coupled between the pad and a ground line.

Abstract: An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes an impedance device coupled between a pad and a power line and a clamp unit coupled between the pad and a ground line, wherein no ESD current flows through the impedance device when an ESD event occurs at the pad.

Abstract: A digital circuit comprises a plurality of functional circuits and a finite state machine. Each functional circuit comprises a digital macro, a resistance control device and at least one device with capacitance. The digital macro is coupled to a ground. The resistance control device is electrically connected between the digital macro and an always-on power mesh. The at least one device with capacitance is electrically connected between the resistance control device and the ground. The finite state machine is electrically connected to the resistance control device, and is configured to adjust the resistance of the resistance control device.

Abstract: The present invention provides a semiconductor capacitor structure. The semiconductor capacitor structure comprises a first metal layer, a second metal layer and a first dielectric layer. The first metal layer is arranged to be a part of a first electrode of the semiconductor capacitor structure, and the first metal layer comprises a first portion and a second portion. The first portion is formed to have a first pattern, and the second portion is connected to the first portion. The second metal layer is arranged to be a part of a second electrode of the semiconductor capacitor structure, and the first dielectric layer is formed between the first metal layer and the second metal layer.

Abstract: A method of fabricating an integrated circuit is also provided. The method includes forming a first polysilicon region having an initial grain size on a substrate. The first polysilicon region is implanted with a first dopant of a first conductivity type and a second dopant. After the implantation, the first polysilicon region has a first grain size larger than the initial grain size. Then, a laser rapid thermal annealing process is performed to the first polysilicon region.

Abstract: A system for the coexistence between a plurality of wireless communications modules sharing single antenna is provided. A wireless communications chipset includes a first wireless communications module configured to transmit or receive first wireless communications signals, and a second wireless communications module configured to transmit or receive second wireless communications signals. A path selection circuit is configured to connect the first wireless communications module to the antenna via a first transceiving path or a second transceiving path for transmitting and receiving the first wireless signals according to transceiving statuses of the first wireless signals and the second wireless signals.

Abstract: A transmitting device includes a transmitting chain, a configurable power amplifier device and an impedance tuning circuit. The transmitting chain is arranged to generate a radio frequency signal. The configurable power amplifier device is arranged to support at least a first power amplifier configuration and a second power amplifier configuration, wherein the configurable power amplifier device employs the first power amplifier configuration to receive and amplify the radio frequency signal when the transmitting device is operated in a first operation mode, and employs the second power amplifier configuration to receive and amplify the radio frequency signal when the transmitting device is operated in a second operation mode. The impedance tuning circuit is arranged to adjust an output impedance of the configurable power amplifier device employing the second power amplifier configuration when the transmitting device is operated in the second operation mode.

Abstract: A system for the coexistence between a plurality of wireless communication modules sharing a single antenna includes an antenna, first and second transceiving paths, and first and second wireless communications modules. The first wireless communications module is coupled to a first transceiving path and transmits or receives first wireless signals via the first transceiving path. The second wireless communications module is coupled to the second transceiving path and transmits and receives second wireless signals via the first and the second transceiving paths, wherein signal strengths of the second wireless signals passing through the second transceiving path are attenuated by a certain level, and the attenuated second wireless signals are added to the first wireless signals when passing through the first transceiving path, wherein one of the first and the second communications module is a LTE module and the other one is a WLAN module.

Abstract: An integrated circuit includes a first polysilicon region having a first grain size formed on a substrate. The integrated circuit also includes a second polysilicon region, having a second grain size different from the first grain size, formed on the substrate. Furthermore, a method of fabricating an integrated circuit is also provided. The method includes forming a first polysilicon region having an initial grain size on a substrate. The first polysilicon region is implanted with a first dopant of a first conductivity type and a second dopant. After the implantation, the first polysilicon region has a first grain size larger than the initial grain size. Then, a laser rapid thermal annealing process is performed to the first polysilicon region.

Abstract: An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes an impedance device coupled between a pad and a power line and a clamp unit coupled between the pad and a ground line, wherein no ESD current flows through the impedance device when an ESD event occurs at the pad.