Patents by Inventor Yuan Hung Chung
Yuan Hung Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150124362Abstract: An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes an impedance device coupled between a pad and a power line and a clamp unit coupled between the pad and a ground line, wherein no ESD current flows through the impedance device when an ESD event occurs at the pad.Type: ApplicationFiled: January 7, 2015Publication date: May 7, 2015Inventors: Bo-Shih HUANG, Tsung-Ming CHEN, Yuan-Hung CHUNG
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Patent number: 9025583Abstract: A system for the coexistence between a plurality of wireless communication modules sharing a single antenna is provided, including an antenna, first and second transceiving paths, and first and second wireless communications modules. The first transceiving path is coupled to the antenna. The second transceiving path is coupled to the first transceiving path. The first wireless communications module is coupled to the first transceiving path and transmits or receives a plurality of first wireless signals. The second wireless communications module is coupled to the second transceiving path and transmits or receives a plurality of second wireless signals, wherein signal strengths of the second wireless signals passing through the second transceiving path are attenuated by a certain level, and the attenuated second wireless signals are added to the first wireless signals when passing through the first transceiving path.Type: GrantFiled: January 29, 2010Date of Patent: May 5, 2015Assignee: Mediatek Inc.Inventors: Hsien-Chyi Chiou, Shu-Ping Shiu, Hong-Kai Hsu, Yuan-Hung Chung, Wei Wang, Ren-Yuh Liang
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Patent number: 8970997Abstract: An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes an impedance device coupled between a pad and a power line and a clamp unit coupled between the pad and a ground line.Type: GrantFiled: October 29, 2012Date of Patent: March 3, 2015Assignee: MediaTek Inc.Inventors: Bo-Shih Huang, Tsung-Ming Chen, Yuan-Hung Chung
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Patent number: 8929847Abstract: A signal processing circuit with noise cancellation includes an impedance matching unit and a transconductance stage. The impedance matching unit is disposed at a first path, and arranged to provide input impedance matching, wherein the impedance matching unit is a passive element, and the first path is coupled between a signal input port and a signal output port. The transconductance stage is disposed at a second path, and arranged to guide circuit introduced noise to the signal output port for noise cancellation at the signal output port, wherein the second path is coupled between the signal input port and the signal output port.Type: GrantFiled: April 22, 2014Date of Patent: January 6, 2015Assignee: Mediatek Inc.Inventors: Yuan-Hung Chung, Yi-Shing Shih
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Publication number: 20140328233Abstract: A portable device for receiving broadcast information is provided. A mixer down-converts a radio-frequency signal with a local oscillation clock to provide an intermediate frequency signal. A filter is arranged to filter the intermediate frequency signal. An analog-to-digital converter converts the filtered intermediate frequency signal into a digital signal according to a sampling rate. The broadcast information is obtained according to the digital signal. The local oscillation clock has a first frequency in a normal mode and a second frequency in a power-saving mode, and the second frequency is lower than the first frequency.Type: ApplicationFiled: January 20, 2014Publication date: November 6, 2014Applicant: MediaTek Inc.Inventors: Yi-Shing SHIH, Che-Hung LIAO, Yuan-Hung CHUNG, Kun-Chien HUNG, Chin-Wei HUANG, Wei-Chen WANG, Tsai-Yuan HSU, Chao-Wen CHOU
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Publication number: 20140220922Abstract: A signal processing circuit with noise cancellation includes an impedance matching unit and a transconductance stage. The impedance matching unit is disposed at a first path, and arranged to provide input impedance matching, wherein the impedance matching unit is a passive element, and the first path is coupled between a signal input port and a signal output port. The transconductance stage is disposed at a second path, and arranged to guide circuit introduced noise to the signal output port for noise cancellation at the signal output port, wherein the second path is coupled between the signal input port and the signal output port.Type: ApplicationFiled: April 22, 2014Publication date: August 7, 2014Applicant: MEDIATEK INC.Inventors: Yuan-Hung Chung, Yi-Shing Shih
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Patent number: 8792540Abstract: An amplifier is provided. The amplifier includes a pair of first input transistors, a first load, and a first canceling circuit. The pair of first input transistors is coupled between a pair of first differential nodes and a reference voltage source, for receiving a pair of input signals. The first load is coupled to the pair of first differential nodes and a pair of differential output terminals of the amplifier. The first canceling circuit is coupled between the first differential nodes. The canceling circuit is capable of balancing voltages, respectively, at the first differential nodes when the amplifier is turned off.Type: GrantFiled: September 12, 2012Date of Patent: July 29, 2014Assignee: MediaTek Inc.Inventors: Yi-Shing Shih, Yuan-Hung Chung
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Patent number: 8750818Abstract: A signal processing circuit with noise cancellation includes an impedance matching unit and a transconductance stage. The impedance matching unit is disposed at a first path, and arranged to provide input impedance matching, wherein the impedance matching unit is a bilateral element, and the first path is coupled between a signal input port and a signal output port. The transconductance stage is disposed at a second path, and arranged to guide circuit introduced noise to the signal output port for noise cancellation at the signal output port, wherein the second path is coupled between the signal input port and the signal output port.Type: GrantFiled: March 11, 2013Date of Patent: June 10, 2014Assignee: Mediatek Inc.Inventors: Yuan-Hung Chung, Yi-Shing Shih
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Publication number: 20130271213Abstract: A signal processing circuit with noise cancellation includes an impedance matching unit and a transconductance stage. The impedance matching unit is disposed at a first path, and arranged to provide input impedance matching, wherein the impedance matching unit is a bilateral element, and the first path is coupled between a signal input port and a signal output port. The transconductance stage is disposed at a second path, and arranged to guide circuit introduced noise to the signal output port for noise cancellation at the signal output port, wherein the second path is coupled between the signal input port and the signal output port.Type: ApplicationFiled: March 11, 2013Publication date: October 17, 2013Applicant: MEDIATEK INC.Inventors: Yuan-Hung Chung, Yi-Shing Shih
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Publication number: 20130156079Abstract: An amplifier is provided. The amplifier includes a pair of first input transistors, a first load, and a first canceling circuit. The pair of first input transistors is coupled between a pair of first differential nodes and a reference voltage source, for receiving a pair of input signals. The first load is coupled to the pair of first differential nodes and a pair of differential output terminals of the amplifier. The first canceling circuit is coupled between the first differential nodes. The canceling circuit is capable of balancing voltages, respectively, at the first differential nodes when the amplifier is turned off.Type: ApplicationFiled: September 12, 2012Publication date: June 20, 2013Applicant: MEDIATEK INC.Inventors: Yi-Shing SHIH, Yuan-Hung CHUNG
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Patent number: 8442581Abstract: A system for the coexistence between wireless communication modules sharing an antenna is disclosed. A wireless communication chipset includes a first wireless communication module capable of transmitting and receiving first wireless communication signals, a second wireless communication module capable of transmitting and receiving second wireless communication signals and a combine-separate unit capable of generating a first combined signal and separating a second combined signal. The switching device is configured to selectively transmit the first combined signal or receive the second combined signal. The connection device has a first port coupled to an antenna, a second port connected to the first port for transmitting the first combined signal or receiving the second combined signal, and a third port connected to the first port for transmitting or receiving the second wireless communication signals via the second path and the antenna.Type: GrantFiled: January 13, 2010Date of Patent: May 14, 2013Assignee: Mediatek Inc.Inventors: Yuan-Hung Chung, Hong-Kai Hsu
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Patent number: 8212323Abstract: A seal ring structure for an integrated circuit includes a seal ring being disposed along a periphery of the integrated circuit and being divided into at least a first portion and a second portion, wherein the second portion is positioned facing an analog and/or RF circuit block and is different from the first portion in structure. A P+ region is provided in a P substrate and positioned under the second portion. A shallow trench isolation (STI) structure surrounds the P+ region and laterally extends underneath a conductive rampart of the second portion.Type: GrantFiled: August 5, 2010Date of Patent: July 3, 2012Assignee: Mediatek Inc.Inventors: Tung-Hsing Lee, Tien-Chang Chang, Yuan-Hung Chung
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Patent number: 8188578Abstract: A seal ring structure disposed along a periphery of an integrated circuit. The seal ring is divided into at least a first portion and a second portion. The second portion is positioned facing and shielding an analog and/or RF circuit block from a noise. A deep N well is disposed in a P substrate and is positioned under the second portion. The deep N well reduces the substrate noise coupling.Type: GrantFiled: November 19, 2008Date of Patent: May 29, 2012Assignee: Mediatek Inc.Inventors: Tung-Hsing Lee, Tien-Chang Chang, Yuan-Hung Chung
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Patent number: 7933575Abstract: The present invention discloses a circuit for settling DC offset and controlling RC time-constant in a direct conversion receiver. The circuit includes a variable resistive unit for providing a continuously or non-continuously variable resistance in the direct conversion receiver. The variable resistive unit can provide the variable resistance by utilizing a controllable transistor or a plurality of resistors. Accordingly, the variable resistive unit can be coupled to a capacitor for constituting a high pass filter, which is capable of rapidly settling DC offset in a direct conversion receiver.Type: GrantFiled: February 21, 2008Date of Patent: April 26, 2011Assignee: Mediatek, Inc.Inventors: Yuan-hung Chung, Chia-hsin Wu, Shou-tsung Wang
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Publication number: 20110009074Abstract: A system for the coexistence between a plurality of wireless communications modules sharing single antenna is provided. A wireless communications chipset includes a first wireless communications module configured to transmit or receive first wireless communications signals, and a second wireless communications module configured to transmit or receive second wireless communications signals. A path selection circuit is configured to connect the first wireless communications module to the antenna via a first transceiving path or a second transceiving path for transmitting and receiving the first wireless signals according to transceiving statuses of the first wireless signals and the second wireless signals.Type: ApplicationFiled: November 25, 2009Publication date: January 13, 2011Applicant: MEDIATEK INC.Inventors: Hong-Kai Hsu, Yuan-Hung Chung, Hsien-Chyi Chiou, Wei Wang, Wen-Ying Chien, Jwo-An Lin, I-Lin Hsieh
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Publication number: 20110007675Abstract: A system for the coexistence between a plurality of wireless communication modules sharing a single antenna is provided, including an antenna, first and second transceiving paths, and first and second wireless communications modules. The first transceiving path is coupled to the antenna. The second transceiving path is coupled to the first transceiving path. The first wireless communications module is coupled to the first transceiving path and transmits or receives a plurality of first wireless signals. The second wireless communications module is coupled to the second transceiving path and transmits or receives a plurality of second wireless signals, wherein signal strengths of the second wireless signals passing through the second transceiving path are attenuated by a certain level, and the attenuated second wireless signals are added to the first wireless signals when passing through the first transceiving path.Type: ApplicationFiled: January 29, 2010Publication date: January 13, 2011Applicant: MEDIATEK INC.Inventors: Hsien-Chyi Chiou, Shu-Ping Shiu, Hong-Kai Hsu, Yuan-Hung Chung, Wei Wang, Ren-Yuh Liang
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Publication number: 20100311339Abstract: A system for the coexistence between wireless communication modules sharing an antenna is disclosed. A wireless communication chipset includes a first wireless communication module capable of transmitting and receiving first wireless communication signals, a second wireless communication module capable of transmitting and receiving second wireless communication signals and a combine-separate unit capable of generating a first combined signal and separating a second combined signal. The switching device is configured to selectively transmit the first combined signal or receive the second combined signal. The connection device has a first port coupled to an antenna, a second port connected to the first port for transmitting the first combined signal or receiving the second combined signal, and a third port connected to the first port for transmitting or receiving the second wireless communication signals via the second path and the antenna.Type: ApplicationFiled: January 13, 2010Publication date: December 9, 2010Applicant: MEDIATEK INC.Inventors: Yuan-Hung Chung, Hong-Kai Hsu
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Publication number: 20100295146Abstract: A seal ring structure for an integrated circuit includes a seal ring being disposed along a periphery of the integrated circuit and being divided into at least a first portion and a second portion, wherein the second portion is positioned facing an analog and/or RF circuit block and is different from the first portion in structure. A P+ region is provided in a P substrate and positioned under the second portion. A shallow trench isolation (STI) structure surrounds the P+ region and laterally extends underneath a conductive rampart of the second portion.Type: ApplicationFiled: August 5, 2010Publication date: November 25, 2010Inventors: Tung-Hsing Lee, Tien-Chang Chang, Yuan-Hung Chung
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Patent number: 7760003Abstract: The present invention sets forth a controllable resistive circuit which comprises a transistor, a capacitor, a charging unit and a discharging unit. The transistor is capable of providing a variable resistance which is controlled to vary continuously and smoothly. The charging and discharging units are used to respectively charge and discharge the capacitor in different periods. As a result, the capacitor can provide a variable voltage which is controlled to vary continuously and smoothly to control the equivalent resistance of the transistor during the period the capacitor is discharging. Therefore, the controllable resistive circuit in accordance with the present invention is capable of being used in any kind of circuit which requires a variable resistance varied continuously and smoothly.Type: GrantFiled: October 17, 2006Date of Patent: July 20, 2010Assignee: MEDIATEK Inc.Inventors: Chia-hsin Wu, Shou-tsung Wang, Yuan-hung Chung
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Publication number: 20090294929Abstract: A seal ring structure disposed along a periphery of an integrated circuit. The seal ring is divided into at least a first portion and a second portion. The second portion is positioned facing and shielding an analog and/or RF circuit block from a noise. A deep N well is disposed in a P substrate and is positioned under the second portion. The deep N well reduces the substrate noise coupling.Type: ApplicationFiled: November 19, 2008Publication date: December 3, 2009Inventors: Tung-Hsing Lee, Tien-Chang Chang, Yuan-Hung Chung